📄 wcdma_phlayer.mdl
字号:
PortNumber 1
Name "dtch"
PropagatedSignals "Transport Channel"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
Port {
PortNumber 2
Name "dcch"
PropagatedSignals "Transport Channel"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "Rate DeMatching"
Ports [2, 2]
Position [335, 107, 405, 198]
ShowName off
SourceBlock "wcdma_lib/Wcdma Multiplexing\nand Channel C"
"oding/Rate DeMatching"
SourceType "Rate DeMatching"
ShowPortLabels on
Port {
PortNumber 1
Name "dtch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
Port {
PortNumber 2
Name "dcch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "Syndrome\nDectector"
Ports [2, 4]
Position [695, 105, 765, 195]
ShowName off
SourceBlock "wcdma_lib/Wcdma Multiplexing\nand Channel C"
"oding/Syndrome\nDectector"
SourceType "Syndrome Detector"
ShowPortLabels on
Port {
PortNumber 1
Name "dtch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
Port {
PortNumber 2
Name "syn1"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
Port {
PortNumber 3
Name "dcch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
Port {
PortNumber 4
Name "syn2"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType SubSystem
Name "background6"
Ports []
Position [68, 91, 799, 218]
BackgroundColor "lightBlue"
ShowName off
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskDisplay "disp('')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "background6"
Location [209, 325, 575, 532]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
}
}
Block {
BlockType Outport
Name "TrChOut1"
Position [815, 115, 845, 125]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "BLER1"
Position [865, 135, 895, 145]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "TrChOut3"
Position [815, 155, 845, 165]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "BLER2"
Position [865, 175, 895, 185]
Port "4"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "Radio Frame \nConcatenation"
SrcPort 2
Points [40, 0]
DstBlock "1st DeInterleaver"
DstPort 2
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Radio Frame \nConcatenation"
SrcPort 1
Points [40, 0]
DstBlock "1st DeInterleaver"
DstPort 1
}
Line {
Name "cctrch"
Labels [1, 1]
SrcBlock "CCtrChIn1"
SrcPort 1
DstBlock "Radio Frame \nConcatenation"
DstPort 1
}
Line {
Name "syn2"
Labels [0, 0]
SrcBlock "Syndrome\nDectector"
SrcPort 4
DstBlock "BLER2"
DstPort 1
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "Syndrome\nDectector"
SrcPort 3
DstBlock "TrChOut3"
DstPort 1
}
Line {
Name "syn1"
Labels [0, 0]
SrcBlock "Syndrome\nDectector"
SrcPort 2
DstBlock "BLER1"
DstPort 1
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Syndrome\nDectector"
SrcPort 1
DstBlock "TrChOut1"
DstPort 1
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "Code Blk Concatenat\nTrBlk Segment"
SrcPort 2
DstBlock "Syndrome\nDectector"
DstPort 2
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Code Blk Concatenat\nTrBlk Segment"
SrcPort 1
DstBlock "Syndrome\nDectector"
DstPort 1
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "Channel\nDecoding"
SrcPort 2
DstBlock "Code Blk Concatenat\nTrBlk Segment"
DstPort 2
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Channel\nDecoding"
SrcPort 1
DstBlock "Code Blk Concatenat\nTrBlk Segment"
DstPort 1
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "Rate DeMatching"
SrcPort 2
DstBlock "Channel\nDecoding"
DstPort 2
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Rate DeMatching"
SrcPort 1
DstBlock "Channel\nDecoding"
DstPort 1
}
Line {
Name "dcch"
Labels [0, 0]
SrcBlock "1st DeInterleaver"
SrcPort 2
Points [0, 5]
DstBlock "Rate DeMatching"
DstPort 2
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "1st DeInterleaver"
SrcPort 1
Points [0, 5]
DstBlock "Rate DeMatching"
DstPort 1
}
Annotation {
Name "Radio Frame\nConcatenation"
Position [124, 236]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "Syndrome\nDetector"
Position [724, 239]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "Code Blk Concat/\n TrBlk Segm"
Position [594, 241]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "Channel\nDecoding"
Position [479, 236]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "1st\nDeinterleaver"
Position [254, 236]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "Rate\nDeMatching"
Position [369, 236]
FontName "Arial"
FontSize 11
FontWeight "bold"
}
Annotation {
Name "Wcdma Physical Channel RX Error Correction"
Position [429, 39]
FontName "Arial"
FontSize 16
FontWeight "bold"
}
}
}
Block {
BlockType Reference
Name "Wcdma Rx\nPhCh Demapping"
Ports [1, 1]
Position [415, 302, 570, 388]
Orientation "left"
NamePlacement "alternate"
SourceBlock "wcdma_lib/Wcdma Multiplexing\nand Channel Codin"
"g/Wcdma Rx\nPhCh Demapping"
SourceType "Wcdma Rx Physical Channel Demapping"
ShowPortLabels on
numBitsRF "numBitsRF"
numPhCH "numPhCH"
slotFormat "slotFormat"
checkParams off
Port {
PortNumber 1
Name "cctrch"
PropagatedSignals "cctrch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "Wcdma Tx\nPhCh Mapping"
Ports [1, 1]
Position [435, 105, 575, 185]
SourceBlock "wcdma_lib/Wcdma Multiplexing\nand Channel Codin"
"g/Wcdma Tx\nPhCh Mapping"
SourceType "Wcdma Tx Physical Channel Mapping"
ShowPortLabels on
numBitsRF "numBitsRF"
numPhCH "numPhCH"
slotFormat "slotFormat"
checkParams off
Port {
PortNumber 1
Name "dpch"
PropagatedSignals "slot"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "Wcdma Tx \nChannel Coding Scheme"
Ports [2, 1]
Position [265, 105, 405, 185]
SourceBlock "wcdma_lib/Wcdma Multiplexing\nand Channel Codin"
"g/Wcdma Tx \nChannel Coding Scheme"
SourceType "Wcdma DL Tx Channel Coding Scheme"
ShowPortLabels on
trBlkSetSize "trBlkSetSize"
trBlkSize "trBlkSize"
tti "tti"
crcSize "crcSize"
errorCorr "errorCorr"
RMAttribute "RMAttribute"
posTrCh "posTrCh"
numPhCH "numPhCH"
slotFormat "slotFormat"
checkParams off
Port {
PortNumber 1
Name "cctrch"
PropagatedSignals "cctrch"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "Wcdma UE Rx\nAntenna"
Ports [1, 1]
Position [595, 303, 750, 387]
Orientation "left"
NamePlacement "alternate"
SourceBlock "wcdma_lib/Wcdma UE Receiver/Wcdma UE Rx\nAntenn"
"a"
SourceType "Wcdma UE Rx Antenna"
ShowPortLabels on
slotFormat "slotFormat"
dpchCode "dpchCode"
scrCode "scrCode"
powerVector "powerVector"
numTapsRRC "numTapsRRC"
overSampling "overSampling"
fingerEnables "fingerEnables"
fingerPhases "fingerPhases"
numTapsChEst "numTapsChEst"
checkParams off
Port {
PortNumber 1
Name "dpch"
PropagatedSignals "slot"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Line {
Name "dtch"
Labels [0, 0]
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
Points [20, 0]
Branch {
Labels [1, 0]
DstBlock "Wcdma Tx \nChannel Coding Scheme"
DstPort 1
}
Branch {
Points [0, -45]
DstBlock "Goto1"
DstPort 1
}
}
Line {
SrcBlock "From3"
SrcPort 1
DstBlock "Error Rate\nCalculation"
DstPort 1
}
Line {
SrcBlock "From5"
SrcPort 1
DstBlock "Error Rate\nCalculation"
DstPort 2
}
Line {
Name "dtch"
Labels [-1, 0]
SrcBlock "Wcdma Rx\nChannel Decoding Scheme"
SrcPort 1
DstBlock "Goto2"
DstPort 1
}
Line {
Name "dcch"
Labels [-1, 0]
SrcBlock "Wcdma Rx\nChannel Decoding Scheme"
SrcPort 3
DstBlock "Goto4"
DstPort 1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -