📄 cs8950.c
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/******************************************************************************
*
* WritePHY()
*
******************************************************************************/
static BOOL WritePHY( PCHIP pChip, WORD Address, WORD Register, WORD Value )
{
BYTE Status;
int x;
/* Ensure that the PHY is not busy */
for ( x=0; x<MAXLOOP; x++ )
{
Status=ReadByte( OpReg_MIISts);
if ( !(Status & MIISts_Busy) ) break;
}
if ( x == MAXLOOP )
{
EdbgOutputDebugString
(
"First PHY write failed, Address = 0x%x, Register = 0x%x, Value = 0x%x.\r\n",
(ULONG)Address,
(ULONG)Register,
(ULONG)Value
);
return FALSE;
}
/* Put the PHY data into the PHY Data register */
WriteWord( OpReg_MIIData, Value );
/* Issue the command to write to the register within the PHY */
WriteWord( OpReg_MIICmd,(WORD)(MIICmd_Opcode_Write |(Address<<5)| Register));
/* Wait until the command is completed */
for ( x=0; x<MAXLOOP; x++ )
{
Status=ReadByte( OpReg_MIISts );
if ( !(Status & MIISts_Busy) )
break;
}
if ( x == MAXLOOP )
{
EdbgOutputDebugString
(
"Second PHY write failed, Address = 0x%x, Register = 0x%x, Value = 0x%x.\r\n",
(ULONG)Address,
(ULONG)Register,
(ULONG)Value
);
return FALSE;
}
return TRUE;
}
static BOOL Check_PHY_ID_Type( PCHIP pChip, WORD PHYAddress)
{
PCD pCD;
BOOL Result;
union
{
WORD Word[2];
DWORD DWord;
} PHYID;
pCD = (PCD)pChip->pData;
/* Read PHY ID register 1 */
Result = ReadPHY( pChip, PHYAddress, PHYReg_PHYIDR1, &PHYID.Word[1] );
if ( Result != TRUE )
{
return FALSE;
}
/* Read PHY ID register 2 */
Result = ReadPHY( pChip, PHYAddress, PHYReg_PHYIDR2, &PHYID.Word[0] );
if ( Result != TRUE )
{
return FALSE;
}
/* Not a Valid PhyID */
if (PHYID.DWord == 0xffffffff || PHYID.DWord == 0x0)
{
return FALSE;
}
/* Check if it is a PHY that we know about */
if ( ((PHYID.DWord & PHYID_OUI_Mask) == PHYID_OUI_National) &&
((PHYID.DWord & PHYID_Model_Mask) == PHYID_Model_DP83840) )
{
pCD->PHYType = PHY_TYPE_NATIONAL;
DEBUGMSG(ZONE_INIT,(TEXT("Detected National PHY at address: %x\r\n"), PHYAddress) );
}
else if ( ((PHYID.DWord & PHYID_OUI_Mask) == PHYID_OUI_Crystal) &&
((PHYID.DWord & PHYID_Model_Mask) == PHYID_Model_CS8952) )
{
pCD->PHYType = PHY_TYPE_CRYSTAL;
DEBUGMSG(ZONE_INIT,(TEXT("Detected Crystal PHY at address: %x\r\n"), PHYAddress) );
}
else if ( ((PHYID.DWord & PHYID_OUI_Mask) == PHYID_OUI_ICS) &&
((PHYID.DWord & PHYID_Model_Mask) == PHYID_Model_ICS1890) )
{
pCD->PHYType = PHY_TYPE_ICS;
DEBUGMSG(ZONE_INIT,(TEXT("Detected ICS1890 PHY at address: %x\r\n"), PHYAddress) );
}
else if ( ((PHYID.DWord & PHYID_OUI_Mask) == PHYID_OUI_BROADCOM) &&
((PHYID.DWord & PHYID_Model_Mask) == PHYID_Model_BCM5201) )
{
pCD->PHYType = PHY_TYPE_BROADCOM;
DEBUGMSG(ZONE_INIT,(TEXT("Detected Broadcom PHY at address: %x\r\n"), PHYAddress) );
}
else if ( ((PHYID.DWord & PHYID_OUI_Mask) == PHYID_OUI_MICREL) &&
((PHYID.DWord & PHYID_Model_Mask) == PHYID_Model_KS8721BL) )
{
pCD->PHYType = PHY_TYPE_MICREL_8721BL;
DEBUGMSG(ZONE_INIT,(TEXT("Detected Micrel KS8721BL PHY at address: %x\r\n"), PHYAddress ));
}
else if (PHYID.DWord == 0x00406212)
{
pCD->PHYType = PHY_TYPE_BROADCOM;
DEBUGMSG(ZONE_INIT,(TEXT("Detected Broadcom PHY at address: %x\r\n"), PHYAddress) );
}
else if (PHYID.DWord == 0x78100003)
{
pCD->PHYType = PHY_TYPE_LEVEL1; /* clc */
DEBUGMSG(ZONE_INIT,(TEXT("Detected Level1 PHY at address: %x\r\n"), PHYAddress) );
} else
{
pCD->PHYType = PHY_TYPE_UNKNOWN;
DEBUGMSG(ZONE_INIT,(TEXT("Detected Unknown PHY at address: %x\r\n"), PHYAddress) );
}
/* Save the address of the PHY */
pCD->PHYAddress = PHYAddress;
/* Get the PHY revision level */
pCD->PHYRevision = (BYTE)(PHYID.DWord & PHYID_Revision_Mask);
return TRUE;
}
/******************************************************************************
*
* FindPHYType()
*
******************************************************************************/
static BOOL FindPHYType( PCHIP pChip )
{
PCD pCD;
WORD PHYAddress;
BOOL IsPHYFound;
pCD = (PCD)pChip->pData;
/* Search for a known type of PHY */
for ( PHYAddress=1; PHYAddress<=31; PHYAddress++ )
{
IsPHYFound=Check_PHY_ID_Type(pChip, PHYAddress);
if (IsPHYFound == TRUE )
{
break;
}
} //end for PhyId 1-31
/* If did not find a PHY */
if ( IsPHYFound == FALSE )
{
//PHY address 0 is for broadcasting. All PHYs will respond to address 0.
//However, some users may connect PHY to address 0. So search it.
IsPHYFound=Check_PHY_ID_Type(pChip, 0);
}
if ( IsPHYFound == FALSE )
{
DEBUGMSG(1,(TEXT("Error: EthernetMAC: A PHY is not found!\r\n") ));
RETAILMSG(1,( TEXT("Error: EthernetMAC: A PHY is not found!\r\n")));
}
return IsPHYFound;
}
/******************************************************************************
*
* StartupQueues()
*
******************************************************************************/
static WORD StartupQueues( PCHIP pChip )
{
PCD pCD;
USHORT Index;
pCD = (PCD)pChip->pData;
pCD->TxQueueDepth=0;
/* Allocate shared memory for the Receive Descriptor Queue */
pCD->pRxDesc = (PVOID) &pCS8950Buffer->RxDesc[0];
pCD->RxDescPhysAddr = CONVERT_TO_PHYSICAL(pCD->pRxDesc);
ASSERT(!(pCD->RxDescPhysAddr & 0x3));
/* Initialize Receive Descriptor Queue limit pointer */
pCD->pRxDescLimit = pCD->pRxDesc + RXDESCCOUNT;
/* Initialize the Receive Descriptor Queue registers */
WriteDWord( OpReg_RxDBA, pCD->RxDescPhysAddr );
WriteWord( OpReg_RxDBL, sizeof(RxDesc_t)*RXDESCCOUNT );
WriteDWord( OpReg_RxDTH, 0x00040002);
/* Allocate shared memory for the Receive Status Queue */
pCD->pRxStat = (PVOID) &pCS8950Buffer->RxStat[0];
pCD->RxStatPhysAddr = CONVERT_TO_PHYSICAL(pCD->pRxStat);
ASSERT(!(pCD->RxStatPhysAddr & 0x3));
/* Initialize Receive Status Queue limit pointer */
pCD->pRxStatLimit = pCD->pRxStat + RXSTATCOUNT;
/* Initialize the Receive Status Queue registers */
WriteDWord( OpReg_RxSBA, pCD->RxStatPhysAddr );
WriteWord( OpReg_RxSBL, sizeof(RxStat_t)*RXSTATCOUNT);
WriteDWord(OpReg_RxSTH, 0x00040002);
/* Allocate shared memory for the Transmit Descriptor Queue */
pCD->pTxDesc = (PVOID) &pCS8950Buffer->TxDesc[0];
pCD->TxDescPhysAddr = CONVERT_TO_PHYSICAL(pCD->pTxDesc);
ASSERT(!(pCD->TxDescPhysAddr & 0x3));
//Result = VosAllocSharedMemory( pChip, (WORD)(sizeof(TxDesc_t)*TXDESCCOUNT),
// (PVOID *)(&pCD->pTxDesc), (DWORD *)(&pCD->TxDescPhysAddr) );
//
//if ( Result != TRUE )
// return FALSE;
/* Initialize Transmit Descriptor Queue limit pointer */
pCD->pTxDescLimit = pCD->pTxDesc + TXDESCCOUNT;
/* Initialize the Transmit Descriptor Queue registers */
WriteDWord( OpReg_TxDBA, pCD->TxDescPhysAddr );
WriteWord( OpReg_TxDBL, sizeof(TxDesc_t)*TXDESCCOUNT );
WriteDWord( OpReg_TxDTH, 0x00040002);
/* Allocate shared memory for the Transmit Status Queue */
pCD->pTxStat = (PVOID) &pCS8950Buffer->TxStat[0];
pCD->TxStatPhysAddr = CONVERT_TO_PHYSICAL(pCD->pTxStat);
ASSERT(!(pCD->TxStatPhysAddr & 0x3));
//Result = VosAllocSharedMemory( pChip, (WORD)(sizeof(TxStat_t)*TXSTATCOUNT),
// (PVOID *)(&pCD->pTxStat), (DWORD *)(&pCD->TxStatPhysAddr) );
//
//if ( Result != TRUE )
// return FALSE;
/* Initialize Transmit Status Queue limit pointer */
pCD->pTxStatLimit = pCD->pTxStat + TXSTATCOUNT;
/* Initialize the Transmit Status Queue registers */
WriteDWord( OpReg_TxSBA, pCD->TxStatPhysAddr );
WriteWord( OpReg_TxSBL, sizeof(TxStat_t)*TXSTATCOUNT );
WriteDWord( OpReg_TxSTH, 0x00040002 );
/* Allocate receive buffers and initialize the Receive Descriptor Queue */
for ( Index=0; Index<RXDESCCOUNT; Index++ )
{
/* Allocate shared memory for a receive buffer */
pCD->RxBuff[Index].pBuff = (PVOID) &pCS8950Buffer->RxBuff[Index][0];
pCD->RxBuff[Index].PhysAddr = CONVERT_TO_PHYSICAL( pCD->RxBuff[Index].pBuff);
ASSERT(!(pCD->RxBuff[0].PhysAddr & 0x3));
/* Initialize the Receive Descriptor */
pCD->pRxDesc[Index].RxBufAdr = pCD->RxBuff[Index].PhysAddr;
pCD->pRxDesc[Index].BufLength = RXBUFFSIZE;
pCD->pRxDesc[Index].BufIndx = Index;
}
// /* Allocate shared memory for a receive buffer */
// Result = VosAllocSharedMemory( pChip, (WORD)RXBUFFSIZE,
// (PVOID *)(&pCD->RxBuff[Index].pBuff), (DWORD *)(&pCD->RxBuff[Index].PhysAddr));
// if ( Result != TRUE ) return FALSE;
//
// /* Initialize the Receive Descriptor */
// (pCD->pRxDesc+Index)->RxBufAdr = pCD->RxBuff[Index].PhysAddr;
// (pCD->pRxDesc+Index)->BufLength = RXBUFFSIZE;
// (pCD->pRxDesc+Index)->BufIndx = Index;
//}
//
//
/* Allocate the transmit buffers */
//for ( Index=0; Index<TXBUFFCOUNT; Index++ )
//{
// /* Allocate shared memory for a transmit buffer */
// Result = VosAllocSharedMemory( pChip, (WORD)TXBUFFSIZE,
// (PVOID *)(&pCD->TxBuff[Index].pBuff), (DWORD *)(&pCD->TxBuff[Index].PhysAddr) );
// if ( Result != TRUE )
// {
// return FALSE;
// }
//}
for ( Index=0; Index<TXBUFFCOUNT; Index++ )
{
/* Allocate the transmit buffers */
pCD->TxBuff[Index].pBuff = (PVOID) &pCS8950Buffer->TxBuff[Index][0];
pCD->TxBuff[Index].PhysAddr = CONVERT_TO_PHYSICAL( pCD->TxBuff[Index].pBuff);
#if 0
EdbgOutputDebugString("psEP9312Buffer = %x\n", pCS8950Buffer);
EdbgOutputDebugString("psEP9312Buffer->TxBuff = %x\n", pCS8950Buffer->TxBuff);
EdbgOutputDebugString("psEP9312Buffer->TxBuff[Index] = %x\n", pCS8950Buffer->TxBuff[Index]);
EdbgOutputDebugString("psEP9312Buffer->TxBuff[Index][0] = %x\n", pCS8950Buffer->TxBuff[Index][0]);
EdbgOutputDebugString("pCD->TxBuff[Index].PhysAddr = %x\n", pCD->TxBuff[Index].PhysAddr);
#endif // 0
ASSERT(pCD->TxBuff[Index].pBuff);
ASSERT(pCD->TxBuff[Index].PhysAddr);
ASSERT(!(pCD->TxBuff[Index].PhysAddr & 0x3));
}
/* Initialize receive and transmit buffer thresholds */
WriteDWord( OpReg_RxBTH, 0x00800040 );
WriteDWord( OpReg_TxBTH, 0x00200010 );
//
// Need to make sure that we don't need this.
//
//InitializeRxQueues( pChip );
return MAC_SUCCESSFUL;
}
/******************************************************************************
*
* VchipInit()
*
******************************************************************************/
static WORD VchipInit( PCHIP pChip )
{
PCD pCD;
int x;
// WORD Result;
volatile BYTE Status;
pCD = (PCD)pChip->pData;
/* Reset the queues */
ResetQueues( pChip );
/* Enable the transmit descriptor processor */
WriteWord( OpReg_BMCTL, BMCTL_TxEn );
/* Wait until the transmit descriptor processor is active */
for ( x=0; x<MAXLOOP; x++ )
{
DelayInuSec(1);
Status=ReadByte( OpReg_BMSts);
if ( Status & BMSts_TxAct )
break;
}
if ( x == MAXLOOP )
{
EdbgOutputDebugString("the transmit descriptor processor is not active!\n");
return MAC_FAILED;
}
/* Enable the receive descriptor processor */
WriteWord( OpReg_BMCTL, BMCTL_RxEn );
/* Wait until the receive descriptor processor is active */
for ( x=0; x<MAXLOOP; x++ )
{
DelayInuSec(1);
Status=ReadByte( OpReg_BMSts);
if ( Status & BMSts_RxAct ) break;
}
if ( x == MAXLOOP )
{
EdbgOutputDebugString("the receive descriptor processor is not active!\r\n");
return MAC_FAILED;
}
/* Enqueue all the Receive Descriptors to the chip */
WriteDWord(OpReg_RxDEQ, RXDESCCOUNT );
/* Enqueue all the Receive Status entries to the chip */
WriteDWord( OpReg_RxSEQ, RXSTATCOUNT );
/* Use MII registers to reset or initialize the PHY chip? */
// Put some text in here why 10/Full is necessary for external
// loopback mode.
/* If full duplex mode was negotiated by the PHY then set */
/* the MAC FDX bit in the TestCtl register (10 Mbps only?). */
// WriteByte( OpReg_TestCTL, TestCTL_MACFast | TestCTL_MACFDX);
/* if ( Global_test_type == 0 ) //Loopback
{
WriteByte( OpReg_TestCTL, TestCTL_MACFDX);
}
*/
/* Initialize the Transmit Control register */
/* WriteByte( OpReg_TxCTL, TxCTL_SerTxON | TxCTL_InhibitCRC);*/
WriteByte( OpReg_TxCTL, TxCTL_SerTxON );
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