📄 niscope.h
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#define NISCOPE_ATTR_FETCH_NUM_RECORDS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 80L) /* ViInt32 */
#define NISCOPE_ATTR_FETCH_MEAS_NUM_SAMPLES (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 81L) /* ViInt32 */
#define NISCOPE_ATTR_POINTS_DONE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 82L) /* ViReal64 */
#define NISCOPE_ATTR_RECORDS_DONE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 83L) /* ViInt32 */
#define NISCOPE_ATTR_BACKLOG (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 84L) /* ViReal64 */
#define NISCOPE_ATTR_5102_ADJUST_PRETRIGGER_SAMPLES (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 85L) /* ViBoolean */
#define NISCOPE_ATTR_POLL_INTERVAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 100L) /* ViInt32 */
/*- Attributes for the 5620 Digital Down Converter -*/
#define NISCOPE_ATTR_DDC_NCO_FREQUENCY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1000) /* ViReal64 */
#define NISCOPE_ATTR_DDC_NCO_PHASE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1001) /* ViReal64 */
#define NISCOPE_ATTR_DDC_ENABLE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1003) /* ViBoolean */
#define NISCOPE_ATTR_DDC_CIC_DECIMATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1010) /* ViInt32 */
#define NISCOPE_ATTR_DDC_CIC_SHIFT_GAIN (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1011) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1020) /* ViBoolean */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_FIR_DECIMATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1021) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_FIR_SYMMETRY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1022) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_FIR_SYMMETRY_TYPE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1023) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_FIR_NUM_TAPS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1024) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_DELAY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1025) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_FIR_INPUT_SOURCE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1026) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DISCRIMINATOR_PHASE_MULTIPLIER (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1027) /* ViInt32 */
#define NISCOPE_ATTR_DDC_PFIR_DECIMATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1030) /* ViInt32 */
#define NISCOPE_ATTR_DDC_PFIR_SYMMETRY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1031) /* ViInt32 */
#define NISCOPE_ATTR_DDC_PFIR_SYMMETRY_TYPE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1032) /* ViInt32 */
#define NISCOPE_ATTR_DDC_PFIR_NUM_TAPS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1033) /* ViInt32 */
#define NISCOPE_ATTR_DDC_PFIR_REAL_OR_COMPLEX (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1034) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_UPPER_GAIN_LIMIT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1040) /* ViReal64 */
#define NISCOPE_ATTR_DDC_AGC_LOWER_GAIN_LIMIT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1041) /* ViReal64 */
#define NISCOPE_ATTR_DDC_AGC_LOOP_GAIN_0_EXPONENT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1042) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_LOOP_GAIN_0_MANTISSA (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1043) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_LOOP_GAIN_1_EXPONENT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1044) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_LOOP_GAIN_1_MANTISSA (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1045) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_THRESHOLD (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1046) /* ViInt32 */
#define NISCOPE_ATTR_DDC_AGC_AVERAGE_CONTROL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1047) /* ViInt32 */
#define NISCOPE_ATTR_DDC_HALFBAND_BYPASSED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1050) /* ViBoolean */
#define NISCOPE_ATTR_DDC_HALFBAND_1_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1051) /* ViBoolean */
#define NISCOPE_ATTR_DDC_HALFBAND_2_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1052) /* ViBoolean */
#define NISCOPE_ATTR_DDC_HALFBAND_3_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1053) /* ViBoolean */
#define NISCOPE_ATTR_DDC_HALFBAND_4_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1054) /* ViBoolean */
#define NISCOPE_ATTR_DDC_HALFBAND_5_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1055) /* ViBoolean */
#define NISCOPE_ATTR_DDC_AOUT_PARALLEL_OUTPUT_SOURCE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1070) /* ViInt32 */
#define NISCOPE_ATTR_DDC_BOUT_PARALLEL_OUTPUT_SOURCE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1071) /* ViInt32 */
#define NISCOPE_ATTR_DDC_TEST_SINE_COSINE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1072) /* ViBoolean */
#define NISCOPE_ATTR_DDC_COORDINATE_CONVERTER_INPUT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1073) /* ViInt32 */
#define NISCOPE_ATTR_DDC_Q_INPUT_TO_COORD_CONVERTER_INPUT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1074) /* ViInt32 */
#define NISCOPE_ATTR_DDC_SYNCOUT_CLK_SELECT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1080) /* ViInt32 */
#define NISCOPE_ATTR_DDC_TIMING_NCO_PHASE_ACCUM_LOAD (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1120) /* ViBoolean */
#define NISCOPE_ATTR_DDC_TIMING_NCO_CLEAR_PHASE_ACCUM (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1121) /* ViBoolean */
#define NISCOPE_ATTR_DDC_TIMING_NCO_ENABLE_OFFSET_FREQ (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1122) /* ViBoolean */
#define NISCOPE_ATTR_DDC_TIMING_NCO_NUM_OFFSET_FREQ_BITS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1123) /* ViInt32 */
#define NISCOPE_ATTR_DDC_TIMING_NCO_CENTER_FREQUENCY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1124) /* ViInt32 */
#define NISCOPE_ATTR_DDC_TIMING_NCO_PHASE_OFFSET (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1125) /* ViInt32 */
#define NISCOPE_ATTR_DDC_RESAMPLER_FILTER_MODE_SELECT (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1126) /* ViInt32 */
#define NISCOPE_ATTR_DDC_RESAMPLER_BYPASS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1127) /* ViBoolean */
#define NISCOPE_ATTR_DDC_RESAMPLER_OUTPUT_PULSE_DELAY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1128) /* ViInt32 */
#define NISCOPE_ATTR_DDC_NCO_DIVIDE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1129) /* ViInt32 */
#define NISCOPE_ATTR_DDC_REFERENCE_DIVIDE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1130) /* ViInt32 */
#define NISCOPE_ATTR_ENABLE_DITHER (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1300) /* ViBoolean */
#define NISCOPE_ATTR_DDC_COMBINED_DECIMATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1301) /* ViInt32 */
#define NISCOPE_ATTR_SERIAL_DAC_CAL_VOLTAGE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1302) /* ViReal64 */
#define NISCOPE_ATTR_PLL_LOCK_STATUS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1303) /* ViBoolean */
#define NISCOPE_ATTR_DELAY_BEFORE_INITIATE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1304) /* ViReal64 */
#define NISCOPE_ATTR_DDC_DIRECT_REGISTER_ADDRESS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1305) /* ViInt32 */
#define NISCOPE_ATTR_DDC_DIRECT_REGISTER_DATA (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 1306) /* ViInt32 */
/* New attributes for NI-SCOPE 2.5 */
#define NISCOPE_ATTR_DEVICE_TEMPERATURE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 86) /* ViReal64 */
#define NISCOPE_ATTR_SAMP_CLK_TIMEBASE_SRC (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 87) /* ViString */
#define NISCOPE_ATTR_SAMP_CLK_TIMEBASE_RATE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 88) /* ViReal64 */
#define NISCOPE_ATTR_SAMP_CLK_TIMEBASE_DIV (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 89) /* ViInt32 */
#define NISCOPE_ATTR_REF_CLK_RATE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 90) /* ViReal64 */
#define NISCOPE_ATTR_EXPORTED_SAMPLE_CLOCK_OUTPUT_TERMINAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 91) /* ViString */
#define NISCOPE_ATTR_DAQMX_TASK (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 92) /* ViInt32 */
#define NISCOPE_ATTR_ENABLE_DC_RESTORE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 93) /* ViBoolean */
#define NISCOPE_ATTR_ADV_TRIG_SRC (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 94) /* ViString */
#define NISCOPE_ATTR_ARM_REF_TRIG_SRC (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 95) /* ViString */
#define NISCOPE_ATTR_REF_TRIG_TDC_ENABLE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 96) /* ViBoolean */
#define NISCOPE_ATTR_RESOLUTION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 102) /* ViInt32, read-only */
/* New attributes for NI-SCOPE 2.6 */
#define NISCOPE_ATTR_START_TO_REF_TRIGGER_HOLDOFF (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 103) /* ViReal64, seconds */
/* New attributes for NI-SCOPE 2.7 */
#define NISCOPE_ATTR_SERIAL_NUMBER (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 104) /* ViString */
#define NISCOPE_ATTR_OSCILLATOR_PHASE_DAC_VALUE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 105) /* ViInt32 */
/* New attributes for NI-SCOPE 2.8 */
#define NISCOPE_ATTR_RIS_IN_AUTO_SETUP_ENABLE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 106) /* ViBoolean */
#define NISCOPE_ATTR_CHANNEL_TERMINAL_CONFIGURATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 107) /* ViInt32, multi channel */
#define NISCOPE_ATTR_EXPORTED_ADVANCE_TRIGGER_OUTPUT_TERMINAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 109) /* ViString */
#define NISCOPE_ATTR_READY_FOR_START_EVENT_OUTPUT_TERMINAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 110) /* ViString */
#define NISCOPE_ATTR_READY_FOR_REF_EVENT_OUTPUT_TERMINAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 111) /* ViString */
#define NISCOPE_ATTR_READY_FOR_ADVANCE_EVENT_OUTPUT_TERMINAL (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 112) /* ViString */
/* New attributes for NI-SCOPE 2.9.1 */
#define NISCOPE_ATTR_FLEX_FIR_ANTIALIAS_FILTER_TYPE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 271) /* ViInt32, multi channel */
/* New attributes for NI-SCOPE 3.0. Attributes for the NI 5142 OSP functionality. */
#define NISCOPE_ATTR_DDC_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 300) /* ViBoolean, multi channel */
#define NISCOPE_ATTR_DDC_FREQUENCY_TRANSLATION_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 302) /* ViBoolean, multi channel */
#define NISCOPE_ATTR_DDC_CENTER_FREQUENCY (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 303) /* ViReal64, multi channel */
#define NISCOPE_ATTR_DDC_DATA_PROCESSING_MODE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 304) /* ViInt32 */
#define NISCOPE_ATTR_DDC_FREQUENCY_TRANSLATION_PHASE_I (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 305) /* ViReal64, multi channel */
#define NISCOPE_ATTR_DDC_FREQUENCY_TRANSLATION_PHASE_Q (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 306) /* ViReal64, multi channel */
#define NISCOPE_ATTR_DIGITAL_GAIN (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 307) /* ViReal64, multi channel */
#define NISCOPE_ATTR_DIGITAL_OFFSET (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 308) /* ViReal64, multi channel */
#define NISCOPE_ATTR_OVERFLOW_ERROR_REPORTING (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 309) /* ViInt32 */
#define NISCOPE_ATTR_DDC_Q_SOURCE (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 310) /* ViInt32, multi channel */
#define NISCOPE_ATTR_FETCH_INTERLEAVED_IQ_DATA (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 311) // ViBoolean //
/* New attributes for NI-SCOPE 3.1. */
#define NISCOPE_ATTR_EQUALIZATION_NUM_COEFFICIENTS (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 312) /* ViInt32, multi channel */
#define NISCOPE_ATTR_EQUALIZATION_FILTER_ENABLED (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 313) /* ViBoolean, multi channel */
#define NISCOPE_ATTR_REF_TRIGGER_DETECTOR_LOCATION (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 314) /* ViInt32 */
#define NISCOPE_ATTR_REF_TRIGGER_MINIMUM_QUIET_TIME (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 315) /* ViReal64 */
/* New attributes for NI-SCOPE 3.2 */
#define NISCOPE_ATTR_ENABLE_TIME_INTERLEAVED_SAMPLING (IVI_SPECIFIC_PUBLIC_ATTR_BASE + 128L) // ViBoolean
/****************************************************************************
*------------------ Attribute and Parameter Value Defines -----------------*
****************************************************************************/
/* RIS Methods */
#define NISCOPE_VAL_RIS_EXACT_NUM_AVERAGES 1
#define NISCOPE_VAL_RIS_MIN_NUM_AVERAGES 2
#define NISCOPE_VAL_RIS_INCOMPLETE 3
#define NISCOPE_VAL_RIS_LIMITED_BIN_WIDTH 5
/* Software Trigger Types */
#define NISCOPE_VAL_SOFTWARE_TRIGGER_START 0L
#define NISCOPE_VAL_SOFTWARE_TRIGGER_ARM_REFERENCE 1L
#define NISCOPE_VAL_SOFTWARE_TRIGGER_REFERENCE 2L
#define NISCOPE_VAL_SOFTWARE_TRIGGER_ADVANCE 3L
/*- NISCOPE_ATTR_VERTICAL_COUPLING Values -*/
#define NISCOPE_VAL_AC IVISCOPE_VAL_AC
#define NISCOPE_VAL_DC 1L
#define NISCOPE_VAL_GND IVISCOPE_VAL_GND
/*- NISCOPE_ATTR_MAX_INPUT_FREQUENCY Values -*/
#define NISCOPE_VAL_BANDWIDTH_FULL -1.0
#define NISCOPE_VAL_BANDWIDTH_DEVICE_DEFAULT 0.0
#define NISCOPE_VAL_20MHZ_BANDWIDTH 20000000.0
#define NISCOPE_VAL_100MHZ_BANDWIDTH 100000000.0
#define NISCOPE_VAL_20MHZ_MAX_INPUT_FREQUENCY 20000000.0
#define NISCOPE_VAL_100MHZ_MAX_INPUT_FREQUENCY 100000000.0
/*- NISCOPE_ATTR_INPUT_IMPEDANCE Values -*/
#define NISCOPE_VAL_50_OHMS IVISCOPE_VAL_50_OHMS /* default */
#define NISCOPE_VAL_75_OHMS IVISCOPE_VAL_75_OHMS
#define NISCOPE_VAL_1_MEG_OHM IVISCOPE_VAL_1_MEG_OHM
/*- NISCOPE_ATTR_TRIGGER_TYPE Values -*/
#define NISCOPE_VAL_EDGE IVISCOPE_VAL_EDGE_TRIGGER
#define NISCOPE_VAL_HYSTERESIS (IVISCOPE_VAL_TRIGGER_TYPE_SPECIFIC_EXT_BASE + 1L)
#define NISCOPE_VAL_DIGITAL (IVISCOPE_VAL_TRIGGER_TYPE_SPECIFIC_EXT_BASE + 2L)
#define NISCOPE_VAL_WINDOW (IVISCOPE_VAL_TRIGGER_TYPE_SPECIFIC_EXT_BASE + 3L)
#define NISCOPE_VAL_SOFTWARE_TRIGGER (IVISCOPE_VAL_TRIGGER_TYPE_SPECIFIC_EXT_BASE + 4L)
#define NISCOPE_VAL_TV_TRIGGER IVISCOPE_VAL_TV_TRIGGER
#define NISCOPE_VAL_IMMEDIATE_TRIGGER IVISCOPE_VAL_IMMEDIATE_TRIGGER
/*- NISCOPE_ATTR_TRIGGER_SOURCE Values -*/
#define NISCOPE_VAL_IMMEDIATE IVISCOPE_VAL_IMMEDIATE
#define NISCOPE_VAL_EXTERNAL IVISCOPE_VAL_EXTERNAL
#define NISCOPE_VAL_SW_TRIG_FUNC IVISCOPE_VAL_SW_TRIG_FUNC
#define NISCOPE_VAL_TTL0 IVISCOPE_VAL_TTL0
#define NISCOPE_VAL_TTL1 IVISCOPE_VAL_TTL1
#define NISCOPE_VAL_TTL2 IVISCOPE_VAL_TTL2
#define NISCOPE_VAL_TTL3 IVISCOPE_VAL_TTL3
#define NISCOPE_VAL_TTL4 IVISCOPE_VAL_TTL4
#define NISCOPE_VAL_TTL5 IVISCOPE_VAL_TTL5
#define NISCOPE_VAL_TTL6 IVISCOPE_VAL_TTL6
#define NISCOPE_VAL_TTL7 IVISCOPE_VAL_TTL7
#define NISCOPE_VAL_ECL0 IVISCOPE_VAL_ECL0 /* Obsolete value */
#define NISCOPE_VAL_ECL1 IVISCOPE_VAL_ECL1 /* Obsolete value */
#define NISCOPE_VAL_PXI_STAR IVISCOPE_VAL_PXI_STAR
#define NISCOPE_VAL_RTSI_0 IVISCOPE_VAL_RTSI_0
#define NISCOPE_VAL_RTSI_1 IVISCOPE_VAL_RTSI_1
#define NISCOPE_VAL_RTSI_2 IVISCOPE_VAL_RTSI_2
#define NISCOPE_VAL_RTSI_3 IVISCOPE_VAL_RTSI_3
#define NISCOPE_VAL_RTSI_4 IVISCOPE_VAL_RTSI_4
#define NISCOPE_VAL_RTSI_5 IVISCOPE_VAL_RTSI_5
#define NISCOPE_VAL_RTSI_6 IVISCOPE_VAL_RTSI_6
#define NISCOPE_VAL_RTSI_7 "VAL_RTSI_7"
#define NISCOPE_VAL_PFI_0 "VAL_PFI_0"
#define NISCOPE_VAL_PFI_1 "VAL_PFI_1"
#define NISCOPE_VAL_PFI_2 "VAL_PFI_2"
/*-NISCOPE_ATTR_RELATIVE_TO Values -*/
#define NISCOPE_VAL_READ_POINTER 388
#define NISCOPE_VAL_PRETRIGGER 477
#define NISCOPE_VAL_NOW 481
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