at91fr.h

AT91fr40162的FLASH读写程序

#ifndef  _AT91FR_
#define  _AT91FR_

#define	U8			unsigned char
#define	U16			unsigned short
#define	U32			unsigned int
#define	REG8		volatile unsigned char
#define	REG16		volatile unsigned short
#define	REG32		volatile unsigned int
#define	VPchar		*(REG8 *)
#define	VPshort		*(REG16 *)
#define	VPint		*(REG32 *)
#define	Pchar		(REG8 *)
#define	Pshort		(REG16 *)
#define	Pint		(REG32 *)

#define FLASH_BASE      (0x01000000)

// EBI User Interface
#define	EBI_BASE		0xFFE00000
#define	EBI_CSR0		(VPint(EBI_BASE))				// Chip Select Register 0
#define	EBI_CSR1		(VPint(EBI_BASE+0x04))		// Chip Select Register 1
#define	EBI_CSR2		(VPint(EBI_BASE+0x08))		// Chip Select Register 2
#define	EBI_CSR3		(VPint(EBI_BASE+0x0C))		// Chip Select Register 3
#define	EBI_CSR4		(VPint(EBI_BASE+0x10))		// Chip Select Register 4
#define	EBI_CSR5		(VPint(EBI_BASE+0x14))		// Chip Select Register 5
#define	EBI_CSR6		(VPint(EBI_BASE+0x18))		// Chip Select Register 6
#define	EBI_CSR7		(VPint(EBI_BASE+0x1C))		// Chip Select Register 7
#define	EBI_RCR			(VPint(EBI_BASE+0x20))		// Remap Control Register
#define	EBI_MCR			(VPint(EBI_BASE+0x24))		// Memory Control Register



#define	EBI_CS1			((unsigned int )0x00400000) //0x400000
#define	wAdd			(Pint(EBI_CS1))		// CPLD
#define	BASE_CS2		((unsigned int )0x00800000)
#define	pCPLD			(Pchar(BASE_CS2))		// CPLD
#define	BASE_CS3		((unsigned int )0x00A00000)
#define	pBCT			(Pchar(BASE_CS3))		// CPLD


#define BCT_CRL 		0x02
#define BCT_CRH 		0x04
#define BCT_CSRL 		0x06
#define BCT_CSRH 		0x08
#define BCT_VRLL 		0x0A
#define BCT_VRLH 		0x0C

#define BCT_CRL_PDS		(1<<3)
#define BCT_CRL_LDS		(1<<2)
#define BCT_CRH_SLM 	(1<<3)
#define BCT_CRH_DCI 	(1<<2)
#define BCT_CSRL_SOCK1	(1<<3)
#define BCT_CSRL_SOCK2	(1<<2)
#define BCT_CSRH_TXDR 	(1<<3)
#define BCT_CSRH_SDOUT 	(1<<2)
#define BCT_VRLL_VRL3 	(1<<3)
#define BCT_VRLL_VRL2 	(1<<2)
#define BCT_VRLL_VRL1 	(1<<1)
#define BCT_VRLL_VRL0 	(1<<0)
#define BCT_VRLH_VRL5 	(1<<3)
#define BCT_VRLH_VRL4 	(1<<2)

#endif