cstartup_flash.s

AT91fr40162的FLASH读写程序

;-----------------------------------------------------------------------------
;- File source          : cstartup_flash.s
;- Object               : 为从FLASH中或RAM中启动程序而编写的程序
;-                      : 该程序将FLASH中的内容加载到RAM中运行
;- Compilation flag     : None
;-
;- 1.0 06/04/00 JPP     : Creation
;- 1.1 18/08/00 JCZ     : Over-comment and optimize
;- 1.2 25/10/00 JPP     : Global for including
;------------------------------------------------------------------------------

;------------------------------------------------------------------------------
;- Area Definition
;-----------------
;- Must be defined as function to put first in the code as it must be mapped
;- at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap.
;------------------------------------------------------------------------------
                AREA        reset, CODE, READONLY, INTERWORK

;------------------------------------------------------------------------------
;- Remove any semihosting support
;--------------------------------
;- The C runtime library is the IO functions provided by the semihosting.
;- They are generally costly in code and unused as the debugger is not 
;- connected to the target. 
;- Must be removed if using the embedded C library is used.
;------------------------------------------------------------------------------
;- Define "__main" to ensure that C runtime system is not linked
                EXPORT      __main
__main

;------------------------------------------------------------------------------
;- 定义程序的入口点(Define the entry point)
;------------------------
;- 关于连接地址和地址重映射的说明
;- 为保证生成和地址相关的代码能够正确的运行(ARMLINK无法保证一点生成和地址无关的代码)
;- 在连接程序时必须在进行运行的地址基础上连接程序
;- 因此,-ro-base必须设置为今后程序运行的基地址
;- 由于我们的程序是从FLASH中加载到RAM中运行的,
;- 因此-ro-base 设置为0x0,该地址是Remap后RAM的地址
;- 在本程序中,我们使用0x0作为基地址,该地址是REMAP后的RAM的地址
;------------------------------------------------------------------------------
                ENTRY

;------------------------------------------------------------------------------
;- Exception vectors ( before Remap )
;------------------------------------
;- These vectors are read at address 0 before remap.
;- They absolutely requires to be in relative addresssing mode in order to 
;- guarantee a valid jump. For the moment, all are just looping (what may be 
;- dangerous in a final system). If an exception occurs before remap, this 
;- would result in an infinite loop. 
;- After Remap, these vectors are mapped at address 0x100 0000 and only a 
;- reset (internal or external) can make of them the actual ARM vectors.
;- Note that the infinite loop has advantage that a debugger can to show up 
;- very quickly an hardware issue during the boot sequence.
;------------------------------------------------------------------------------
                B           InitReset       ; reset
undefvec
                B           undefvec        ; Undefined Instruction
swivec
                B           swivec          ; Software Interrupt
pabtvec
                B           pabtvec         ; Prefetch Abort
dabtvec 
                B           dabtvec         ; Data Abort
rsvdvec
                B           rsvdvec         ; reserved
irqvec
                B           irqvec          ; reserved
fiqvec
                B           fiqvec          ; reserved

;------------------------------------------------------------------------------
;- Exception vectors ( after Remap )
;------------------------------------
;- REMAP后,中断向量的地址是地址0
;- 由于中断向量的地址回重定位到地址0,因此,不能使用相对地址,必须使用绝对地址
;- The only possibility to get an absolute 
;- addressing for an ARM vector is to read a PC relative value at a defined
;- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next
;- vectors) for storing the absolute exception handler address. 
;- The AIC vectoring access vectors are saved in the interrupt and fast 
;- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector
;- offset is never used).
;- The provisory handler addresses are defined on infinite loop and can be 
;- modified at any time.
;- Note also that the reset is only accessible by a jump from the application 
;- to 0. It is an actual software reset.
;- As the 13 first location are used by the vectors, the read/write link 
;- address must be defined from 0x34 if internal data mapping is required.
;- (use for that the option -rw- base=0x34
;------------------------------------------------------------------------------
VectorTable
                ldr         pc, [pc, #&18]          ; SoftReset
                ldr         pc, [pc, #&18]          ; UndefHandler
                ldr         pc, [pc, #&18]          ; SWIHandler
                ldr         pc, [pc, #&18]          ; PrefetchAbortHandler
                ldr         pc, [pc, #&18]          ; DataAbortHandler
                nop                                 ; Reserved
                ldr         pc, [pc,#-0xF20]        ; IRQ : read the AIC
                ldr         pc, [pc,#-0xF20]        ; FIQ : read the AIC

;- There are only 5 offsets as the vectoring is used.
                DCD         SoftReset
                DCD         UndefHandler
                DCD         SWIHandler
                DCD         PrefetchAbortHandler
                DCD         DataAbortHandler
;- Vectoring Execution function run at absolut addresss
SoftReset
                b           SoftReset
UndefHandler    
                b           UndefHandler
SWIHandler
                b           SWIHandler
PrefetchAbortHandler
                b           PrefetchAbortHandler
DataAbortHandler
                b           DataAbortHandler

;------------------------------------------------------------------------------
;- EBI Initialization Data
;-------------------------
;- The EBI values depend to target choice , Clock, and memories access time.
;- Yous must be define these values in include file
;- The EBI User Interface Image which is copied by the boot.
;- The EBI_CSR_x are defined in the target and hardware depend.
;- That is hardware! Details in the Electrical Datasheet of the AT91 device.
;- EBI Base Address is added at the end for commodity in copy code.
;------------------------------------------------------------------------------
InitTableEBI
            DCD         0x01002539  		; FLASH EBI_CSR_1			 
            DCD         0x10003021  		; EXT_RAM EBI_CSR_1
            DCD         0x20002003  		; CPLD
            DCD         0x30000000 			; NONE 
            DCD         0x40000000  		; NONE
            DCD         0x50000000  		; NONE
            DCD         0x60000000  		; NONE
            DCD         0x70000000  		;
            DCD         0x00000001  		; REMAP command
            DCD         0x00000017  		; 6 memory regions, 早读
PtEBIBase
            DCD         0xFFE00000    ; EBI Base Address

;------------------------------------------------------------------------------
;- The reset handler before Remap
;--------------------------------
;- From here, the code is executed from address 0. 
;------------------------------------------------------------------------------
InitReset

;------------------------------------------------------------------------------
;- Speed up the Boot sequence
;----------------------------
;- After reset, the number os wait states on chip select 0 is 8. All AT91 
;- Evaluation Boards fits fast flash memories, so that the number of wait 
;- states can be optimized to fast up the boot sequence.
;------------------------------------------------------------------------------
;- Load System EBI Base address and CSR0 Init Value
                ldr     r0, PtEBIBase
                ldr     r1, [pc,#-(8+.-InitTableEBI)] ; values (relative)
    
;- Speed up code execution by disabling wait state on Chip Select 0
                str     r1, [r0]

;------------------------------------------------------------------------------
;- low level init
;--------------------------------
; Call __low_level_init to perform initialization before initializing
; AIC and calling main. 
;----------------------------------------------------------------------

                bl      __low_level_init

;------------------------------------------------------------------------------
;- Reset the Interrupt Controller
;--------------------------------
;- Normally, the code is executed only if a reset has been actually performed.
;- So, the AIC initialization resumes at setting up the default vectors.
;------------------------------------------------------------------------------
;- Load the AIC Base Address and the default handler addresses
                add     r0, pc,#-(8+.-AicData)  ; @ where to read values (relative)

                ldmia   r0, {r1-r4}

;- Setup the Spurious Vector
                str     r4, [r1, #AIC_SPU]      ; r4 = spurious handler

;- Set up the default interrupt handler vectors
                str     r2, [r1, #AIC_SVR]      ; SVR[0] for FIQ
                add     r1, r1, #AIC_SVR
                mov     r0, #31                 ; counter
LoopAic1
                str     r3, [r1, r0, LSL #2]    ; SVRs for IRQs
                subs    r0, r0, #1              ; do not save FIQ
                bhi     LoopAic1

                b       EndInitAic