mux.h

Linux Kernel 2.6.9 for OMAP1710

/* 
 * linux/include/asm-arm/arch-omap2/mux.h
 * 
 * Table of the OMAP2 register configurations for the FUNC_MUX and
 * PULL_DWN combinations.
 *
 * Based on:
 * linux/include/asm-arm/arch-omap/mux.h
 *
 * Copyright (C) 2003 Nokia Corporation
 * Copyright (C) 2004 Texas Instruments, Inc. 
 * 
 * This package is free software; you can redistribute it and/or modify 
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation. 
 * 
 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 
 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 
 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 
 */

#ifndef __ASM_ARM_ARCH_OMAP2_MUX_H
#define __ASM_ARM_ARCH_OMAP2_MUX_H

#include <asm/arch/platform.h>

#define PULL_DISABLED        0
#define PULL_ENABLED         1

#define PULL_DOWN            0
#define PULL_UP              1

#define MUXMODE_MASK         0x7
#define PULL_UD_ENABLE_MASK  (1<<3)
#define PULLTYPE_SELECT_MASK (1<<4)

typedef struct {
	char *name;
	unsigned char busy;
	unsigned char debug;

	const unsigned int pad_config_reg_offset;

	const unsigned char mux_mode;

	const unsigned char pull_val;

	const unsigned char pu_pd_val;
} reg_cfg_set;

/*
 * Lookup table for FUNC_MUX and PULL_DWN register combinations for each
 * device. See also reg_cfg_table below for the register values.
 *
 * H4 board varient defines:
 * -------------------------
 * item = ball, cpu, h4 board function:
 *   ball=ball#,
 *   cpu=2420,2422,242XX=(2420|2422),
 *   I=IP, M=Menelaus
 */
typedef enum {

	T19_242X_IM_KBR0 = 0,
	R19_242X_IM_KBR1,
	V18_242X_IM_KBR2,
	M21_242X_IM_KBR3,
	E5__242X_IM_KBR4,
	M18_2420_I__2422_IM_KBR5,
	B3__2420__M_KBR5,

	R20_242X_IM_KBC0,
	M14_242X_IM_KBC1,
	H19_242X_I_KBC2,
	AA4_242X__M_KBC2,
	V17_242X_IM_KBC3,
	P21_242X_IM_KBC4,
	L14_242X_IM_KBC5,
	N19_2420_I_2422_IM_KBC6,
	B13_2420_M_KBC6,

	K15_2420_UART3_TX,
	K14_2420_UART3_RX,

	H15_2420_MMC_CLKI,
	G19_2420_MMC_CLKO,
	H18_2420_MMC_CMD,
	F20_2420_MMC_DAT,
	F19_2420_MMC_DATDIR,
	G18_2420_MMC_CMDDIR,

	M19_2420_I2C1_SCL,
	L15_2420_I2C1_SDA,

	/* GPIO */
        P14_2420_GPIO125,

	/* USB signals */
	J20_2420_USB0_PUEN,
	J19_2420_USB0_VP,
	K20_2420_USB0_VM,
	J18_2420_USB0_RCV,
	K19_2420_USB0_TXEN,
	J14_2420_USB0_SE0,
	K18_2420_USB0_DAT,
	W19_2420_SYS_NIRQ,
	/* TSC2101 TSC IRQ */
	P20_2420_TSC_IRQ 
} reg_cfg_t;

#ifdef __MUX_C__

/*
 * Table of various FUNC_MUX and PULL_DWN combinations for each device.
 * See also reg_cfg_t above for the lookup table.
 */

/* values for H4-IP board & H4-Menelaus board */
static reg_cfg_set reg_cfg_table[] = {

/*
 *  pin entries   busy  debug  Pad configuration    mux   pullUP/DOWN  pullType
 *  (description)               register offset     mode     enable     Select
 */
	{"T19_242X_IM_KBR0", 0, 1, 0x106, 3, PULL_ENABLED, PULL_UP},
	{"R19_242X_IM_KBR1", 0, 1, 0x107, 3, PULL_ENABLED, PULL_UP},
	{"V18_242X_IM_KBR2", 0, 1, 0x139, 3, PULL_ENABLED, PULL_UP},
	{"M21_242X_IM_KBR3", 0, 1, 0xc9,  3, PULL_ENABLED, PULL_UP},
	{"E5__242X_IM_KBR4",  0, 1, 0x138,  3, PULL_ENABLED, PULL_UP},
	{"M18_2420_I__2422_IM_KBR5", 0, 1, 0x10e, 3, PULL_ENABLED, PULL_UP},
	{"B3__2420__M_KBR5", 0, 1, 0x30, 3, PULL_ENABLED, PULL_UP},

	{"R20_242X_IM_KBC0", 0, 1, 0x108, 3, PULL_DISABLED, PULL_DOWN},
	{"M14_242X_IM_KBC1", 0, 1, 0x109, 3, PULL_DISABLED, PULL_DOWN},
	{"H19_242X_I_KBC2", 0, 1, 0x114, 3, PULL_DISABLED, PULL_DOWN},
	{"AA4_242X__M_KBC2", 0, 1, 0xe7, 3, PULL_DISABLED, PULL_DOWN},
	{"V17_242X_IM_KBC3", 0, 1, 0x135, 3, PULL_DISABLED, PULL_DOWN},
	{"P21_242X_IM_KBC4", 0, 1, 0xca,  3, PULL_DISABLED, PULL_DOWN},
	{"L14_242X_IM_KBC5", 0, 1, 0x10f, 3, PULL_DISABLED, PULL_DOWN},
	{"N19_2420_I_2422_IM_KBC6", 0, 1, 0x110, 3, PULL_DISABLED, PULL_DOWN},
	{"B13_2420_M_KBC6", 0, 1, 0x110, 3, PULL_DISABLED, PULL_DOWN},

	{"K15_2420_UART3_TX", 0, 1, 0x118, 0, PULL_DISABLED, PULL_DOWN},
	{"K14_2420_UART3_RX", 0, 1, 0x119, 0, PULL_DISABLED, PULL_DOWN},
	{"H15_2420_MMC_CLKI", 0, 1, 0x0FE, 0, PULL_DISABLED, PULL_DOWN},
	{"G19_2420_MMC_CLKO", 0, 1, 0x0F3, 0, PULL_DISABLED, PULL_DOWN},
	{"H18_2420_MMC_CMD", 0, 1, 0x0F4, 0, PULL_ENABLED, PULL_UP},
	{"F20_2420_MMC_DAT", 0, 1, 0x0F5, 0, PULL_ENABLED, PULL_UP},
	{"F19_2420_MMC_DATDIR", 0, 1, 0x0F9, 0, PULL_DISABLED, PULL_DOWN},
	{"G18_2420_MMC_CMDDIR", 0, 1, 0x0FD, 0, PULL_DISABLED, PULL_DOWN},

	{"M19_2420_I2C1_SCL", 0, 1, 0x111, 0, PULL_DISABLED, PULL_DOWN},
	{"L15_2420_I2C1_SDA", 0, 1, 0x112, 0, PULL_DISABLED, PULL_DOWN},

	{"P14_2420_GPIO125", 0, 1, 0x138, 2, PULL_ENABLED, PULL_UP},

	{"J20_2420_USB0_PUEN", 0, 1, 0x11d, 0, PULL_DISABLED, PULL_DOWN},
	{"J19_2420_USB0_VP", 0, 1, 0x11e, 0, PULL_DISABLED, PULL_DOWN},
	{"K20_2420_USB0_VM", 0, 1, 0x11f, 0, PULL_DISABLED, PULL_DOWN},
	{"J18_2420_USB0_RCV", 0, 1, 0x120, 0, PULL_DISABLED, PULL_DOWN},
	{"K19_2420_USB0_TXEN", 0, 1, 0x121, 0, PULL_DISABLED, PULL_DOWN},
	{"J14_2420_USB0_SE0", 0, 1, 0x122, 0, PULL_DISABLED, PULL_DOWN},
	{"K18_2420_USB0_DAT", 0, 1, 0x123, 0, PULL_DISABLED, PULL_DOWN},
	{"W19_2420_SYS_NIRQ", 0, 1, 0x12c, 0, PULL_ENABLED, PULL_UP},
	{"P20_2420_TSC_IRQ", 0, 1,0x108,0,PULL_DISABLED, PULL_DOWN}
};

#endif				/* __MUX_C__ */

extern int omap2_cfg_reg(reg_cfg_t reg_cfg);

#endif				/* __ASM_ARM_ARCH_OMAP2_MUX_H */