pgtable.h
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443 行
/* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $ * pgtable.h: SpitFire page table operations. * * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */#ifndef _SPARC64_PGTABLE_H#define _SPARC64_PGTABLE_H/* This file contains the functions and defines necessary to modify and use * the SpitFire page tables. */#include <linux/config.h>#include <asm/spitfire.h>#include <asm/asi.h>#include <asm/system.h>#include <asm/page.h>#include <asm/processor.h>#include <asm/const.h>/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB). * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB). * The PROM resides in an area spanning 0xf0000000 to 0x100000000. * The vmalloc area spans 0x140000000 to 0x200000000. * There is a single static kernel PMD which maps from 0x0 to address * 0x400000000. */#define TLBTEMP_BASE _AC(0x0000000001000000,UL)#define MODULES_VADDR _AC(0x0000000002000000,UL)#define MODULES_LEN _AC(0x000000007e000000,UL)#define MODULES_END _AC(0x0000000080000000,UL)#define VMALLOC_START _AC(0x0000000140000000,UL)#define VMALLOC_END _AC(0x0000000200000000,UL)#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)/* XXX All of this needs to be rethought so we can take advantage * XXX cheetah's full 64-bit virtual address space, ie. no more hole * XXX in the middle like on spitfire. -DaveM *//* * Given a virtual address, the lowest PAGE_SHIFT bits determine offset * into the page; the next higher PAGE_SHIFT-3 bits determine the pte# * in the proper pagetable (the -3 is from the 8 byte ptes, and each page * table is a single page long). The next higher PMD_BITS determine pmd# * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) * since the pmd entries are 4 bytes, and each pmd page is a single page * long). Finally, the higher few bits determine pgde#. *//* PMD_SHIFT determines the size of the area a second-level page * table can map */#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))#define PMD_SIZE (1UL << PMD_SHIFT)#define PMD_MASK (~(PMD_SIZE-1))#define PMD_BITS 11/* PGDIR_SHIFT determines what a third-level page table entry can map */#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)#define PGDIR_SIZE (1UL << PGDIR_SHIFT)#define PGDIR_MASK (~(PGDIR_SIZE-1))#ifndef __ASSEMBLY__#include <linux/sched.h>/* Entries per page directory level. */#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))/* We the first one in this file, what we export to the kernel * is different so we can optimize correctly for 32-bit tasks. */#define REAL_PTRS_PER_PMD (1UL << PMD_BITS)/* This is gross, but unless we do this gcc retests the * thread flag every interation in pmd traversal loops. */extern unsigned long __ptrs_per_pmd(void) __attribute_const__;#define PTRS_PER_PMD __ptrs_per_pmd()/* * We cannot use the top address range because VPTE table lives there. This * formula finds the total legal virtual space in the processor, subtracts the * vpte size, then aligns it to the number of bytes mapped by one pgde, and * thus calculates the number of pgdes needed. */#define PTRS_PER_PGD (((1UL << VA_BITS) - VPTE_SIZE + (1UL << (PAGE_SHIFT + \ (PAGE_SHIFT-3) + PMD_BITS)) - 1) / (1UL << (PAGE_SHIFT + \ (PAGE_SHIFT-3) + PMD_BITS)))/* Kernel has a separate 44bit address space. */#define USER_PTRS_PER_PGD ((const int)(test_thread_flag(TIF_32BIT)) ? \ (1) : (PTRS_PER_PGD))#define FIRST_USER_PGD_NR 0#define pte_ERROR(e) __builtin_trap()#define pmd_ERROR(e) __builtin_trap()#define pgd_ERROR(e) __builtin_trap()#endif /* !(__ASSEMBLY__) *//* Spitfire/Cheetah TTE bits. */#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit up to date*/#define _PAGE_SZ4MB _AC(0x6000000000000000,UL) /* 4MB Page */#define _PAGE_SZ512K _AC(0x4000000000000000,UL) /* 512K Page */#define _PAGE_SZ64K _AC(0x2000000000000000,UL) /* 64K Page */#define _PAGE_SZ8K _AC(0x0000000000000000,UL) /* 8K Page */#define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */#define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */#define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */#define _PAGE_RES1 _AC(0x0003000000000000,UL) /* Reserved */#define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */#define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/#define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr[42:13] */#define _PAGE_SOFT _AC(0x0000000000001F80,UL) /* Software bits */#define _PAGE_L _AC(0x0000000000000040,UL) /* Locked TTE */#define _PAGE_CP _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */#define _PAGE_CV _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */#define _PAGE_E _AC(0x0000000000000008,UL) /* side-Effect */#define _PAGE_P _AC(0x0000000000000004,UL) /* Privileged Page */#define _PAGE_W _AC(0x0000000000000002,UL) /* Writable */#define _PAGE_G _AC(0x0000000000000001,UL) /* Global *//* Here are the SpitFire software bits we use in the TTE's. * * WARNING: If you are going to try and start using some * of the soft2 bits, you will need to make * modifications to the swap entry implementation. * For example, one thing that could happen is that * swp_entry_to_pte() would BUG_ON() if you tried * to use one of the soft2 bits for _PAGE_FILE. * * Like other architectures, I have aliased _PAGE_FILE with * _PAGE_MODIFIED. This works because _PAGE_FILE is never * interpreted that way unless _PAGE_PRESENT is clear. */#define _PAGE_EXEC _AC(0x0000000000001000,UL) /* Executable SW bit */#define _PAGE_MODIFIED _AC(0x0000000000000800,UL) /* Modified (dirty) */#define _PAGE_FILE _AC(0x0000000000000800,UL) /* Pagecache page */#define _PAGE_ACCESSED _AC(0x0000000000000400,UL) /* Accessed (ref'd) */#define _PAGE_READ _AC(0x0000000000000200,UL) /* Readable SW Bit */#define _PAGE_WRITE _AC(0x0000000000000100,UL) /* Writable SW Bit */#define _PAGE_PRESENT _AC(0x0000000000000080,UL) /* Present */#if PAGE_SHIFT == 13#define _PAGE_SZBITS _PAGE_SZ8K#elif PAGE_SHIFT == 16#define _PAGE_SZBITS _PAGE_SZ64K#elif PAGE_SHIFT == 19#define _PAGE_SZBITS _PAGE_SZ512K#elif PAGE_SHIFT == 22#define _PAGE_SZBITS _PAGE_SZ4MB#else#error Wrong PAGE_SHIFT specified#endif#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)#define _PAGE_SZHUGE _PAGE_SZ4MB#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)#define _PAGE_SZHUGE _PAGE_SZ512K#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)#define _PAGE_SZHUGE _PAGE_SZ64K#endif#define _PAGE_CACHE (_PAGE_CP | _PAGE_CV)#define __DIRTY_BITS (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)#define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)#define __PRIV_BITS _PAGE_P#define PAGE_NONE __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE)/* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */#define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ __ACCESS_BITS | _PAGE_WRITE | _PAGE_EXEC)#define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ __ACCESS_BITS | _PAGE_EXEC)#define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ __ACCESS_BITS | _PAGE_EXEC)#define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ __PRIV_BITS | \ __ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC)#define PAGE_SHARED_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ _PAGE_CACHE | \ __ACCESS_BITS | _PAGE_WRITE)#define PAGE_COPY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ _PAGE_CACHE | __ACCESS_BITS)#define PAGE_READONLY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ _PAGE_CACHE | __ACCESS_BITS)#define _PFN_MASK _PAGE_PADDR#define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | \ __ACCESS_BITS | _PAGE_E)#define __P000 PAGE_NONE#define __P001 PAGE_READONLY_NOEXEC#define __P010 PAGE_COPY_NOEXEC#define __P011 PAGE_COPY_NOEXEC#define __P100 PAGE_READONLY#define __P101 PAGE_READONLY#define __P110 PAGE_COPY#define __P111 PAGE_COPY#define __S000 PAGE_NONE#define __S001 PAGE_READONLY_NOEXEC#define __S010 PAGE_SHARED_NOEXEC#define __S011 PAGE_SHARED_NOEXEC#define __S100 PAGE_READONLY#define __S101 PAGE_READONLY#define __S110 PAGE_SHARED
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