io.h

来自「Linux Kernel 2.6.9 for OMAP1710」· C头文件 代码 · 共 626 行 · 第 1/2 页

	____raw_writeq(val, addr);					\
	local_irq_restore(__flags);					\
})
#endif
#ifdef CONFIG_MIPS64
#define ____raw_writeq(q,addr)	((*(volatile unsigned long *)(addr)) = (q))
#define __raw_writeq(q,addr)	____raw_writeq(q, addr)
#endif

#define writeb(b,addr)		__raw_writeb(__ioswab8(b),(addr))
#define writew(w,addr)		__raw_writew(__ioswab16(w),(addr))
#define writel(l,addr)		__raw_writel(__ioswab32(l),(addr))
#define writeq(q,addr)		__raw_writeq(__ioswab64(q),(addr))

#define memset_io(a,b,c)	memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))

/*
 * ISA space is 'always mapped' on currently supported MIPS systems, no need
 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 * are physical addresses. The following constant pointer can be
 * used as the IO-area pointer (it can be iounmapped as well, so the
 * analogy with PCI is quite large):
 */
#define __ISA_IO_base ((char *)(isa_slot_offset))

#define isa_readb(a)		readb(__ISA_IO_base + (a))
#define isa_readw(a)		readw(__ISA_IO_base + (a))
#define isa_readl(a)		readl(__ISA_IO_base + (a))
#define isa_readq(a)		readq(__ISA_IO_base + (a))
#define isa_writeb(b,a)		writeb(b,__ISA_IO_base + (a))
#define isa_writew(w,a)		writew(w,__ISA_IO_base + (a))
#define isa_writel(l,a)		writel(l,__ISA_IO_base + (a))
#define isa_writeq(q,a)		writeq(q,__ISA_IO_base + (a))
#define isa_memset_io(a,b,c)	memset_io(__ISA_IO_base + (a),(b),(c))
#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
#define isa_memcpy_toio(a,b,c)	memcpy_toio(__ISA_IO_base + (a),(b),(c))

/*
 * We don't have csum_partial_copy_fromio() yet, so we cheat here and
 * just copy it. The net code will then do the checksum later.
 */
#define eth_io_copy_and_sum(skb,src,len,unused) memcpy_fromio((skb)->data,(src),(len))
#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(b),(c),(d))

/*
 *     check_signature         -       find BIOS signatures
 *     @io_addr: mmio address to check
 *     @signature:  signature block
 *     @length: length of signature
 *
 *     Perform a signature comparison with the mmio address io_addr. This
 *     address should have been obtained by ioremap.
 *     Returns 1 on a match.
 */
static inline int check_signature(unsigned long io_addr,
	const unsigned char *signature, int length)
{
	int retval = 0;
	do {
		if (readb(io_addr) != *signature)
			goto out;
		io_addr++;
		signature++;
		length--;
	} while (length);
	retval = 1;
out:
	return retval;
}

/*
 *     isa_check_signature             -       find BIOS signatures
 *     @io_addr: mmio address to check
 *     @signature:  signature block
 *     @length: length of signature
 *
 *     Perform a signature comparison with the ISA mmio address io_addr.
 *     Returns 1 on a match.
 *
 *     This function is deprecated. New drivers should use ioremap and
 *     check_signature.
 */
#define isa_check_signature(io, s, l)	check_signature(i,s,l)

static inline void __outb(unsigned char val, unsigned long port)
{
	port = __swizzle_addr_b(port);

	*(volatile u8 *)(mips_io_port_base + port) = __ioswab8(val);
}

static inline void __outw(unsigned short val, unsigned long port)
{
	port = __swizzle_addr_w(port);

	*(volatile u16 *)(mips_io_port_base + port) = __ioswab16(val);
}

static inline void __outl(unsigned int val, unsigned long port)
{
	port = __swizzle_addr_l(port);

	*(volatile u32 *)(mips_io_port_base + port) = __ioswab32(val);
}

static inline void __outb_p(unsigned char val, unsigned long port)
{
	port = __swizzle_addr_b(port);

	*(volatile u8 *)(mips_io_port_base + port) = __ioswab8(val);
	SLOW_DOWN_IO;
}

static inline void __outw_p(unsigned short val, unsigned long port)
{
	port = __swizzle_addr_w(port);

	*(volatile u16 *)(mips_io_port_base + port) = __ioswab16(val);
	SLOW_DOWN_IO;
}

static inline void __outl_p(unsigned int val, unsigned long port)
{
	port = __swizzle_addr_l(port);

	*(volatile u32 *)(mips_io_port_base + port) = __ioswab32(val);
	SLOW_DOWN_IO;
}

#define outb(val, port)		__outb(val, port)
#define outw(val, port)		__outw(val, port)
#define outl(val, port)		__outl(val, port)
#define outb_p(val, port)	__outb_p(val, port)
#define outw_p(val, port)	__outw_p(val, port)
#define outl_p(val, port)	__outl_p(val, port)

static inline unsigned char __inb(unsigned long port)
{
	port = __swizzle_addr_b(port);

	return __ioswab8(*(volatile u8 *)(mips_io_port_base + port));
}

static inline unsigned short __inw(unsigned long port)
{
	port = __swizzle_addr_w(port);

	return __ioswab16(*(volatile u16 *)(mips_io_port_base + port));
}

static inline unsigned int __inl(unsigned long port)
{
	port = __swizzle_addr_l(port);

	return __ioswab32(*(volatile u32 *)(mips_io_port_base + port));
}

static inline unsigned char __inb_p(unsigned long port)
{
	u8 __val;

	port = __swizzle_addr_b(port);

	__val = *(volatile u8 *)(mips_io_port_base + port);
	SLOW_DOWN_IO;

	return __ioswab8(__val);
}

static inline unsigned short __inw_p(unsigned long port)
{
	u16 __val;

	port = __swizzle_addr_w(port);

	__val = *(volatile u16 *)(mips_io_port_base + port);
	SLOW_DOWN_IO;

	return __ioswab16(__val);
}

static inline unsigned int __inl_p(unsigned long port)
{
	u32 __val;

	port = __swizzle_addr_l(port);

	__val = *(volatile u32 *)(mips_io_port_base + port);
	SLOW_DOWN_IO;

	return __ioswab32(__val);
}

#define inb(port)	__inb(port)
#define inw(port)	__inw(port)
#define inl(port)	__inl(port)
#define inb_p(port)	__inb_p(port)
#define inw_p(port)	__inw_p(port)
#define inl_p(port)	__inl_p(port)

static inline void __outsb(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		outb(*(u8 *)addr, port);
		addr++;
	}
}

static inline void __insb(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		*(u8 *)addr = inb(port);
		addr++;
	}
}

static inline void __outsw(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		outw(*(u16 *)addr, port);
		addr += 2;
	}
}

static inline void __insw(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		*(u16 *)addr = inw(port);
		addr += 2;
	}
}

static inline void __outsl(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		outl(*(u32 *)addr, port);
		addr += 4;
	}
}

static inline void __insl(unsigned long port, void *addr, unsigned int count)
{
	while (count--) {
		*(u32 *)addr = inl(port);
		addr += 4;
	}
}

#define outsb(port, addr, count)	__outsb(port, addr, count)
#define insb(port, addr, count)		__insb(port, addr, count)
#define outsw(port, addr, count)	__outsw(port, addr, count)
#define insw(port, addr, count)		__insw(port, addr, count)
#define outsl(port, addr, count)	__outsl(port, addr, count)
#define insl(port, addr, count)		__insl(port, addr, count)

/*
 * The caches on some architectures aren't dma-coherent and have need to
 * handle this in software.  There are three types of operations that
 * can be applied to dma buffers.
 *
 *  - dma_cache_wback_inv(start, size) makes caches and coherent by
 *    writing the content of the caches back to memory, if necessary.
 *    The function also invalidates the affected part of the caches as
 *    necessary before DMA transfers from outside to memory.
 *  - dma_cache_wback(start, size) makes caches and coherent by
 *    writing the content of the caches back to memory, if necessary.
 *    The function also invalidates the affected part of the caches as
 *    necessary before DMA transfers from outside to memory.
 *  - dma_cache_inv(start, size) invalidates the affected parts of the
 *    caches.  Dirty lines of the caches may be written back or simply
 *    be discarded.  This operation is necessary before dma operations
 *    to the memory.
 */
#ifdef CONFIG_DMA_NONCOHERENT

extern void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
extern void (*_dma_cache_wback)(unsigned long start, unsigned long size);
extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);

#define dma_cache_wback_inv(start, size)	_dma_cache_wback_inv(start,size)
#define dma_cache_wback(start, size)		_dma_cache_wback(start,size)
#define dma_cache_inv(start, size)		_dma_cache_inv(start,size)

#else /* Sane hardware */

#define dma_cache_wback_inv(start,size)	\
	do { (void) (start); (void) (size); } while (0)
#define dma_cache_wback(start,size)	\
	do { (void) (start); (void) (size); } while (0)
#define dma_cache_inv(start,size)	\
	do { (void) (start); (void) (size); } while (0)

#endif /* CONFIG_DMA_NONCOHERENT */

/*
 * Read a 32-bit register that requires a 64-bit read cycle on the bus.
 * Avoid interrupt mucking, just adjust the address for 4-byte access.
 * Assume the addresses are 8-byte aligned.
 */
#ifdef __MIPSEB__
#define __CSR_32_ADJUST 4
#else
#define __CSR_32_ADJUST 0
#endif

#define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
#define csr_in32(a)    (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))

#endif /* _ASM_IO_H */