io.h
来自「Linux Kernel 2.6.9 for OMAP1710」· C头文件 代码 · 共 423 行 · 第 1/2 页
H
423 行
__asm__ __volatile__( \ "ldrb %0, [%1, %2] @ inbc" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldrb %0, [%1, %2] @ inbc" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result; \})#define __outwc(value,port) \({ \ unsigned long v = value; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "str %0, [%1, %2] @ outwc" \ : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "str %0, [%1, %2] @ outwc" \ : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \})#define __inwc(port) \({ \ unsigned short result; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "ldr %0, [%1, %2] @ inwc" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldr %0, [%1, %2] @ inwc" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result & 0xffff; \})#define __outlc(value,port) \({ \ unsigned long v = value; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "str %0, [%1, %2] @ outlc" \ : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "str %0, [%1, %2] @ outlc" \ : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \})#define __inlc(port) \({ \ unsigned long result; \ if (__PORT_PCIO((port))) \ __asm__ __volatile__( \ "ldr %0, [%1, %2] @ inlc" \ : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ else \ __asm__ __volatile__( \ "ldr %0, [%1, %2] @ inlc" \ : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ result; \})#define __ioaddrc(port) \({ \ unsigned long addr; \ if (__PORT_PCIO((port))) \ addr = PCIO_BASE + ((port) << 2); \ else \ addr = IO_BASE + ((port) << 2); \ addr; \})#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))/* JMA 18.02.03 added sb,sl from arm/io.h, changing io to ioaddr */#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)#define insl(p,d,l) __raw_readsl(__ioaddr(p),d,l)#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)#define readb(c) (__readwrite_bug("readb"),0)#define readw(c) (__readwrite_bug("readw"),0)#define readl(c) (__readwrite_bug("readl"),0)#define readb_relaxed(addr) readb(addr)#define readw_relaxed(addr) readw(addr)#define readl_relaxed(addr) readl(addr)#define writeb(v,c) __readwrite_bug("writeb")#define writew(v,c) __readwrite_bug("writew")#define writel(v,c) __readwrite_bug("writel")#define readsw(p,d,l) (__readwrite_bug("readsw"),0)#define readsl(p,d,l) (__readwrite_bug("readsl"),0)#define writesw(p,d,l) __readwrite_bug("writesw")#define writesl(p,d,l) __readwrite_bug("writesl")/* the following macro is depreciated */#define ioaddr(port) __ioaddr((port))/* * No ioremap support here. */#define __arch_ioremap(c,s,f,a) ((void *)(c))#define __arch_iounmap(c) do { } while (0)#if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \ defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)#warning machine class uses old __arch_putw or __arch_getw#endif/* * IO port access primitives * ------------------------- * * The ARM doesn't have special IO access instructions; all IO is memory * mapped. Note that these are defined to perform little endian accesses * only. Their primary purpose is to access PCI and ISA peripherals. * * Note that for a big endian machine, this implies that the following * big endian mode connectivity is in place, as described by numerious * ARM documents: * * PCI: D0-D7 D8-D15 D16-D23 D24-D31 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 * * The machine specific io.h include defines __io to translate an "IO" * address to a memory address. * * Note that we prevent GCC re-ordering or caching values in expressions * by introducing sequence points into the in*() definitions. Note that * __raw_* do not guarantee this behaviour. *//*#define outsb(p,d,l) __raw_writesb(__io(p),d,l)#define outsw(p,d,l) __raw_writesw(__io(p),d,l)#define insb(p,d,l) __raw_readsb(__io(p),d,l)#define insw(p,d,l) __raw_readsw(__io(p),d,l)*/#define outb_p(val,port) outb((val),(port))#define outw_p(val,port) outw((val),(port))#define inb_p(port) inb((port))#define inw_p(port) inw((port))#define inl_p(port) inl((port))#define outsb_p(port,from,len) outsb(port,from,len)#define outsw_p(port,from,len) outsw(port,from,len)#define insb_p(port,to,len) insb(port,to,len)#define insw_p(port,to,len) insw(port,to,len)/* * String version of IO memory access ops: */extern void _memcpy_fromio(void *, unsigned long, size_t);extern void _memcpy_toio(unsigned long, const void *, size_t);extern void _memset_io(unsigned long, int, size_t);/* * ioremap and friends. * * ioremap takes a PCI memory address, as specified in * Documentation/IO-mapping.txt. */extern void * __ioremap(unsigned long, size_t, unsigned long, unsigned long);extern void __iounmap(void *addr);#ifndef __arch_ioremap#define ioremap(cookie,size) __ioremap(cookie,size,0,1)#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)#define iounmap(cookie) __iounmap(cookie)#else#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)#define iounmap(cookie) __arch_iounmap(cookie)#endif/* * DMA-consistent mapping functions. These allocate/free a region of * uncached, unwrite-buffered mapped memory space for use with DMA * devices. This is the "generic" version. The PCI specific version * is in pci.h */extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);extern void consistent_sync(void *vaddr, size_t size, int rw);/* * can the hardware map this into one segment or not, given no other * constraints. */#define BIOVEC_MERGEABLE(vec1, vec2) \ ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))#endif /* __KERNEL__ */#endif /* __ASM_ARM_IO_H */⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?