lcdc.h

Linux Kernel 2.6.9 for OMAP1710

/*
 * linux/include/asm-arm/arch-omap/lcdc.h
 *
 * OMAP LCD controller
 * 
 * Copyright (C) 2004 Nokia Corporation
 * Author: Imre Deak <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */					

#ifndef __ASM_ARCH_LCDC_H
#define __ASM_ARCH_LCDC_H

#define OMAP_LCDC_BASE			0xfffec000
#define OMAP_LCDC_SIZE			256
#define OMAP_LCDC_IRQ			INT_LCD_CTRL

#define OMAP_LCDC_CONTROL		(OMAP_LCDC_BASE + 0x00)
#define OMAP_LCDC_TIMING0		(OMAP_LCDC_BASE + 0x04)
#define OMAP_LCDC_TIMING1		(OMAP_LCDC_BASE + 0x08)
#define OMAP_LCDC_TIMING2		(OMAP_LCDC_BASE + 0x0c)
#define OMAP_LCDC_STATUS		(OMAP_LCDC_BASE + 0x10)
#define OMAP_LCDC_SUBPANEL		(OMAP_LCDC_BASE + 0x14)
#define OMAP_LCDC_LINE_INT		(OMAP_LCDC_BASE + 0x18)
#define OMAP_LCDC_DISPLAY_STATUS	(OMAP_LCDC_BASE + 0x1c)

#define OMAP_LCDC_STAT_DONE		(1 << 0)
#define OMAP_LCDC_STAT_VSYNC		(1 << 1)
#define OMAP_LCDC_STAT_SYNC_LOST	(1 << 2)
#define OMAP_LCDC_STAT_ABC		(1 << 3)
#define OMAP_LCDC_STAT_LINE_INT		(1 << 4)
#define OMAP_LCDC_STAT_FUF		(1 << 5)
#define OMAP_LCDC_STAT_LOADED_PALETTE	(1 << 6)

#define OMAP_LCDC_CTRL_LCD_EN		(1 << 0)
#define OMAP_LCDC_CTRL_LCD_TFT		(1 << 7)
#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL	(1 << 10)

#define OMAP_LCDC_IRQ_VSYNC		(1 << 2)
#define OMAP_LCDC_IRQ_DONE		(1 << 3)
#define OMAP_LCDC_IRQ_LOADED_PALETTE	(1 << 4)
#define OMAP_LCDC_IRQ_LINE_NIRQ		(1 << 5)
#define OMAP_LCDC_IRQ_LINE		(1 << 6)
#define OMAP_LCDC_IRQ_MASK		(((1 << 5) - 1) << 2)

#define OMAP_LCDC_INV_VSYNC		0x01
#define OMAP_LCDC_INV_HSYNC		0x02
#define OMAP_LCDC_INV_PIX_CLOCK		0x04
#define OMAP_LCDC_INV_OUTPUT_EN		0x08
#define OMAP_LCDC_HSVS_RISING_EDGE	0x10
#define OMAP_LCDC_HSVS_OPPOSITE		0x20

enum lcdc_load_mode {
	OMAP_LCDC_LOAD_PALETTE,
	OMAP_LCDC_LOAD_FRAME,
	OMAP_LCDC_LOAD_PALETTE_AND_FRAME
};

struct lcdc_video_mode {
        u16	x_res, y_res;
        u32	pixel_clock;	/* In kHz */
	int	bpp;
        u8	hsw;		/* Horizontal synchronization pulse width */
        u8	hfp;		/* Horizontal front porch */
        u8	hbp;		/* Horizontal back porch */
        u8	vsw;		/* Vertical synchronization pulse width */
        u8	vfp;		/* Vertical front porch */
        u8	vbp;		/* Vertical back porch */
        u8	acb;		/* ac-bias pin frequency */
        u8	pcd;		/* Pixel clock divider (this will change) */
};

typedef void (*lcdc_irq_handler_t)(u32 status, unsigned long data);

int  omap_lcdc_request		(void *devid, lcdc_irq_handler_t handler,
				 unsigned long handler_data);
void omap_lcdc_release		(void *devid);
void omap_lcdc_set_config	(int tft, int signal_levels);
void omap_lcdc_set_video_mode	(struct lcdc_video_mode *mode);
void omap_lcdc_set_load_mode	(enum lcdc_load_mode load_mode);
void omap_lcdc_set_line_irq	(int line);
void omap_lcdc_init_palette	(struct lcdc_video_mode *mode,
				 void *palette, int size);
void omap_lcdc_enable_irqs	(int mask);
void omap_lcdc_disable_irqs	(int mask);
int  omap_lcdc_get_palette_size	(struct lcdc_video_mode *mode);
void omap_lcdc_enable		(void);
void omap_lcdc_disable		(void);
void omap_lcdc_disable_async	(void);

int  omap_lcdc_init		(void);
void omap_lcdc_cleanup		(void);

#endif	/* __ASM_ARCH_LCDC_H */