amba-pl010.c
来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 827 行 · 第 1/2 页
C
827 行
/* * linux/drivers/char/amba.c * * Driver for AMBA serial ports * * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. * * Copyright 1999 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $ * * This is a generic driver for ARM AMBA-type serial ports. They * have a lot of 16550-like features, but are not register compatible. * Note that although they do have CTS, DCD and DSR inputs, they do * not have an RI input, nor do they have DTR or RTS outputs. If * required, these have to be supplied via some other means (eg, GPIO) * and hooked into this driver. */#include <linux/config.h>#include <linux/module.h>#include <linux/tty.h>#include <linux/ioport.h>#include <linux/init.h>#include <linux/serial.h>#include <linux/console.h>#include <linux/sysrq.h>#include <linux/device.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/hardware/amba.h>#if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)#define SUPPORT_SYSRQ#endif#include <linux/serial_core.h>#include <asm/hardware/amba_serial.h>#define UART_NR 2#define SERIAL_AMBA_MAJOR 204#define SERIAL_AMBA_MINOR 16#define SERIAL_AMBA_NR UART_NR#define AMBA_ISR_PASS_LIMIT 256/* * Access macros for the AMBA UARTs */#define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)#define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)#define UART_GET_FR(p) readb((p)->membase + UART01x_FR)#define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)#define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)#define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)#define UART_GET_CR(p) readb((p)->membase + UART010_CR)#define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)#define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)#define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)#define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)#define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)#define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)#define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)#define UART_DUMMY_RSR_RX /*256*/0#define UART_PORT_SIZE 64/* * On the Integrator platform, the port RTS and DTR are provided by * bits in the following SC_CTRLS register bits: * RTS DTR * UART0 7 6 * UART1 5 4 */#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)/* * We wrap our port structure around the generic uart_port. */struct uart_amba_port { struct uart_port port; unsigned int dtr_mask; unsigned int rts_mask; unsigned int old_status;};static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop){ unsigned int cr; cr = UART_GET_CR(port); cr &= ~UART010_CR_TIE; UART_PUT_CR(port, cr);}static void pl010_start_tx(struct uart_port *port, unsigned int tty_start){ unsigned int cr; cr = UART_GET_CR(port); cr |= UART010_CR_TIE; UART_PUT_CR(port, cr);}static void pl010_stop_rx(struct uart_port *port){ unsigned int cr; cr = UART_GET_CR(port); cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); UART_PUT_CR(port, cr);}static void pl010_enable_ms(struct uart_port *port){ unsigned int cr; cr = UART_GET_CR(port); cr |= UART010_CR_MSIE; UART_PUT_CR(port, cr);}static void#ifdef SUPPORT_SYSRQpl010_rx_chars(struct uart_port *port, struct pt_regs *regs)#elsepl010_rx_chars(struct uart_port *port)#endif{ struct tty_struct *tty = port->info->tty; unsigned int status, ch, rsr, max_count = 256; status = UART_GET_FR(port); while (UART_RX_DATA(status) && max_count--) { if (tty->flip.count >= TTY_FLIPBUF_SIZE) { tty->flip.work.func((void *)tty); if (tty->flip.count >= TTY_FLIPBUF_SIZE) { printk(KERN_WARNING "TTY_DONT_FLIP set\n"); return; } } ch = UART_GET_CHAR(port); *tty->flip.char_buf_ptr = ch; *tty->flip.flag_buf_ptr = TTY_NORMAL; port->icount.rx++; /* * Note that the error handling code is * out of the main execution path */ rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX; if (rsr & UART01x_RSR_ANY) { if (rsr & UART01x_RSR_BE) { rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); port->icount.brk++; if (uart_handle_break(port)) goto ignore_char; } else if (rsr & UART01x_RSR_PE) port->icount.parity++; else if (rsr & UART01x_RSR_FE) port->icount.frame++; if (rsr & UART01x_RSR_OE) port->icount.overrun++; rsr &= port->read_status_mask; if (rsr & UART01x_RSR_BE) *tty->flip.flag_buf_ptr = TTY_BREAK; else if (rsr & UART01x_RSR_PE) *tty->flip.flag_buf_ptr = TTY_PARITY; else if (rsr & UART01x_RSR_FE) *tty->flip.flag_buf_ptr = TTY_FRAME; } if (uart_handle_sysrq_char(port, ch, regs)) goto ignore_char; if ((rsr & port->ignore_status_mask) == 0) { tty->flip.flag_buf_ptr++; tty->flip.char_buf_ptr++; tty->flip.count++; } if ((rsr & UART01x_RSR_OE) && tty->flip.count < TTY_FLIPBUF_SIZE) { /* * Overrun is special, since it's reported * immediately, and doesn't affect the current * character */ *tty->flip.char_buf_ptr++ = 0; *tty->flip.flag_buf_ptr++ = TTY_OVERRUN; tty->flip.count++; } ignore_char: status = UART_GET_FR(port); } tty_flip_buffer_push(tty); return;}static void pl010_tx_chars(struct uart_port *port){ struct circ_buf *xmit = &port->info->xmit; int count; if (port->x_char) { UART_PUT_CHAR(port, port->x_char); port->icount.tx++; port->x_char = 0; return; } if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { pl010_stop_tx(port, 0); return; } count = port->fifosize >> 1; do { UART_PUT_CHAR(port, xmit->buf[xmit->tail]); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; if (uart_circ_empty(xmit)) break; } while (--count > 0); if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) uart_write_wakeup(port); if (uart_circ_empty(xmit)) pl010_stop_tx(port, 0);}static void pl010_modem_status(struct uart_port *port){ struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int status, delta; UART_PUT_ICR(&uap->port, 0); status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY; delta = status ^ uap->old_status; uap->old_status = status; if (!delta) return; if (delta & UART01x_FR_DCD) uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); if (delta & UART01x_FR_DSR) uap->port.icount.dsr++; if (delta & UART01x_FR_CTS) uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); wake_up_interruptible(&uap->port.info->delta_msr_wait);}static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs){ struct uart_port *port = dev_id; unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT; int handled = 0; spin_lock(&port->lock); status = UART_GET_INT_STATUS(port); if (status) { do { if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))#ifdef SUPPORT_SYSRQ pl010_rx_chars(port, regs);#else pl010_rx_chars(port);#endif if (status & UART010_IIR_MIS) pl010_modem_status(port); if (status & UART010_IIR_TIS) pl010_tx_chars(port); if (pass_counter-- == 0) break; status = UART_GET_INT_STATUS(port); } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | UART010_IIR_TIS)); handled = 1; } spin_unlock(&port->lock); return IRQ_RETVAL(handled);}static unsigned int pl010_tx_empty(struct uart_port *port){ return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;}static unsigned int pl010_get_mctrl(struct uart_port *port){ unsigned int result = 0; unsigned int status; status = UART_GET_FR(port); if (status & UART01x_FR_DCD) result |= TIOCM_CAR; if (status & UART01x_FR_DSR) result |= TIOCM_DSR; if (status & UART01x_FR_CTS) result |= TIOCM_CTS; return result;}static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl){ struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int ctrls = 0, ctrlc = 0; if (mctrl & TIOCM_RTS) ctrlc |= uap->rts_mask; else ctrls |= uap->rts_mask; if (mctrl & TIOCM_DTR) ctrlc |= uap->dtr_mask; else ctrls |= uap->dtr_mask; __raw_writel(ctrls, SC_CTRLS); __raw_writel(ctrlc, SC_CTRLC);}static void pl010_break_ctl(struct uart_port *port, int break_state){ unsigned long flags; unsigned int lcr_h; spin_lock_irqsave(&port->lock, flags); lcr_h = UART_GET_LCRH(port); if (break_state == -1) lcr_h |= UART01x_LCRH_BRK; else lcr_h &= ~UART01x_LCRH_BRK; UART_PUT_LCRH(port, lcr_h); spin_unlock_irqrestore(&port->lock, flags);}static int pl010_startup(struct uart_port *port){ struct uart_amba_port *uap = (struct uart_amba_port *)port; int retval; /* * Allocate the IRQ */ retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port); if (retval) return retval; /* * initialise the old status of the modem signals */ uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY; /* * Finally, enable interrupts */ UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE); return 0;}static void pl010_shutdown(struct uart_port *port){ /* * Free the interrupt */ free_irq(port->irq, port); /* * disable all interrupts, disable the port */ UART_PUT_CR(port, 0); /* disable break condition and fifos */ UART_PUT_LCRH(port, UART_GET_LCRH(port) & ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN));
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?