8250_pci.c

来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 2,238 行 · 第 1/4 页

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	switch (idx) {	case 0:		bar = 1;		break;	case 1:		bar = 2;		break;	default:		bar = 4;		offset = (idx - 2) * board->uart_offset;	}	return setup_port(dev, req, bar, offset, board->reg_shift);}static int __devinit pci_xircom_init(struct pci_dev *dev){	msleep(100);	return 0;}static intpci_default_setup(struct pci_dev *dev, struct pci_board *board,		  struct serial_struct *req, int idx){	unsigned int bar, offset = board->first_offset, maxnr;	bar = FL_GET_BASE(board->flags);	if (board->flags & FL_BASE_BARS)		bar += idx;	else		offset += idx * board->uart_offset;	maxnr = (pci_resource_len(dev, bar) - board->first_offset) /		(8 << board->reg_shift);	if (board->flags & FL_REGION_SZ_CAP && idx >= maxnr)		return 1;				return setup_port(dev, req, bar, offset, board->reg_shift);}/* This should be in linux/pci_ids.h */#define PCI_VENDOR_ID_SBSMODULARIO	0x124B#define PCI_SUBVENDOR_ID_SBSMODULARIO	0x124B#define PCI_DEVICE_ID_OCTPRO		0x0001#define PCI_SUBDEVICE_ID_OCTPRO232	0x0108#define PCI_SUBDEVICE_ID_OCTPRO422	0x0208#define PCI_SUBDEVICE_ID_POCTAL232	0x0308#define PCI_SUBDEVICE_ID_POCTAL422	0x0408/* * Master list of serial port init/setup/exit quirks. * This does not describe the general nature of the port. * (ie, baud base, number and location of ports, etc) * * This list is ordered alphabetically by vendor then device. * Specific entries must come before more generic entries. */static struct pci_serial_quirk pci_serial_quirks[] = {	/*	 * AFAVLAB cards.	 *  It is not clear whether this applies to all products.	 */	{		.vendor		= PCI_VENDOR_ID_AFAVLAB,		.device		= PCI_ANY_ID,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.setup		= afavlab_setup,	},	/*	 * HP Diva	 */	{		.vendor		= PCI_VENDOR_ID_HP,		.device		= PCI_DEVICE_ID_HP_DIVA,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_hp_diva_init,		.setup		= pci_hp_diva_setup,	},	/*	 * Intel	 */	{		.vendor		= PCI_VENDOR_ID_INTEL,		.device		= PCI_DEVICE_ID_INTEL_80960_RP,		.subvendor	= 0xe4bf,		.subdevice	= PCI_ANY_ID,		.init		= pci_inteli960ni_init,		.setup		= pci_default_setup,	},	/*	 * Panacom	 */	{		.vendor		= PCI_VENDOR_ID_PANACOM,		.device		= PCI_DEVICE_ID_PANACOM_QUADMODEM,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_plx9050_init,		.setup		= pci_default_setup,		.exit		= __devexit_p(pci_plx9050_exit),	},			{		.vendor		= PCI_VENDOR_ID_PANACOM,		.device		= PCI_DEVICE_ID_PANACOM_DUALMODEM,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_plx9050_init,		.setup		= pci_default_setup,		.exit		= __devexit_p(pci_plx9050_exit),	},	/*	 * PLX	 */	{		.vendor		= PCI_VENDOR_ID_PLX,		.device		= PCI_DEVICE_ID_PLX_9050,		.subvendor	= PCI_SUBVENDOR_ID_KEYSPAN,		.subdevice	= PCI_SUBDEVICE_ID_KEYSPAN_SX2,		.init		= pci_plx9050_init,		.setup		= pci_default_setup,		.exit		= __devexit_p(pci_plx9050_exit),	},	{		.vendor		= PCI_VENDOR_ID_PLX,		.device		= PCI_DEVICE_ID_PLX_ROMULUS,		.subvendor	= PCI_VENDOR_ID_PLX,		.subdevice	= PCI_DEVICE_ID_PLX_ROMULUS,		.init		= pci_plx9050_init,		.setup		= pci_default_setup,		.exit		= __devexit_p(pci_plx9050_exit),	},	/*	 * SBS Technologies, Inc., PMC-OCTALPRO 232	 */	{		.vendor		= PCI_VENDOR_ID_SBSMODULARIO,		.device		= PCI_DEVICE_ID_OCTPRO,		.subvendor	= PCI_SUBVENDOR_ID_SBSMODULARIO,		.subdevice	= PCI_SUBDEVICE_ID_OCTPRO232,		.init		= sbs_init,		.setup		= sbs_setup,		.exit		= __devexit_p(sbs_exit),	},	/*	 * SBS Technologies, Inc., PMC-OCTALPRO 422	 */	{		.vendor		= PCI_VENDOR_ID_SBSMODULARIO,		.device		= PCI_DEVICE_ID_OCTPRO,		.subvendor	= PCI_SUBVENDOR_ID_SBSMODULARIO,		.subdevice	= PCI_SUBDEVICE_ID_OCTPRO422,		.init		= sbs_init,		.setup		= sbs_setup,		.exit		= __devexit_p(sbs_exit),	},	/*	 * SBS Technologies, Inc., P-Octal 232	 */	{		.vendor		= PCI_VENDOR_ID_SBSMODULARIO,		.device		= PCI_DEVICE_ID_OCTPRO,		.subvendor	= PCI_SUBVENDOR_ID_SBSMODULARIO,		.subdevice	= PCI_SUBDEVICE_ID_POCTAL232,		.init		= sbs_init,		.setup		= sbs_setup,		.exit		= __devexit_p(sbs_exit),	},	/*	 * SBS Technologies, Inc., P-Octal 422	 */	{		.vendor		= PCI_VENDOR_ID_SBSMODULARIO,		.device		= PCI_DEVICE_ID_OCTPRO,		.subvendor	= PCI_SUBVENDOR_ID_SBSMODULARIO,		.subdevice	= PCI_SUBDEVICE_ID_POCTAL422,		.init		= sbs_init,		.setup		= sbs_setup,		.exit		= __devexit_p(sbs_exit),	},	/*	 * SIIG cards.	 *  It is not clear whether these could be collapsed.	 */	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_10x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_10x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_10x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_10x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_10x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_10x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_10x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_10x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_10x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig10x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_20x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_20x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_1S_20x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_20x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{	.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_20x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_2S_20x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_20x_550,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_20x_650,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	{		.vendor		= PCI_VENDOR_ID_SIIG,		.device		= PCI_DEVICE_ID_SIIG_4S_20x_850,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_siig20x_init,		.setup		= pci_default_setup,	},	/*	 * Titan cards	 */	{		.vendor		= PCI_VENDOR_ID_TITAN,		.device		= PCI_DEVICE_ID_TITAN_400L,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.setup		= titan_400l_800l_setup,	},	{		.vendor		= PCI_VENDOR_ID_TITAN,		.device		= PCI_DEVICE_ID_TITAN_800L,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.setup		= titan_400l_800l_setup,	},	/*	 * Timedia cards	 */	{		.vendor		= PCI_VENDOR_ID_TIMEDIA,		.device		= PCI_DEVICE_ID_TIMEDIA_1889,		.subvendor	= PCI_VENDOR_ID_TIMEDIA,		.subdevice	= PCI_ANY_ID,		.init		= pci_timedia_init,		.setup		= pci_timedia_setup,	},	{		.vendor		= PCI_VENDOR_ID_TIMEDIA,		.device		= PCI_ANY_ID,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.setup		= pci_timedia_setup,	},	/*	 * Xircom cards	 */	{		.vendor		= PCI_VENDOR_ID_XIRCOM,		.device		= PCI_DEVICE_ID_XIRCOM_X3201_MDM,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.init		= pci_xircom_init,		.setup		= pci_default_setup,	},	/*	 * Default "match everything" terminator entry	 */	{		.vendor		= PCI_ANY_ID,		.device		= PCI_ANY_ID,		.subvendor	= PCI_ANY_ID,		.subdevice	= PCI_ANY_ID,		.setup		= pci_default_setup,	}};static inline int quirk_id_matches(u32 quirk_id, u32 dev_id){	return quirk_id == PCI_ANY_ID || quirk_id == dev_id;}static struct pci_serial_quirk *find_quirk(struct pci_dev *dev){	struct pci_serial_quirk *quirk;	for (quirk = pci_serial_quirks; ; quirk++)		if (quirk_id_matches(quirk->vendor, dev->vendor) &&		    quirk_id_matches(quirk->device, dev->device) &&		    quirk_id_matches(quirk->subvendor, dev->subsystem_vendor) &&		    quirk_id_matches(quirk->subdevice, dev->subsystem_device))		 	break;	return quirk;}static _INLINE_ intget_pci_irq(struct pci_dev *dev, struct pci_board *board, int idx){	if (board->flags & FL_NOIRQ)		return 0;	else		return dev->irq;}/* * This is the configuration table for all of the PCI serial boards * which we support.  It is directly indexed by the pci_board_num_t enum * value, which is encoded in the pci_device_id PCI probe table's * driver_data member. * * The makeup of these names are: *  pbn_bn{_bt}_n_baud * *  bn   = PCI BAR number *  bt   = Index using PCI BARs *  n    = number of serial ports *  baud = baud rate * * Please note: in theory if n = 1, _bt infix should make no difference. * ie, pbn_b0_1_115200 is the same as pbn_b0_bt_1_115200 */enum pci_board_num_t {	pbn_default = 0,	pbn_b0_1_115200,	pbn_b0_2_115200,	pbn_b0_4_115200,	pbn_b0_5_115200,	pbn_b0_1_921600,	pbn_b0_2_921600,	pbn_b0_4_921600,	pbn_b0_bt_1_115200,	pbn_b0_bt_2_115200,	pbn_b0_bt_8_115200,	pbn_b0_bt_1_460800,	pbn_b0_bt_2_460800,	pbn_b0_bt_4_460800,	pbn_b0_bt_1_921600,	pbn_b0_bt_2_921600,	pbn_b0_bt_4_921600,	pbn_b0_bt_8_921600,	pbn_b1_1_115200,	pbn_b1_2_115200,	pbn_b1_4_115200,	pbn_b1_8_115200,	pbn_b1_1_921600,	pbn_b1_2_921600,	pbn_b1_4_921600,	pbn_b1_8_921600,	pbn_b1_bt_2_921600,	pbn_b1_2_1382400,	pbn_b1_4_1382400,	pbn_b1_8_1382400,	pbn_b2_1_115200,	pbn_b2_8_115200,	pbn_b2_1_460800,	pbn_b2_4_460800,	pbn_b2_8_460800,	pbn_b2_16_460800,	pbn_b2_1_921600,	pbn_b2_4_921600,	pbn_b2_8_921600,	pbn_b2_bt_1_115200,	pbn_b2_bt_2_115200,	pbn_b2_bt_4_115200,	pbn_b2_bt_2_921600,	pbn_b2_bt_4_921600,	pbn_b3_4_115200,	pbn_b3_8_115200,	/*	 * Board-specific versions.	 */	pbn_panacom,	pbn_panacom2,	pbn_panacom4,	pbn_plx_romulus,	pbn_oxsemi,	pbn_intel_i960,	pbn_sgi_ioc3,	pbn_nec_nile4,	pbn_computone_4,	pbn_computone_6,	pbn_computone_8,	pbn_sbsxrsio,	pbn_exar_XR17C152,	pbn_exar_XR17C154,	pbn_exar_XR17C158,};/* * uart_offset - the space between channels * reg_shift   - describes how the UART registers are mapped *               to PCI memory by the card. * For example IER register on SBS, Inc. PMC-OctPro is located at * offset 0x10 from the UART base, while UART_IER is defined as 1 * in include/linux/serial_reg.h, * see first lines of serial_in() and serial_out() in 8250.c*/static struct pci_board pci_boards[] __devinitdata = {	[pbn_default] = {		.flags		= FL_BASE0,		.num_ports	= 1,		.base_baud	= 115200,		.uart_offset	= 8,	},	[pbn_b0_1_115200] = {		.flags		= FL_BASE0,		.num_ports	= 1,		.base_baud	= 115200,		.uart_offset	= 8,	},	[pbn_b0_2_115200] = {		.flags		= FL_BASE0,		.num_ports	= 2,		.base_baud	= 115200,		.uart_offset	= 8,	},	[pbn_b0_4_115200] = {		.flags		= FL_BASE0,		.num_ports	= 4,		.base_baud	= 115200,		.uart_offset	= 8,	},	[pbn_b0_5_115200] = {		.flags		= FL_BASE0,		.num_ports	= 5,		.base_baud	= 115200,		.uart_offset	= 8,	},	[pbn_b0_1_921600] = {

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