uart00.c

来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 786 行 · 第 1/2 页

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/* *  linux/drivers/serial/uart00.c * *  Driver for UART00 serial ports * *  Based on drivers/char/serial_amba.c, by ARM Limited &  *                                          Deep Blue Solutions Ltd. *  Copyright 2001 Altera Corporation * *  Update for 2.6.4 by Dirk Behme <dirk.behme@de.bosch.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA * *  $Id: uart00.c,v 1.35 2002/07/28 10:03:28 rmk Exp $ * */#include <linux/config.h>#include <linux/module.h>#include <linux/tty.h>#include <linux/ioport.h>#include <linux/init.h>#include <linux/serial.h>#include <linux/console.h>#include <linux/sysrq.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/sizes.h>#if defined(CONFIG_SERIAL_UART00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)#define SUPPORT_SYSRQ#endif#include <linux/serial_core.h>#include <asm/arch/excalibur.h>#define UART00_TYPE (volatile unsigned int*)#include <asm/arch/uart00.h>#include <asm/arch/int_ctrl00.h>#define UART_NR		2#define SERIAL_UART00_NAME	"ttyUA"#define SERIAL_UART00_MAJOR	204#define SERIAL_UART00_MINOR	16      /* Temporary - will change in future */#define SERIAL_UART00_NR	UART_NR#define UART_PORT_SIZE 0x50#define UART00_ISR_PASS_LIMIT	256/* * Access macros for the UART00 UARTs */#define UART_GET_INT_STATUS(p)	inl(UART_ISR((p)->membase))#define UART_PUT_IES(p, c)      outl(c,UART_IES((p)->membase))#define UART_GET_IES(p)         inl(UART_IES((p)->membase))#define UART_PUT_IEC(p, c)      outl(c,UART_IEC((p)->membase))#define UART_GET_IEC(p)         inl(UART_IEC((p)->membase))#define UART_PUT_CHAR(p, c)     outl(c,UART_TD((p)->membase))#define UART_GET_CHAR(p)        inl(UART_RD((p)->membase))#define UART_GET_RSR(p)         inl(UART_RSR((p)->membase))#define UART_GET_RDS(p)         inl(UART_RDS((p)->membase))#define UART_GET_MSR(p)         inl(UART_MSR((p)->membase))#define UART_GET_MCR(p)         inl(UART_MCR((p)->membase))#define UART_PUT_MCR(p, c)      outl(c,UART_MCR((p)->membase))#define UART_GET_MC(p)          inl(UART_MC((p)->membase))#define UART_PUT_MC(p, c)       outl(c,UART_MC((p)->membase))#define UART_GET_TSR(p)         inl(UART_TSR((p)->membase))#define UART_GET_DIV_HI(p)	inl(UART_DIV_HI((p)->membase))#define UART_PUT_DIV_HI(p,c)	outl(c,UART_DIV_HI((p)->membase))#define UART_GET_DIV_LO(p)	inl(UART_DIV_LO((p)->membase))#define UART_PUT_DIV_LO(p,c)	outl(c,UART_DIV_LO((p)->membase))#define UART_RX_DATA(s)		((s) & UART_RSR_RX_LEVEL_MSK)#define UART_TX_READY(s)	(((s) & UART_TSR_TX_LEVEL_MSK) < 15)//#define UART_TX_EMPTY(p)	((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)static void uart00_stop_tx(struct uart_port *port, unsigned int tty_stop){	UART_PUT_IEC(port, UART_IEC_TIE_MSK);}static void uart00_stop_rx(struct uart_port *port){	UART_PUT_IEC(port, UART_IEC_RE_MSK);}static void uart00_enable_ms(struct uart_port *port){	UART_PUT_IES(port, UART_IES_ME_MSK);}static voiduart00_rx_chars(struct uart_port *port, struct pt_regs *regs){	struct tty_struct *tty = port->info->tty;	unsigned int status, ch, rds, flg, ignored = 0;	status = UART_GET_RSR(port);	while (UART_RX_DATA(status)) {		/* 		 * We need to read rds before reading the 		 * character from the fifo		 */		rds = UART_GET_RDS(port);		ch = UART_GET_CHAR(port);		port->icount.rx++;		if (tty->flip.count >= TTY_FLIPBUF_SIZE)			goto ignore_char;		flg = TTY_NORMAL;		/*		 * Note that the error handling code is		 * out of the main execution path		 */		if (rds & (UART_RDS_BI_MSK |UART_RDS_FE_MSK|			   UART_RDS_PE_MSK |UART_RDS_PE_MSK))			goto handle_error;		if (uart_handle_sysrq_char(port, ch, regs))			goto ignore_char;	error_return:		*tty->flip.flag_buf_ptr++ = flg;		*tty->flip.char_buf_ptr++ = ch;		tty->flip.count++;	ignore_char:		status = UART_GET_RSR(port);	} out:	tty_flip_buffer_push(tty);	return; handle_error:	if (rds & UART_RDS_BI_MSK) {		status &= ~(UART_RDS_FE_MSK | UART_RDS_PE_MSK);		port->icount.brk++;		if (uart_handle_break(port))			goto ignore_char;	} else if (rds & UART_RDS_PE_MSK)		port->icount.parity++;	else if (rds & UART_RDS_FE_MSK)		port->icount.frame++;	if (rds & UART_RDS_OE_MSK)		port->icount.overrun++;	if (rds & port->ignore_status_mask) {		if (++ignored > 100)			goto out;		goto ignore_char;	}	rds &= port->read_status_mask;	if (rds & UART_RDS_BI_MSK)		flg = TTY_BREAK;	else if (rds & UART_RDS_PE_MSK)		flg = TTY_PARITY;	else if (rds & UART_RDS_FE_MSK)		flg = TTY_FRAME;	if (rds & UART_RDS_OE_MSK) {		/*		 * CHECK: does overrun affect the current character?		 * ASSUMPTION: it does not.		 */		*tty->flip.flag_buf_ptr++ = flg;		*tty->flip.char_buf_ptr++ = ch;		tty->flip.count++;		if (tty->flip.count >= TTY_FLIPBUF_SIZE)			goto ignore_char;		ch = 0;		flg = TTY_OVERRUN;	}#ifdef SUPPORT_SYSRQ	port->sysrq = 0;#endif	goto error_return;}static void uart00_tx_chars(struct uart_port *port){	struct circ_buf *xmit = &port->info->xmit;	int count;	if (port->x_char) {		while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)			barrier();		UART_PUT_CHAR(port, port->x_char);		port->icount.tx++;		port->x_char = 0;		return;	}	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {		uart00_stop_tx(port, 0);		return;	}	count = port->fifosize >> 1;	do {		while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)			barrier();		UART_PUT_CHAR(port, xmit->buf[xmit->tail]);		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);		port->icount.tx++;		if (uart_circ_empty(xmit))			break;	} while (--count > 0);	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)		uart_write_wakeup(port);	if (uart_circ_empty(xmit))		uart00_stop_tx(port, 0);}static void uart00_start_tx(struct uart_port *port, unsigned int tty_start){	UART_PUT_IES(port, UART_IES_TIE_MSK);	uart00_tx_chars(port);}static void uart00_modem_status(struct uart_port *port){	unsigned int status;	status = UART_GET_MSR(port);	if (!(status & (UART_MSR_DCTS_MSK | UART_MSR_DDSR_MSK | 			UART_MSR_TERI_MSK | UART_MSR_DDCD_MSK)))		return;	if (status & UART_MSR_DDCD_MSK)		uart_handle_dcd_change(port, status & UART_MSR_DCD_MSK);	if (status & UART_MSR_DDSR_MSK)		port->icount.dsr++;	if (status & UART_MSR_DCTS_MSK)		uart_handle_cts_change(port, status & UART_MSR_CTS_MSK);	wake_up_interruptible(&port->info->delta_msr_wait);}static irqreturn_t uart00_int(int irq, void *dev_id, struct pt_regs *regs){	struct uart_port *port = dev_id;	unsigned int status, pass_counter = 0;	status = UART_GET_INT_STATUS(port);	do {		if (status & UART_ISR_RI_MSK)			uart00_rx_chars(port, regs);		if (status & UART_ISR_MI_MSK)			uart00_modem_status(port);		if (status & (UART_ISR_TI_MSK | UART_ISR_TII_MSK))			uart00_tx_chars(port);		if (pass_counter++ > UART00_ISR_PASS_LIMIT)			break;		status = UART_GET_INT_STATUS(port);	} while (status);	return IRQ_HANDLED;}static unsigned int uart00_tx_empty(struct uart_port *port){	return UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK? 0 : TIOCSER_TEMT;}static unsigned int uart00_get_mctrl(struct uart_port *port){	unsigned int result = 0;	unsigned int status;	status = UART_GET_MSR(port);	if (status & UART_MSR_DCD_MSK)		result |= TIOCM_CAR;	if (status & UART_MSR_DSR_MSK)		result |= TIOCM_DSR;	if (status & UART_MSR_CTS_MSK)		result |= TIOCM_CTS;	if (status & UART_MSR_RI_MSK)		result |= TIOCM_RI;	return result;}static void uart00_set_mctrl_null(struct uart_port *port, unsigned int mctrl){}static void uart00_break_ctl(struct uart_port *port, int break_state){	unsigned long flags;	unsigned int mcr;	spin_lock_irqsave(&port->lock, flags);	mcr = UART_GET_MCR(port);	if (break_state == -1)		mcr |= UART_MCR_BR_MSK;	else		mcr &= ~UART_MCR_BR_MSK;	UART_PUT_MCR(port, mcr);	spin_unlock_irqrestore(&port->lock, flags);}static voiduart00_set_termios(struct uart_port *port, struct termios *termios,		   struct termios *old){	unsigned int uart_mc, old_ies, baud, quot;	unsigned long flags;	/*	 * We don't support CREAD (yet)	 */	termios->c_cflag |= CREAD;	/*	 * Ask the core to calculate the divisor for us.	 */	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 	quot = uart_get_divisor(port, baud);	/* byte size and parity */	switch (termios->c_cflag & CSIZE) {	case CS5:		uart_mc = UART_MC_CLS_CHARLEN_5;		break;	case CS6:		uart_mc = UART_MC_CLS_CHARLEN_6;		break;	case CS7:		uart_mc = UART_MC_CLS_CHARLEN_7;		break;	default: // CS8		uart_mc = UART_MC_CLS_CHARLEN_8;		break;	}	if (termios->c_cflag & CSTOPB)		uart_mc|= UART_MC_ST_TWO;	if (termios->c_cflag & PARENB) {		uart_mc |= UART_MC_PE_MSK;		if (!(termios->c_cflag & PARODD))			uart_mc |= UART_MC_EP_MSK;	}	spin_lock_irqsave(&port->lock, flags);	/*	 * Update the per-port timeout.	 */	uart_update_timeout(port, termios->c_cflag, baud);	port->read_status_mask = UART_RDS_OE_MSK;	if (termios->c_iflag & INPCK)		port->read_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;	if (termios->c_iflag & (BRKINT | PARMRK))		port->read_status_mask |= UART_RDS_BI_MSK;	/*	 * Characters to ignore	 */	port->ignore_status_mask = 0;	if (termios->c_iflag & IGNPAR)		port->ignore_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;	if (termios->c_iflag & IGNBRK) {		port->ignore_status_mask |= UART_RDS_BI_MSK;		/*		 * If we're ignoring parity and break indicators,		 * ignore overruns to (for real raw support).		 */		if (termios->c_iflag & IGNPAR)			port->ignore_status_mask |= UART_RDS_OE_MSK;	}	/* first, disable everything */	old_ies = UART_GET_IES(port); 	if (UART_ENABLE_MS(port, termios->c_cflag))		old_ies |= UART_IES_ME_MSK;

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