nsp32.h

来自「Linux Kernel 2.6.9 for OMAP1710」· C头文件 代码 · 共 668 行 · 第 1/2 页

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# define IRQSELECT_PERR_IRQ          BIT(8)# define IRQSELECT_BMCNTERR_IRQ      BIT(9)# define IRQSELECT_AUTO_SCSI_SEQ_IRQ BIT(10)#define OLD_SCSI_PHASE		0x05	/* BASE+08, IDX+05, B, R */# define OLD_MSG  BIT(0)# define OLD_IO   BIT(1)# define OLD_CD   BIT(2)# define OLD_BUSY BIT(3)#define FIFO_FULL_SHLD_COUNT	0x06	/* BASE+08, IDX+06, B, R/W */#define FIFO_EMPTY_SHLD_COUNT	0x07	/* BASE+08, IDX+07, B, R/W */#define EXP_ROM_CONTROL		0x08	/* BASE+08, IDX+08, B, R/W */ /* external ROM control */# define ROM_WRITE_ENB BIT(0)# define IO_ACCESS_ENB BIT(1)# define ROM_ADR_CLEAR BIT(2)#define EXP_ROM_ADR		0x09	/* BASE+08, IDX+09, W, R/W */#define EXP_ROM_DATA		0x0a	/* BASE+08, IDX+0a, B, R/W */#define CHIP_MODE		0x0b	/* BASE+08, IDX+0b, B, R   */ /* NinjaSCSI-32Bi only */# define OEM0 BIT(1)  /* OEM select */ /* 00=I-O DATA, 01=KME, 10=Workbit, 11=Ext ROM */# define OEM1 BIT(2)  /* OEM select */# define OPTB BIT(3)  /* KME mode select */# define OPTC BIT(4)  /* KME mode select */# define OPTD BIT(5)  /* KME mode select */# define OPTE BIT(6)  /* KME mode select */# define OPTF BIT(7)  /* Power management */#define MISC_WR			0x0c	/* BASE+08, IDX+0c, W, R/W */#define MISC_RD			0x0c# define SCSI_DIRECTION_DETECTOR_SELECT BIT(0)# define SCSI2_HOST_DIRECTION_VALID	BIT(1)	/* Read only */# define HOST2_SCSI_DIRECTION_VALID	BIT(2)	/* Read only */# define DELAYED_BMSTART                BIT(3)# define MASTER_TERMINATION_SELECT      BIT(4)# define BMREQ_NEGATE_TIMING_SEL        BIT(5)# define AUTOSEL_TIMING_SEL             BIT(6)# define MISC_MABORT_MASK		BIT(7)# define BMSTOP_CHANGE2_NONDATA_PHASE	BIT(8)#define BM_CYCLE		0x0d	/* BASE+08, IDX+0d, B, R/W */# define BM_CYCLE0		 BIT(0)# define BM_CYCLE1		 BIT(1)# define BM_FRAME_ASSERT_TIMING	 BIT(2)# define BM_IRDY_ASSERT_TIMING	 BIT(3)# define BM_SINGLE_BUS_MASTER	 BIT(4)# define MEMRD_CMD0              BIT(5)# define SGT_AUTO_PARA_MEMED_CMD BIT(6)# define MEMRD_CMD1              BIT(7)#define SREQ_EDGH		0x0e	/* BASE+08, IDX+0e, B, W */# define SREQ_EDGH_SELECT BIT(0)#define UP_CNT			0x0f	/* BASE+08, IDX+0f, B, W */# define REQCNT_UP  BIT(0)# define ACKCNT_UP  BIT(1)# define BMADR_UP   BIT(4)# define BMCNT_UP   BIT(5)# define SGT_CNT_UP BIT(7)#define CFG_CMD_STR		0x10	/* BASE+08, IDX+10, W, R */#define CFG_LATE_CACHE		0x11	/* BASE+08, IDX+11, W, R/W */#define CFG_BASE_ADR_1		0x12	/* BASE+08, IDX+12, W, R */#define CFG_BASE_ADR_2		0x13	/* BASE+08, IDX+13, W, R */#define CFG_INLINE		0x14	/* BASE+08, IDX+14, W, R */#define SERIAL_ROM_CTL		0x15	/* BASE+08, IDX+15, B, R */# define SCL BIT(0)# define ENA BIT(1)# define SDA BIT(2)#define FIFO_HST_POINTER	0x16	/* BASE+08, IDX+16, B, R/W */#define SREQ_DELAY		0x17	/* BASE+08, IDX+17, B, R/W */#define SACK_DELAY		0x18	/* BASE+08, IDX+18, B, R/W */#define SREQ_NOISE_CANCEL	0x19	/* BASE+08, IDX+19, B, R/W */#define SDP_NOISE_CANCEL	0x1a	/* BASE+08, IDX+1a, B, R/W */#define DELAY_TEST		0x1b	/* BASE+08, IDX+1b, B, R/W */#define SD0_NOISE_CANCEL	0x20	/* BASE+08, IDX+20, B, R/W */#define SD1_NOISE_CANCEL	0x21	/* BASE+08, IDX+21, B, R/W */#define SD2_NOISE_CANCEL	0x22	/* BASE+08, IDX+22, B, R/W */#define SD3_NOISE_CANCEL	0x23	/* BASE+08, IDX+23, B, R/W */#define SD4_NOISE_CANCEL	0x24	/* BASE+08, IDX+24, B, R/W */#define SD5_NOISE_CANCEL	0x25	/* BASE+08, IDX+25, B, R/W */#define SD6_NOISE_CANCEL	0x26	/* BASE+08, IDX+26, B, R/W */#define SD7_NOISE_CANCEL	0x27	/* BASE+08, IDX+27, B, R/W *//* * Useful Bus Monitor status combinations. */#define BUSMON_BUS_FREE    0#define BUSMON_COMMAND     ( BUSMON_BSY |                          BUSMON_CD | BUSMON_REQ )#define BUSMON_MESSAGE_IN  ( BUSMON_BSY | BUSMON_MSG | BUSMON_IO | BUSMON_CD | BUSMON_REQ )#define BUSMON_MESSAGE_OUT ( BUSMON_BSY | BUSMON_MSG |             BUSMON_CD | BUSMON_REQ )#define BUSMON_DATA_IN     ( BUSMON_BSY |              BUSMON_IO |             BUSMON_REQ )#define BUSMON_DATA_OUT    ( BUSMON_BSY |                                      BUSMON_REQ )#define BUSMON_STATUS      ( BUSMON_BSY |              BUSMON_IO | BUSMON_CD | BUSMON_REQ )#define BUSMON_RESELECT    (                           BUSMON_IO                          | BUSMON_SEL)#define BUSMON_PHASE_MASK  (              BUSMON_MSG | BUSMON_IO | BUSMON_CD              | BUSMON_SEL)#define BUSPHASE_COMMAND     ( BUSMON_COMMAND     & BUSMON_PHASE_MASK )#define BUSPHASE_MESSAGE_IN  ( BUSMON_MESSAGE_IN  & BUSMON_PHASE_MASK )#define BUSPHASE_MESSAGE_OUT ( BUSMON_MESSAGE_OUT & BUSMON_PHASE_MASK )#define BUSPHASE_DATA_IN     ( BUSMON_DATA_IN     & BUSMON_PHASE_MASK )#define BUSPHASE_DATA_OUT    ( BUSMON_DATA_OUT    & BUSMON_PHASE_MASK )#define BUSPHASE_STATUS      ( BUSMON_STATUS      & BUSMON_PHASE_MASK )#define BUSPHASE_SELECT      ( BUSMON_SEL | BUSMON_IO )/************************************************************************ * structure for DMA/Scatter Gather list */#define NSP32_SG_SIZE		SG_ALLtypedef struct _nsp32_sgtable {	/* values must be little endian */	u32_le addr; /* transfer address */	u32_le len;  /* transfer length. BIT(31) is for SGT_END mark */} __attribute__ ((packed)) nsp32_sgtable;typedef struct _nsp32_sglun {	nsp32_sgtable sgt[NSP32_SG_SIZE+1];	/* SG table */} __attribute__ ((packed)) nsp32_sglun;#define NSP32_SG_TABLE_SIZE (sizeof(nsp32_sgtable) * NSP32_SG_SIZE * MAX_TARGET * MAX_LUN)/* Auto parameter mode memory map.   *//* All values must be little endian. */typedef struct _nsp32_autoparam {	u8     cdb[4 * 0x10];    /* SCSI Command                      */	u32_le msgout;           /* outgoing messages                 */	u8     syncreg;          /* sync register value               */	u8     ackwidth;         /* ack width register value          */	u8     target_id;        /* target/host device id             */	u8     sample_reg;       /* hazard killer sampling rate       */	u16_le command_control;  /* command control register          */	u16_le transfer_control; /* transfer control register         */	u32_le sgt_pointer;      /* SG table physical address for DMA */	u32_le dummy[2];} __attribute__ ((packed)) nsp32_autoparam;  /* must be packed struct *//* * host data structure *//* message in/out buffer */#define MSGOUTBUF_MAX		20#define MSGINBUF_MAX		20/* flag for trans_method */#define NSP32_TRANSFER_BUSMASTER	BIT(0)#define NSP32_TRANSFER_MMIO		BIT(1)	/* Not supported yet */#define NSP32_TRANSFER_PIO		BIT(2)	/* Not supported yet *//* * structure for connected LUN dynamic data * * Note: Currently tagged queuing is disabled, each nsp32_lunt holds *       one SCSI command and one state. */#define DISCPRIV_OK		BIT(0)		/* DISCPRIV Enable mode */#define MSGIN03			BIT(1)		/* Auto Msg In 03 Flag  */typedef struct _nsp32_lunt {	Scsi_Cmnd	*SCpnt;	    /* Current Handling Scsi_Cmnd */	unsigned long	 save_datp;  /* Save Data Pointer - saved position from initial address */	int		 msgin03;	/* auto msg in 03 flag     */	unsigned int	 sg_num;	/* Total number of SG entries */	int		 cur_entry;	/* Current SG entry number */	nsp32_sglun     *sglun;		/* sg table per lun        */	dma_addr_t       sglun_paddr;   /* sglun physical address  */} nsp32_lunt;/* * SCSI TARGET/LUN definition */#define NSP32_HOST_SCSIID    7  /* SCSI initiator is everytime defined as 7 */#define MAX_TARGET	     8#define MAX_LUN		     8	/* XXX: In SPI3, max number of LUN is 64. */typedef struct _nsp32_sync_table {	unsigned char	period_num;	/* period number                  */	unsigned char	ackwidth;	/* ack width designated by period */	unsigned char	start_period;	/* search range - start period    */	unsigned char	end_period;	/* search range - end period      */	unsigned char   sample_rate;    /* hazard killer parameter        */} nsp32_sync_table;/* * structure for target device static data *//* flag for nsp32_target.sync_flag */#define SDTR_INITIATOR	  BIT(0)    /* sending SDTR from initiator        */#define SDTR_TARGET	  BIT(1)    /* sending SDTR from target           */#define SDTR_DONE	  BIT(2)    /* exchanging SDTR has been processed *//* syncronous period value for nsp32_target.config_max */#define FAST5M			0x32#define FAST10M			0x19#define ULTRA20M		0x0c/* flag for nsp32_target.{sync_offset}, period */#define ASYNC_OFFSET		0	/* asynchronous transfer           */#define SYNC_OFFSET		0xf	/* synchronous transfer max offset *//* syncreg:  bit:07 06 05 04 03 02 01 00      ---PERIOD-- ---OFFSET--   */#define TO_SYNCREG(period, offset) (((period) & 0x0f) << 4 | ((offset) & 0x0f))typedef struct _nsp32_target {	unsigned char	syncreg;	/* value for SYNCREG   */	unsigned char	ackwidth;	/* value for ACKWIDTH  */	unsigned char   period;         /* sync period (0-255) */	unsigned char	offset;		/* sync offset (0-15)  */	int		sync_flag;	/* SDTR_*, 0           */	int		limit_entry;	/* max speed limit entry designated					   by EEPROM configuration */	unsigned char   sample_reg;     /* SREQ hazard killer register */} nsp32_target;typedef struct _nsp32_hw_data {	int           IrqNumber;	int           BaseAddress;	int           NumAddress;	unsigned long MmioAddress;#define NSP32_MMIO_OFFSET 0x0800	unsigned long MmioLength;	Scsi_Cmnd *CurrentSC;	struct pci_dev             *Pci;	const struct pci_device_id *pci_devid;	struct Scsi_Host           *Host;	spinlock_t                  Lock;	char info_str[100];	/* allocated memory region */	nsp32_sglun      *sg_list;	/* sglist virtuxal address         */	dma_addr_t	  sg_paddr;     /* physical address of hw_sg_table */	nsp32_autoparam  *autoparam;	/* auto parameter transfer region  */	dma_addr_t	  auto_paddr;	/* physical address of autoparam   */	int 		  cur_entry;	/* current sgt entry               */	/* target/LUN */	nsp32_lunt       *cur_lunt;	/* Current connected LUN table */	nsp32_lunt        lunt[MAX_TARGET][MAX_LUN];  /* All LUN table */	nsp32_target     *cur_target;	/* Current connected SCSI ID    */	nsp32_target	  target[MAX_TARGET];	     /* SCSI ID */	int		  cur_id;	/* Current connected target ID  */	int		  cur_lun;	/* Current connected target LUN */	/* behavior setting parameters */	int		  trans_method;	/* transfer method flag            */	int		  resettime;	/* Reset time                      */	int 		  clock;       	/* clock dividing flag             */	nsp32_sync_table *synct;	/* sync_table determined by clock  */	int		  syncnum;	/* the max number of synct element */	/* message buffer */	unsigned char msgoutbuf[MSGOUTBUF_MAX]; /* msgout buffer    */	char	      msgout_len;		/* msgoutbuf length */	unsigned char msginbuf [MSGINBUF_MAX];	/* megin buffer     */	char	      msgin_len;		/* msginbuf length  */#ifdef CONFIG_PM	u32           PciState[16];     /* save PCI state to this area */#endif} nsp32_hw_data;/* * TIME definition */#define RESET_HOLD_TIME		10000	/* reset time in us (SCSI-2 says the					   minimum is 25us) */#define SEL_TIMEOUT_TIME	10000	/* 250ms defined in SCSI specification					   (25.6us/1unit) */#define ARBIT_TIMEOUT_TIME	100	/* 100us */#define REQSACK_TIMEOUT_TIME	10000	/* max wait time for REQ/SACK assertion					   or negation, 10000us == 10ms *//************************************************************************** * Compatibility functions *//* for Kernel 2.4 */#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))# define scsi_register_host(template) 	scsi_register_module(MODULE_SCSI_HA, template)# define scsi_unregister_host(template) scsi_unregister_module(MODULE_SCSI_HA, template)# define scsi_host_put(host)            scsi_unregister(host)# define pci_name(pci_dev)              ((pci_dev)->slot_name)typedef void irqreturn_t;# define IRQ_NONE      /* */# define IRQ_HANDLED   /* */# define IRQ_RETVAL(x) /* *//* This is ad-hoc version of scsi_host_get_next() */static inline struct Scsi_Host *scsi_host_get_next(struct Scsi_Host *host){	if (host == NULL) {		return scsi_hostlist;	} else {		return host->next;	}}/* This is ad-hoc version of scsi_host_hn_get() */static inline struct Scsi_Host *scsi_host_hn_get(unsigned short hostno){	struct Scsi_Host *host;	for (host = scsi_host_get_next(NULL); host != NULL;	     host = scsi_host_get_next(host)) {		if (host->host_no == hostno) {			break;		}	}	return host;}#endif#endif /* _NSP32_H *//* end */

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