📄 mac53c94.c
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/* * SCSI low-level driver for the 53c94 SCSI bus adaptor found * on Power Macintosh computers, controlling the external SCSI chain. * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA) * controller. * * Paul Mackerras, August 1996. * Copyright (C) 1996 Paul Mackerras. */#include <linux/kernel.h>#include <linux/delay.h>#include <linux/types.h>#include <linux/string.h>#include <linux/slab.h>#include <linux/blkdev.h>#include <linux/proc_fs.h>#include <linux/stat.h>#include <linux/spinlock.h>#include <linux/interrupt.h>#include <asm/dbdma.h>#include <asm/io.h>#include <asm/pgtable.h>#include <asm/prom.h>#include <asm/system.h>#include <asm/pci-bridge.h>#include <asm/macio.h>#include <scsi/scsi.h>#include <scsi/scsi_cmnd.h>#include <scsi/scsi_device.h>#include <scsi/scsi_host.h>#include "mac53c94.h"enum fsc_phase { idle, selecting, dataing, completing, busfreeing,};struct fsc_state { struct mac53c94_regs *regs; int intr; struct dbdma_regs *dma; int dmaintr; int clk_freq; struct Scsi_Host *host; struct scsi_cmnd *request_q; struct scsi_cmnd *request_qtail; struct scsi_cmnd *current_req; /* req we're currently working on */ enum fsc_phase phase; /* what we're currently trying to do */ struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */ void *dma_cmd_space; struct pci_dev *pdev; dma_addr_t dma_addr; struct macio_dev *mdev;};static void mac53c94_init(struct fsc_state *);static void mac53c94_start(struct fsc_state *);static void mac53c94_interrupt(int, void *, struct pt_regs *);static irqreturn_t do_mac53c94_interrupt(int, void *, struct pt_regs *);static void cmd_done(struct fsc_state *, int result);static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);static int mac53c94_queue(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)){ struct fsc_state *state;#if 0 if (cmd->sc_data_direction == DMA_TO_DEVICE) { int i; printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd); for (i = 0; i < cmd->cmd_len; ++i) printk(" %.2x", cmd->cmnd[i]); printk("\n" KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n", cmd->use_sg, cmd->request_bufflen, cmd->request_buffer); }#endif cmd->scsi_done = done; cmd->host_scribble = NULL; state = (struct fsc_state *) cmd->device->host->hostdata; if (state->request_q == NULL) state->request_q = cmd; else state->request_qtail->host_scribble = (void *) cmd; state->request_qtail = cmd; if (state->phase == idle) mac53c94_start(state); return 0;}static int mac53c94_abort(struct scsi_cmnd *cmd){ return FAILED;}static int mac53c94_host_reset(struct scsi_cmnd *cmd){ struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata; struct mac53c94_regs *regs = state->regs; struct dbdma_regs *dma = state->dma; st_le32(&dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16); writeb(CMD_SCSI_RESET, ®s->command); /* assert RST */ udelay(100); /* leave it on for a while (>= 25us) */ writeb(CMD_RESET, ®s->command); udelay(20); mac53c94_init(state); writeb(CMD_NOP, ®s->command); return SUCCESS;}static void mac53c94_init(struct fsc_state *state){ struct mac53c94_regs *regs = state->regs; struct dbdma_regs *dma = state->dma; int x; writeb(state->host->this_id | CF1_PAR_ENABLE, ®s->config1); writeb(TIMO_VAL(250), ®s->sel_timeout); /* 250ms */ writeb(CLKF_VAL(state->clk_freq), ®s->clk_factor); writeb(CF2_FEATURE_EN, ®s->config2); writeb(0, ®s->config3); writeb(0, ®s->sync_period); writeb(0, ®s->sync_offset); x = readb(®s->interrupt); writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);}/* * Start the next command for a 53C94. * Should be called with interrupts disabled. */static void mac53c94_start(struct fsc_state *state){ struct scsi_cmnd *cmd; struct mac53c94_regs *regs = state->regs; int i; if (state->phase != idle || state->current_req != NULL) panic("inappropriate mac53c94_start (state=%p)", state); if (state->request_q == NULL) return; state->current_req = cmd = state->request_q; state->request_q = (struct scsi_cmnd *) cmd->host_scribble; /* Off we go */ writeb(0, ®s->count_lo); writeb(0, ®s->count_mid); writeb(0, ®s->count_hi); writeb(CMD_NOP + CMD_DMA_MODE, ®s->command); udelay(1); writeb(CMD_FLUSH, ®s->command); udelay(1); writeb(cmd->device->id, ®s->dest_id); writeb(0, ®s->sync_period); writeb(0, ®s->sync_offset); /* load the command into the FIFO */ for (i = 0; i < cmd->cmd_len; ++i) writeb(cmd->cmnd[i], ®s->fifo); /* do select without ATN XXX */ writeb(CMD_SELECT, ®s->command); state->phase = selecting; if (cmd->use_sg > 0 || cmd->request_bufflen != 0) set_dma_cmds(state, cmd);}static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs){ unsigned long flags; struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host; spin_lock_irqsave(dev->host_lock, flags); mac53c94_interrupt(irq, dev_id, ptregs); spin_unlock_irqrestore(dev->host_lock, flags); return IRQ_HANDLED;}static void mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs){ struct fsc_state *state = (struct fsc_state *) dev_id; struct mac53c94_regs *regs = state->regs; struct dbdma_regs *dma = state->dma; struct scsi_cmnd *cmd = state->current_req; int nb, stat, seq, intr; static int mac53c94_errors; /* * Apparently, reading the interrupt register unlatches * the status and sequence step registers. */ seq = readb(®s->seqstep); stat = readb(®s->status); intr = readb(®s->interrupt);#if 0 printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n", intr, stat, seq, state->phase);#endif if (intr & INTR_RESET) { /* SCSI bus was reset */ printk(KERN_INFO "external SCSI bus reset detected\n"); writeb(CMD_NOP, ®s->command); writel(RUN << 16, &dma->control); /* stop dma */ cmd_done(state, DID_RESET << 16); return; } if (intr & INTR_ILL_CMD) { printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n", intr, stat, seq, state->phase); cmd_done(state, DID_ERROR << 16); return; } if (stat & STAT_ERROR) {#if 0 /* XXX these seem to be harmless? */ printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n", intr, stat, seq, state->phase);#endif ++mac53c94_errors; writeb(CMD_NOP + CMD_DMA_MODE, ®s->command); } if (cmd == 0) { printk(KERN_DEBUG "53c94: interrupt with no command active?\n"); return; } if (stat & STAT_PARITY) { printk(KERN_ERR "mac53c94: parity error\n"); cmd_done(state, DID_PARITY << 16); return; } switch (state->phase) { case selecting: if (intr & INTR_DISCONNECT) { /* selection timed out */ cmd_done(state, DID_BAD_TARGET << 16); return; } if (intr != INTR_BUS_SERV + INTR_DONE) { printk(KERN_DEBUG "got intr %x during selection\n", intr); cmd_done(state, DID_ERROR << 16); return; } if ((seq & SS_MASK) != SS_DONE) { printk(KERN_DEBUG "seq step %x after command\n", seq); cmd_done(state, DID_ERROR << 16); return; } writeb(CMD_NOP, ®s->command); /* set DMA controller going if any data to transfer */ if ((stat & (STAT_MSG|STAT_CD)) == 0 && (cmd->use_sg > 0 || cmd->request_bufflen != 0)) { nb = cmd->SCp.this_residual; if (nb > 0xfff0) nb = 0xfff0; cmd->SCp.this_residual -= nb; writeb(nb, ®s->count_lo); writeb(nb >> 8, ®s->count_mid); writeb(CMD_DMA_MODE + CMD_NOP, ®s->command); writel(virt_to_phys(state->dma_cmds), &dma->cmdptr); writel((RUN << 16) | RUN, &dma->control); writeb(CMD_DMA_MODE + CMD_XFER_DATA, ®s->command); state->phase = dataing; break; } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) { /* up to status phase already */ writeb(CMD_I_COMPLETE, ®s->command); state->phase = completing; } else { printk(KERN_DEBUG "in unexpected phase %x after cmd\n", stat & STAT_PHASE); cmd_done(state, DID_ERROR << 16); return; } break; case dataing: if (intr != INTR_BUS_SERV) { printk(KERN_DEBUG "got intr %x before status\n", intr);
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