dc395x.h

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/************************************************************************/
/*									*/
/*	dc395x.h							*/
/*									*/
/*	Device Driver for Tekram DC395(U/UW/F), DC315(U)		*/
/*	PCI SCSI Bus Master Host Adapter				*/
/*	(SCSI chip set used Tekram ASIC TRM-S1040)			*/
/*									*/
/************************************************************************/
#ifndef DC395x_H
#define DC395x_H

/************************************************************************/
/*									*/
/*	Initial values							*/
/*									*/
/************************************************************************/
#define DC395x_MAX_CMD_QUEUE		32
/* #define DC395x_MAX_QTAGS		32 */
#define DC395x_MAX_QTAGS		16
#define DC395x_MAX_SCSI_ID		16
#define DC395x_MAX_CMD_PER_LUN		DC395x_MAX_QTAGS
#define DC395x_MAX_SG_TABLESIZE		64	/* HW limitation			*/
#define DC395x_MAX_SG_LISTENTRY		64	/* Must be equal or lower to previous	*/
						/* item					*/
#define DC395x_MAX_SRB_CNT		63
/* #define DC395x_MAX_CAN_QUEUE		7 * DC395x_MAX_QTAGS */
#define DC395x_MAX_CAN_QUEUE		DC395x_MAX_SRB_CNT
#define DC395x_END_SCAN			2
#define DC395x_SEL_TIMEOUT		153	/* 250 ms selection timeout (@ 40 MHz)	*/
#define DC395x_MAX_RETRIES		3

#if 0
#define SYNC_FIRST
#endif

#define NORM_REC_LVL			0

/************************************************************************/
/*									*/
/*	Various definitions						*/
/*									*/
/************************************************************************/
#define BIT31				0x80000000
#define BIT30				0x40000000
#define BIT29				0x20000000
#define BIT28				0x10000000
#define BIT27				0x08000000
#define BIT26				0x04000000
#define BIT25				0x02000000
#define BIT24				0x01000000
#define BIT23				0x00800000
#define BIT22				0x00400000
#define BIT21				0x00200000
#define BIT20				0x00100000
#define BIT19				0x00080000
#define BIT18				0x00040000
#define BIT17				0x00020000
#define BIT16				0x00010000
#define BIT15				0x00008000
#define BIT14				0x00004000
#define BIT13				0x00002000
#define BIT12				0x00001000
#define BIT11				0x00000800
#define BIT10				0x00000400
#define BIT9				0x00000200
#define BIT8				0x00000100
#define BIT7				0x00000080
#define BIT6				0x00000040
#define BIT5				0x00000020
#define BIT4				0x00000010
#define BIT3				0x00000008
#define BIT2				0x00000004
#define BIT1				0x00000002
#define BIT0				0x00000001

/* UnitCtrlFlag */
#define UNIT_ALLOCATED			BIT0
#define UNIT_INFO_CHANGED		BIT1
#define FORMATING_MEDIA			BIT2
#define UNIT_RETRY			BIT3

/* UnitFlags */
#define DASD_SUPPORT			BIT0
#define SCSI_SUPPORT			BIT1
#define ASPI_SUPPORT			BIT2

/* SRBState machine definition */
#define SRB_FREE			0x0000
#define SRB_WAIT			0x0001
#define SRB_READY			0x0002
#define SRB_MSGOUT			0x0004	/* arbitration+msg_out 1st byte		*/
#define SRB_MSGIN			0x0008
#define SRB_EXTEND_MSGIN		0x0010
#define SRB_COMMAND			0x0020
#define SRB_START_			0x0040	/* arbitration+msg_out+command_out	*/
#define SRB_DISCONNECT			0x0080
#define SRB_DATA_XFER			0x0100
#define SRB_XFERPAD			0x0200
#define SRB_STATUS			0x0400
#define SRB_COMPLETED			0x0800
#define SRB_ABORT_SENT			0x1000
#define SRB_DO_SYNC_NEGO		0x2000
#define SRB_DO_WIDE_NEGO		0x4000
#define SRB_UNEXPECT_RESEL		0x8000

/************************************************************************/
/*									*/
/*	ACB Config							*/
/*									*/
/************************************************************************/
#define HCC_WIDE_CARD			0x20
#define HCC_SCSI_RESET			0x10
#define HCC_PARITY			0x08
#define HCC_AUTOTERM			0x04
#define HCC_LOW8TERM			0x02
#define HCC_UP8TERM			0x01

/* ACBFlag */
#define RESET_DEV			BIT0
#define RESET_DETECT			BIT1
#define RESET_DONE			BIT2

/* DCBFlag */
#define ABORT_DEV_			BIT0

/* SRBstatus */
#define SRB_OK				BIT0
#define ABORTION			BIT1
#define OVER_RUN			BIT2
#define UNDER_RUN			BIT3
#define PARITY_ERROR			BIT4
#define SRB_ERROR			BIT5

/* SRBFlag */
#define DATAOUT				BIT7
#define DATAIN				BIT6
#define RESIDUAL_VALID			BIT5
#define ENABLE_TIMER			BIT4
#define RESET_DEV0			BIT2
#define ABORT_DEV			BIT1
#define AUTO_REQSENSE			BIT0

/* Adapter status */
#define H_STATUS_GOOD			0
#define H_SEL_TIMEOUT			0x11
#define H_OVER_UNDER_RUN		0x12
#define H_UNEXP_BUS_FREE		0x13
#define H_TARGET_PHASE_F		0x14
#define H_INVALID_CCB_OP		0x16
#define H_LINK_CCB_BAD			0x17
#define H_BAD_TARGET_DIR		0x18
#define H_DUPLICATE_CCB			0x19
#define H_BAD_CCB_OR_SG			0x1A
#define H_ABORT				0x0FF

/* SCSI BUS Status byte codes */
#define SCSI_STAT_GOOD			0x0	/* Good status				*/
#define SCSI_STAT_CHECKCOND		0x02	/* SCSI Check Condition			*/
#define SCSI_STAT_CONDMET		0x04	/* Condition Met			*/
#define SCSI_STAT_BUSY			0x08	/* Target busy status			*/
#define SCSI_STAT_INTER			0x10	/* Intermediate status			*/
#define SCSI_STAT_INTERCONDMET		0x14	/* Intermediate condition met		*/
#define SCSI_STAT_RESCONFLICT		0x18	/* Reservation conflict			*/
#define SCSI_STAT_CMDTERM		0x22	/* Command Terminated			*/
#define SCSI_STAT_QUEUEFULL		0x28	/* Queue Full				*/
#define SCSI_STAT_UNEXP_BUS_F		0xFD	/* Unexpect Bus Free			*/
#define SCSI_STAT_BUS_RST_DETECT	0xFE	/* Scsi Bus Reset detected		*/
#define SCSI_STAT_SEL_TIMEOUT		0xFF	/* Selection Time out			*/

/* Sync_Mode */
#define SYNC_WIDE_TAG_ATNT_DISABLE	0
#define SYNC_NEGO_ENABLE		BIT0
#define SYNC_NEGO_DONE			BIT1
#define WIDE_NEGO_ENABLE		BIT2
#define WIDE_NEGO_DONE			BIT3
#define WIDE_NEGO_STATE			BIT4
#define EN_TAG_QUEUEING			BIT5
#define EN_ATN_STOP			BIT6

#define SYNC_NEGO_OFFSET		15

/* SCSI MSG BYTE */
#define MSG_COMPLETE			0x00
#define MSG_EXTENDED			0x01
#define MSG_SAVE_PTR			0x02
#define MSG_RESTORE_PTR			0x03
#define MSG_DISCONNECT			0x04
#define MSG_INITIATOR_ERROR		0x05
#define MSG_ABORT			0x06
#define MSG_REJECT_			0x07
#define MSG_NOP				0x08
#define MSG_PARITY_ERROR		0x09
#define MSG_LINK_CMD_COMPL		0x0A
#define MSG_LINK_CMD_COMPL_FLG		0x0B
#define MSG_BUS_RESET			0x0C
#define MSG_ABORT_TAG			0x0D
#define MSG_SIMPLE_QTAG			0x20
#define MSG_HEAD_QTAG			0x21
#define MSG_ORDER_QTAG			0x22
#define MSG_IGNOREWIDE			0x23
#define MSG_IDENTIFY			0x80
#define MSG_HOST_ID			0xC0

/* SCSI STATUS BYTE */
#define STATUS_GOOD			0x00
#define CHECK_CONDITION_		0x02
#define STATUS_BUSY			0x08
#define STATUS_INTERMEDIATE		0x10
#define RESERVE_CONFLICT		0x18

/* cmd->result */
#define STATUS_MASK_			0xFF
#define MSG_MASK			0xFF00
#define RETURN_MASK			0xFF0000

/************************************************************************/
/*									*/
/*	Inquiry Data format						*/
/*									*/
/************************************************************************/
struct ScsiInqData
{						/* INQ					*/
	u8 DevType;				/* Periph Qualifier & Periph Dev Type	*/
	u8 RMB_TypeMod;				/* rem media bit & Dev Type Modifier	*/
	u8 Vers;				/* ISO, ECMA, & ANSI versions		*/
	u8 RDF;					/* AEN, TRMIOP, & response data format	*/
	u8 AddLen;				/* length of additional data		*/
	u8 Res1;				/* reserved				*/
	u8 Res2;				/* reserved				*/
	u8 Flags;				/* RelADr, Wbus32, Wbus16, Sync, etc.	*/
	u8 VendorID[8];				/* Vendor Identification		*/
	u8 ProductID[16];			/* Product Identification		*/
	u8 ProductRev[4];			/* Product Revision			*/
};

						/* Inquiry byte 0 masks			*/
#define SCSI_DEVTYPE			0x1F	/* Peripheral Device Type		*/
#define SCSI_PERIPHQUAL			0xE0	/* Peripheral Qualifier			*/
						/* Inquiry byte 1 mask			*/
#define SCSI_REMOVABLE_MEDIA		0x80	/* Removable Media bit (1=removable)	*/
						/* Peripheral Device Type definitions	*/
						/* See include/scsi/scsi.h		*/
#define TYPE_NODEV		SCSI_DEVTYPE	/* Unknown or no device type		*/
#ifndef TYPE_PRINTER				/*					*/
# define TYPE_PRINTER			0x02	/* Printer device			*/
#endif						/*					*/
#ifndef TYPE_COMM				/*					*/
# define TYPE_COMM			0x09	/* Communications device		*/
#endif

/************************************************************************/
/*									*/
/*	Inquiry flag definitions (Inq data byte 7)			*/
/*									*/
/************************************************************************/
#define SCSI_INQ_RELADR			0x80	/* device supports relative addressing	*/
#define SCSI_INQ_WBUS32			0x40	/* device supports 32 bit data xfers	*/
#define SCSI_INQ_WBUS16			0x20	/* device supports 16 bit data xfers	*/
#define SCSI_INQ_SYNC			0x10	/* device supports synchronous xfer	*/
#define SCSI_INQ_LINKED			0x08	/* device supports linked commands	*/
#define SCSI_INQ_CMDQUEUE		0x02	/* device supports command queueing	*/
#define SCSI_INQ_SFTRE			0x01	/* device supports soft resets		*/

#define ENABLE_CE			1
#define DISABLE_CE			0
#define EEPROM_READ			0x80

/************************************************************************/
/*									*/
/*	The PCI configuration register offset for TRM_S1040		*/
/*									*/
/************************************************************************/
#define TRM_S1040_ID			0x00	/* Vendor and Device ID			*/
#define TRM_S1040_COMMAND		0x04	/* PCI command register			*/
#define TRM_S1040_IOBASE		0x10	/* I/O Space base address		*/
#define TRM_S1040_ROMBASE		0x30	/* Expansion ROM Base Address		*/
#define TRM_S1040_INTLINE		0x3C	/* Interrupt line			*/

/************************************************************************/
/*									*/
/*	The SCSI register offset for TRM_S1040				*/
/*									*/
/************************************************************************/
#define TRM_S1040_SCSI_STATUS		0x80	/* SCSI Status (R)			*/
#define COMMANDPHASEDONE		0x2000	/* SCSI command phase done		*/
#define SCSIXFERDONE			0x0800	/* SCSI SCSI transfer done		*/
#define SCSIXFERCNT_2_ZERO		0x0100	/* SCSI SCSI transfer count to zero	*/
#define SCSIINTERRUPT			0x0080	/* SCSI interrupt pending		*/
#define COMMANDABORT			0x0040	/* SCSI command abort			*/
#define SEQUENCERACTIVE			0x0020	/* SCSI sequencer active		*/
#define PHASEMISMATCH			0x0010	/* SCSI phase mismatch			*/
#define PARITYERROR			0x0008	/* SCSI parity error			*/

#define PHASEMASK			0x0007	/* Phase MSG/CD/IO			*/
#define PH_DATA_OUT			0x00	/* Data out phase			*/
#define PH_DATA_IN			0x01	/* Data in phase			*/
#define PH_COMMAND			0x02	/* Command phase			*/
#define PH_STATUS			0x03	/* Status phase				*/
#define PH_BUS_FREE			0x05	/* Invalid phase used as bus free	*/
#define PH_MSG_OUT			0x06	/* Message out phase			*/
#define PH_MSG_IN			0x07	/* Message in phase			*/

#define TRM_S1040_SCSI_CONTROL		0x80	/* SCSI Control (W)			*/
#define DO_CLRATN			0x0400	/* Clear ATN				*/
#define DO_SETATN			0x0200	/* Set ATN				*/
#define DO_CMDABORT			0x0100	/* Abort SCSI command			*/
#define DO_RSTMODULE			0x0010	/* Reset SCSI chip			*/
#define DO_RSTSCSI			0x0008	/* Reset SCSI bus			*/
#define DO_CLRFIFO			0x0004	/* Clear SCSI transfer FIFO		*/
#define DO_DATALATCH			0x0002	/* Enable SCSI bus data input (latched)	*/
/* #define DO_DATALATCH			0x0000 */	/* KG: DISable SCSI bus data latch	*/
#define DO_HWRESELECT			0x0001	/* Enable hardware reselection		*/

#define TRM_S1040_SCSI_FIFOCNT		0x82	/* SCSI FIFO Counter 5bits(R)		*/
#define TRM_S1040_SCSI_SIGNAL		0x83	/* SCSI low level signal (R/W)		*/

#define TRM_S1040_SCSI_INTSTATUS	0x84	/* SCSI Interrupt Status (R)		*/
#define INT_SCAM			0x80	/* SCAM selection interrupt		*/
#define INT_SELECT			0x40	/* Selection interrupt			*/
#define INT_SELTIMEOUT			0x20	/* Selection timeout interrupt		*/
#define INT_DISCONNECT			0x10	/* Bus disconnected interrupt		*/
#define INT_RESELECTED			0x08	/* Reselected interrupt			*/
#define INT_SCSIRESET			0x04	/* SCSI reset detected interrupt	*/
#define INT_BUSSERVICE			0x02	/* Bus service interrupt		*/