ncr53c406a.c

来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 1,111 行 · 第 1/2 页

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/*  *  NCR53c406.c *  Low-level SCSI driver for NCR53c406a chip. *  Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com) *  *  LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]] *  Specify IRQ = 0 for non-interrupt driven mode. *  FASTPIO = 1 for fast pio mode, 0 for slow mode. * *  This program is free software; you can redistribute it and/or modify it *  under the terms of the GNU General Public License as published by the *  Free Software Foundation; either version 2, or (at your option) any *  later version. * *  This program is distributed in the hope that it will be useful, but *  WITHOUT ANY WARRANTY; without even the implied warranty of *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU *  General Public License for more details. * */#define NCR53C406A_DEBUG 0#define VERBOSE_NCR53C406A_DEBUG 0/* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */#define USE_PIO 1#define USE_BIOS 0				/* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */				/* #define PORT_BASE 0x330 *//* define this if autoprobe fails */				/* #define IRQ_LEV   0	*//* define this if autoprobe fails */#define DMA_CHAN  5		/* this is ignored if DMA is disabled *//* Set this to 0 if you encounter kernel lockups while transferring  * data in PIO mode */#define USE_FAST_PIO 1/* ============= End of user configurable parameters ============= */#include <linux/module.h>#include <linux/errno.h>#include <linux/ioport.h>#include <linux/sched.h>#include <linux/interrupt.h>#include <linux/proc_fs.h>#include <linux/stat.h>#include <linux/init.h>#include <asm/io.h>#include <asm/dma.h>#include <asm/bitops.h>#include <asm/irq.h>#include <linux/blkdev.h>#include <linux/spinlock.h>#include "scsi.h"#include <scsi/scsi_host.h>/* ============================================================= */#define WATCHDOG 5000000#define SYNC_MODE 0		/* Synchronous transfer mode */#if DEBUG#undef NCR53C406A_DEBUG#define NCR53C406A_DEBUG 1#endif#if USE_PIO#define USE_DMA 0#else#define USE_DMA 1#endif/* Default configuration */#define C1_IMG   0x07		/* ID=7 */#define C2_IMG   0x48		/* FE SCSI2 */#if USE_DMA#define C3_IMG   0x21		/* CDB TE */#else#define C3_IMG   0x20		/* CDB */#endif#define C4_IMG   0x04		/* ANE */#define C5_IMG   0xb6		/* AA PI SIE POL */#define REG0 (outb(C4_IMG, CONFIG4))#define REG1 (outb(C5_IMG, CONFIG5))#if NCR53C406A_DEBUG#define DEB(x) x#else#define DEB(x)#endif#if VERBOSE_NCR53C406A_DEBUG#define VDEB(x) x#else#define VDEB(x)#endif#define LOAD_DMA_COUNT(count) \  outb(count & 0xff, TC_LSB); \  outb((count >> 8) & 0xff, TC_MSB); \  outb((count >> 16) & 0xff, TC_HIGH);/* Chip commands */#define DMA_OP               0x80#define SCSI_NOP             0x00#define FLUSH_FIFO           0x01#define CHIP_RESET           0x02#define SCSI_RESET           0x03#define RESELECT             0x40#define SELECT_NO_ATN        0x41#define SELECT_ATN           0x42#define SELECT_ATN_STOP      0x43#define ENABLE_SEL           0x44#define DISABLE_SEL          0x45#define SELECT_ATN3          0x46#define RESELECT3            0x47#define TRANSFER_INFO        0x10#define INIT_CMD_COMPLETE    0x11#define MSG_ACCEPT           0x12#define TRANSFER_PAD         0x18#define SET_ATN              0x1a#define RESET_ATN            0x1b#define SEND_MSG             0x20#define SEND_STATUS          0x21#define SEND_DATA            0x22#define DISCONN_SEQ          0x23#define TERMINATE_SEQ        0x24#define TARG_CMD_COMPLETE    0x25#define DISCONN              0x27#define RECV_MSG             0x28#define RECV_CMD             0x29#define RECV_DATA            0x2a#define RECV_CMD_SEQ         0x2b#define TARGET_ABORT_DMA     0x04/*----------------------------------------------------------------*//* the following will set the monitor border color (useful to find   where something crashed or gets stuck at *//* 1 = blue   2 = green   3 = cyan   4 = red   5 = magenta   6 = yellow   7 = white*/#if NCR53C406A_DEBUG#define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}#else#define rtrc(i) {}#endif/*----------------------------------------------------------------*/enum Phase {	idle,	data_out,	data_in,	command_ph,	status_ph,	message_out,	message_in};/* Static function prototypes */static void NCR53c406a_intr(int, void *, struct pt_regs *);static irqreturn_t do_NCR53c406a_intr(int, void *, struct pt_regs *);static void chip_init(void);static void calc_port_addr(void);#ifndef IRQ_LEVstatic int irq_probe(void);#endif/* ================================================================= */#if USE_BIOSstatic void *bios_base;#endif#if PORT_BASEstatic int port_base = PORT_BASE;#elsestatic int port_base;#endif#if IRQ_LEVstatic int irq_level = IRQ_LEV;#elsestatic int irq_level = -1;	/* 0 is 'no irq', so use -1 for 'uninitialized' */#endif#if USE_DMAstatic int dma_chan;#endif#if USE_PIOstatic int fast_pio = USE_FAST_PIO;#endifstatic Scsi_Cmnd *current_SC;static char info_msg[256];/* ================================================================= *//* possible BIOS locations */#if USE_BIOSstatic void *addresses[] = {	(void *) 0xd8000,	(void *) 0xc8000};#define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))#endif				/* USE_BIOS *//* possible i/o port addresses */static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };#define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))/* possible interrupt channels */static unsigned short intrs[] = { 10, 11, 12, 15 };#define INTR_COUNT (sizeof( intrs ) / sizeof( unsigned short ))/* signatures for NCR 53c406a based controllers */#if USE_BIOSstruct signature {	char *signature;	int sig_offset;	int sig_length;} signatures[] __initdata = {	/*          1         2         3         4         5         6 */	/* 123456789012345678901234567890123456789012345678901234567890 */	{"Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};#define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))#endif				/* USE_BIOS *//* ============================================================ *//* Control Register Set 0 */static int TC_LSB;		/* transfer counter lsb         */static int TC_MSB;		/* transfer counter msb */static int SCSI_FIFO;		/* scsi fifo register   */static int CMD_REG;		/* command register             */static int STAT_REG;		/* status register              */static int DEST_ID;		/* selection/reselection bus id */static int INT_REG;		/* interrupt status register    */static int SRTIMOUT;		/* select/reselect timeout reg  */static int SEQ_REG;		/* sequence step register       */static int SYNCPRD;		/* synchronous transfer period  */static int FIFO_FLAGS;		/* indicates # of bytes in fifo */static int SYNCOFF;		/* synchronous offset register  */static int CONFIG1;		/* configuration register       */static int CLKCONV;		/* clock conversion reg */				/*static int TESTREG;*//* test mode register           */static int CONFIG2;		/* Configuration 2 Register     */static int CONFIG3;		/* Configuration 3 Register     */static int CONFIG4;		/* Configuration 4 Register     */static int TC_HIGH;		/* Transfer Counter High */				/*static int FIFO_BOTTOM;*//* Reserve FIFO byte register   *//* Control Register Set 1 */				/*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */				/*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */				/*static int SRAM_DATA;*//* SRAM data register (r/w) */static int PIO_FIFO;		/* PIO FIFO registers (r/w) */				/*static int PIO_FIFO1;*//*  */				/*static int PIO_FIFO2;*//*  */				/*static int PIO_FIFO3;*//*  */static int PIO_STATUS;		/* PIO status (r/w) */				/*static int ATA_CMD;*//* ATA command/status reg (r/w) */				/*static int ATA_ERR;*//* ATA features/error register (r/w) */static int PIO_FLAG;		/* PIO flag interrupt enable (r/w) */static int CONFIG5;		/* Configuration 5 register (r/w) */				/*static int SIGNATURE;*//* Signature Register (r) */				/*static int CONFIG6;*//* Configuration 6 register (r) *//* ============================================================== */#if USE_DMAstatic __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode){	unsigned limit;	unsigned long flags = 0;	VDEB(printk("dma: before count=%d   ", count));	if (dma_chan <= 3) {		if (count > 65536)			count = 65536;		limit = 65536 - (((unsigned) ptr) & 0xFFFF);	} else {		if (count > (65536 << 1))			count = (65536 << 1);		limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);	}	if (count > limit)		count = limit;	VDEB(printk("after count=%d\n", count));	if ((count & 1) || (((unsigned) ptr) & 1))		panic("NCR53c406a: attempted unaligned DMA transfer\n");	flags = claim_dma_lock();	disable_dma(dma_chan);	clear_dma_ff(dma_chan);	set_dma_addr(dma_chan, (long) ptr);	set_dma_count(dma_chan, count);	set_dma_mode(dma_chan, mode);	enable_dma(dma_chan);	release_dma_lock(flags);	return count;}static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count){	return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);}static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count){	return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);}static __inline__ int NCR53c406a_dma_residual(void){	register int tmp;	unsigned long flags;	flags = claim_dma_lock();	clear_dma_ff(dma_chan);	tmp = get_dma_residue(dma_chan);	release_dma_lock(flags);	return tmp;}#endif				/* USE_DMA */#if USE_PIOstatic __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen){	int i;	int len;		/* current scsi fifo size */	REG1;	while (reqlen) {		i = inb(PIO_STATUS);		/*    VDEB(printk("pio_status=%x\n", i)); */		if (i & 0x80)			return 0;		switch (i & 0x1e) {		default:		case 0x10:			len = 0;			break;		case 0x0:			len = 1;			break;		case 0x8:			len = 42;			break;		case 0xc:			len = 84;			break;		case 0xe:			len = 128;			break;		}		if ((i & 0x40) && len == 0) {	/* fifo empty and interrupt occurred */			return 0;		}		if (len) {			if (len > reqlen)				len = reqlen;			if (fast_pio && len > 3) {				insl(PIO_FIFO, request, len >> 2);				request += len & 0xfc;				reqlen -= len & 0xfc;			} else {				while (len--) {					*request++ = inb(PIO_FIFO);					reqlen--;				}			}		}	}	return 0;}static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen){	int i = 0;	int len;		/* current scsi fifo size */	REG1;	while (reqlen && !(i & 0x40)) {		i = inb(PIO_STATUS);		/*    VDEB(printk("pio_status=%x\n", i)); */		if (i & 0x80)	/* error */			return 0;		switch (i & 0x1e) {		case 0x10:			len = 128;			break;		case 0x0:			len = 84;			break;		case 0x8:			len = 42;			break;		case 0xc:			len = 1;			break;		default:		case 0xe:			len = 0;			break;		}		if (len) {			if (len > reqlen)				len = reqlen;			if (fast_pio && len > 3) {				outsl(PIO_FIFO, request, len >> 2);				request += len & 0xfc;				reqlen -= len & 0xfc;			} else {				while (len--) {					outb(*request++, PIO_FIFO);					reqlen--;				}			}		}	}	return 0;}#endif				/* USE_PIO */static int __init NCR53c406a_detect(Scsi_Host_Template * tpnt){	int present = 0;	struct Scsi_Host *shpnt = NULL;#ifndef PORT_BASE	int i;#endif#if USE_BIOS	int ii, jj;	bios_base = 0;	/* look for a valid signature */	for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)		for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)			if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))				bios_base = addresses[ii];	if (!bios_base) {		printk("NCR53c406a: BIOS signature not found\n");		return 0;	}	DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base);	    );#endif				/* USE_BIOS */#ifdef PORT_BASE	if (!request_region(port_base, 0x10, "NCR53c406a"))	/* ports already snatched */		port_base = 0;#else				/* autodetect */	if (port_base) {	/* LILO override */		if (!request_region(port_base, 0x10, "NCR53c406a"))			port_base = 0;	} else {		for (i = 0; i < PORT_COUNT && !port_base; i++) {			if (!request_region(ports[i], 0x10, "NCR53c406a")) {				DEB(printk("NCR53c406a: port 0x%x in use\n", ports[i]));			} else {				VDEB(printk("NCR53c406a: port 0x%x available\n", ports[i]));				outb(C5_IMG, ports[i] + 0x0d);	/* reg set 1 */				if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {					port_base = ports[i];					VDEB(printk("NCR53c406a: Sig register valid\n"));					VDEB(printk("port_base=0x%x\n", port_base));					break;				}				release_region(ports[i], 0x10);			}		}	}#endif				/* PORT_BASE */	if (!port_base) {	/* no ports found */		printk("NCR53c406a: no available ports found\n");		return 0;	}	DEB(printk("NCR53c406a detected\n"));	calc_port_addr();	chip_init();#ifndef IRQ_LEV	if (irq_level < 0) {	/* LILO override if >= 0 */		irq_level = irq_probe();		if (irq_level < 0) {	/* Trouble */			printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);			goto err_release;		}	}#endif	DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base));	present = 1;	tpnt->proc_name = "NCR53c406a";	shpnt = scsi_register(tpnt, 0);	if (!shpnt) {		printk("NCR53c406a: Unable to register host, giving up.\n");		goto err_release;	}	if (irq_level > 0) {		if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {			printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);			goto err_free_scsi;		}		tpnt->can_queue = 1;		DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));	} else if (irq_level == 0) {		tpnt->can_queue = 0;		DEB(printk("NCR53c406a: No interrupts detected\n"));		printk("NCR53c406a driver no longer supports polling interface\n");		printk("Please email linux-scsi@vger.kernel.org\n");                        #if USE_DMA		printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");#endif				/* USE_DMA */		goto err_free_scsi;	} else {		DEB(printk("NCR53c406a: Shouldn't get here!\n"));		goto err_free_scsi;	}#if USE_DMA

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