omap24xxcam.h

Linux Kernel 2.6.9 for OMAP1710

#define CAMDMA_CCR_ENABLE				(1 <<  7)
#define CAMDMA_CCR_PRIO					(1 <<  6)
#define CAMDMA_CCR_FS					(1 <<  5)
#define CAMDMA_CCR_SYNCHRO				((3 << 19) | (31 << 0))
#define CAMDMA_CCR_SYNCHRO_CAMERA			0x01

#define CAMDMA_CLNK_CTRL_ENABLE_LNK			(1 << 15)
#define CAMDMA_CLNK_CTRL_NEXTLCH_ID			(0x1F << 0)
#define CAMDMA_CLNK_CTRL_NEXTLCH_ID_SHIFT		0

#define CAMDMA_CICR_MISALIGNED_ERR_IE			(1 << 11)
#define CAMDMA_CICR_SUPERVISOR_ERR_IE			(1 << 10)
#define CAMDMA_CICR_SECURE_ERR_IE			(1 <<  9)
#define CAMDMA_CICR_TRANS_ERR_IE			(1 <<  8)
#define CAMDMA_CICR_PACKET_IE				(1 <<  7)
#define CAMDMA_CICR_BLOCK_IE				(1 <<  5)
#define CAMDMA_CICR_LAST_IE				(1 <<  4)
#define CAMDMA_CICR_FRAME_IE				(1 <<  3)
#define CAMDMA_CICR_HALF_IE				(1 <<  2)
#define CAMDMA_CICR_DROP_IE				(1 <<  1)

#define CAMDMA_CSR_MISALIGNED_ERR			(1 << 11)
#define CAMDMA_CSR_SUPERVISOR_ERR			(1 << 10)
#define CAMDMA_CSR_SECURE_ERR				(1 <<  9)
#define CAMDMA_CSR_TRANS_ERR				(1 <<  8)
#define CAMDMA_CSR_PACKET				(1 <<  7)
#define CAMDMA_CSR_SYNC					(1 <<  6)
#define CAMDMA_CSR_BLOCK				(1 <<  5)
#define CAMDMA_CSR_LAST					(1 <<  4)
#define CAMDMA_CSR_FRAME				(1 <<  3)
#define CAMDMA_CSR_HALF					(1 <<  2)
#define CAMDMA_CSR_DROP					(1 <<  1)

#define CAMDMA_CSDP_SRC_ENDIANNESS			(1 << 21)
#define CAMDMA_CSDP_SRC_ENDIANNESS_LOCK			(1 << 20)
#define CAMDMA_CSDP_DST_ENDIANNESS			(1 << 19)
#define CAMDMA_CSDP_DST_ENDIANNESS_LOCK			(1 << 18)
#define CAMDMA_CSDP_WRITE_MODE				(3 << 16)
#define CAMDMA_CSDP_WRITE_MODE_WRNP			(0 << 16)
#define CAMDMA_CSDP_WRITE_MODE_POSTED			(1 << 16)
#define CAMDMA_CSDP_WRITE_MODE_POSTED_LAST_WRNP		(2 << 16)
#define CAMDMA_CSDP_DST_BURST_EN			(3 << 14)
#define CAMDMA_CSDP_DST_BURST_EN_1			(0 << 14)
#define CAMDMA_CSDP_DST_BURST_EN_16			(1 << 14)
#define CAMDMA_CSDP_DST_BURST_EN_32			(2 << 14)
#define CAMDMA_CSDP_DST_BURST_EN_64			(3 << 14)
#define CAMDMA_CSDP_DST_PACKED				(1 << 13)
#define CAMDMA_CSDP_WR_ADD_TRSLT			(15 << 9)
#define CAMDMA_CSDP_WR_ADD_TRSLT_ENABLE_MREQADD		(3 <<  9)
#define CAMDMA_CSDP_SRC_BURST_EN			(3 <<  7)
#define CAMDMA_CSDP_SRC_BURST_EN_1			(0 <<  7)
#define CAMDMA_CSDP_SRC_BURST_EN_16			(1 <<  7)
#define CAMDMA_CSDP_SRC_BURST_EN_32			(2 <<  7)
#define CAMDMA_CSDP_SRC_BURST_EN_64			(3 <<  7)
#define CAMDMA_CSDP_SRC_PACKED				(1 <<  6)
#define CAMDMA_CSDP_RD_ADD_TRSLT			(15 << 2)
#define CAMDMA_CSDP_RD_ADD_TRSLT_ENABLE_MREQADD		(3 <<  2)
#define CAMDMA_CSDP_DATA_TYPE				(3 <<  0)
#define CAMDMA_CSDP_DATA_TYPE_8BITS			(0 <<  0)
#define CAMDMA_CSDP_DATA_TYPE_16BITS			(1 <<  0)
#define CAMDMA_CSDP_DATA_TYPE_32BITS			(2 <<  0)

#define CAMMMU_SYSCONFIG_AUTOIDLE			(1 <<  0)

struct omap24xx_cc_regs {
	u32 revision;			/* 0x000 */
	u32 res1[3];
	u32 sysconfig;			/* 0x010 */
	u32 sysstatus;			/* 0x014 */
	u32 irqstatus;			/* 0x018 */
	u32 irqenable;			/* 0x01C */
	u32 res2[8];
	u32 ctrl;			/* 0x040 */
	u32 ctrl_dma;			/* 0x044 */
	u32 ctrl_xclk;			/* 0x048 */
	u32 fifodata;			/* 0x04C */
	u32 test;			/* 0x050 */
	u32 genpar;			/* 0x054 */
	u32 ccpfscr;			/* 0x058 */
	u32 ccpfecr;			/* 0x05C */
	u32 ccplscr;			/* 0x060 */
	u32 ccplecr;			/* 0x064 */
	u32 ccpdfr;			/* 0x068 */
};
struct omap24xx_vid2_format{
		struct v4l2_pix_format pix;
		__s32	left;   /* following two members are defined to */
		__s32	top;    /* position the video2 layer on the lcd */
		
};

/* forward declarations */
struct omap24xxcam_fh;
struct omap24xxcam_device;



/* camera DMA definitions */
#define DMA_THRESHOLD 32 /* number of bytes transferred per DMA request */
/* NUM_CAMDMA_CHANNELS is the number of logical channels provided by the camera 
 * DMA controller.
 */
#define NUM_CAMDMA_CHANNELS 4
/* NUM_SG_DMA is the number of scatter-gather DMA transfers that can be queued.
 * We need it to be 2 greater than the maximum number of video frames so that 
 * we can use 2 slots for overlay while still having VIDEO_MAX_FRAME slots left 
 * for streaming.
 */
#define NUM_SG_DMA (VIDEO_MAX_FRAME+2)

typedef void (*dma_callback_t)(struct omap24xxcam_device *cam, 
	unsigned long status, void *arg);

struct camdma_state {
	dma_callback_t callback;
	void *arg;
};
struct sgdma_state {
	const struct scatterlist *sglist;
	int sglen;		/* number of sglist entries */
	int next_sglist;	/* index of next sglist entry to process */
	int queued_sglist;	/* number of sglist entries queued for DMA */
	unsigned long csr;	/* DMA return code */
	dma_callback_t callback;
	void *arg;
};

/* per-device data structure */
struct omap24xxcam_device {
	unsigned int irq;
	
	unsigned long cam_mmio_base;
	unsigned long cam_mmio_base_phys;
	unsigned long cam_mmio_size;
	
	unsigned long dispc_mmio_base;
	unsigned long dispc_mmio_base_phys;
	unsigned long dispc_mmio_size;

	unsigned long overlay_base;
	unsigned long overlay_base_phys;
	unsigned long overlay_size;

	/* camera DMA management */
	spinlock_t dma_lock;
	/* While dma_stop!=0, an attempt to start a new DMA transfer will 
	 * fail.
	 */
	int dma_stop;
	int free_dmach;	/* number of dma channels free */
	int next_dmach; /* index of next dma channel to use */
	struct camdma_state camdma[NUM_CAMDMA_CHANNELS];
	/* dma_notify is a pointer to a callback routine for notification when 
	 * a DMA transfer has been started.
	 */
	void (*dma_notify)(struct omap24xxcam_device *cam);

	/* frequncy (in Hz) of camera interface functional clock (MCLK) */
	unsigned long mclk;

	struct device dev;
	struct video_device *vfd;

	spinlock_t overlay_lock;	/* spinlock for overlay DMA counter */
	int overlay_cnt;		/* count of queued overlay DMA xfers */
	struct scatterlist overlay_sglist;

	spinlock_t vbq_lock;		/* spinlock for videobuf queues */
	struct videobuf_queue_ops vbq_ops;	/* videobuf queue operations */
	unsigned long field_count;	/* field counter for videobuf_buffer */

	/* scatter-gather DMA management */
	spinlock_t sg_lock;
	int free_sgdma;	/* number of free sg dma slots */
	int next_sgdma;	/* index of next sg dma slot to use */
	struct sgdma_state sgdma[NUM_SG_DMA];

	/* The img_lock is used to serialize access to the image parameters for 
	 * overlay and capture.
	 */
	spinlock_t img_lock;

 	/* Access to everything below here is locked by img_lock */
 	
 	/* We allow streaming from at most one filehandle at a time.  
 	 * non-NULL means streaming is in progress.
 	 */
	struct omap24xxcam_fh *streaming;
	/* We allow previewing from at most one filehandle at a time.  
	 * non-NULL means previewing is in progress.
	 */
	struct omap24xxcam_fh *previewing;

	/* capture parameters (frame rate, number of buffers) */
	struct v4l2_captureparm cparm;

	/* This is the frame period actually requested by the user. */
	struct v4l2_fract nominal_timeperframe;

	/* frequency (in Hz) of camera interface xclk output */
	unsigned long xclk;

	/* pointer to camera sensor interface interface */
	struct camera_sensor *cam_sensor;
	/* blind pointer to private data structure for sensor */
	void *sensor;
	
	/* pix defines the size and pixel format of the image captured by the 
	 * sensor.  This also defines the size of the framebuffers.  The 
	 * same pool of framebuffers is used for video capture and video 
	 * overlay.  These parameters are set/queried by the 
	 * VIDIOC_S_FMT/VIDIOC_G_FMT ioctls with a CAPTURE buffer type.
	 */
	struct v4l2_pix_format pix;

	/* crop defines the size and offset of the video overlay source window 
	 * within the framebuffer.  These parameters are set/queried by the 
	 * VIDIOC_S_CROP/VIDIOC_G_CROP ioctls with an OVERLAY buffer type.  
	 * The cropping rectangle allows a subset of the captured image to be 
	 * previewed.  It only affects the portion of the image previewed, not 
	 * captured; the entire camera image is always captured.
	 */
	struct v4l2_rect crop;

	/* win defines the size and offset of the video overlay target window 
	 * within the video display.  These parameters are set/queried by the 
	 * VIDIOC_S_FMT/VIDIOC_G_FMT ioctls with an OVERLAY buffer type.
	 */
	struct v4l2_window win;

	/* fbuf reflects the size of the video display.  It is queried with the 
	 * VIDIOC_G_FBUF ioctl.  The size of the video display cannot be 
	 * changed with the VIDIOC_S_FBUF ioctl.
	 */
	struct v4l2_framebuffer fbuf;


	/* value of CC_CTRL register required to support current capture 
	 * format
	 */
	unsigned long cc_ctrl;

	/* display controller video window (0 or 1) to use for capture 
	 * preview
	 */
	int vid1;

	/* gfx_position x and y are the offset of the display controller 
	 * graphics window with respect to the display
	 */
	int gfx_position_x;
	int gfx_position_y;
	/* value of GFX_ATTRIBUTES register from display controller */
	unsigned long gfx_attributes;


	/* video 2 layer of the display controller is also configured through
	** it */
	int vid2;
	unsigned long video2_base;
	unsigned long video2_base_phys;
	unsigned long video2_size;
};

/* per-filehandle data structure */
struct omap24xxcam_fh {
	struct omap24xxcam_device *cam;
	enum v4l2_buf_type type;
	struct videobuf_queue vbq;
};

/* Selected register definitions from the framebuffer driver for the 
 * OMAP2420 display controller are repeated here.
 */
#ifndef OMAP24XXFB_H

/* physical memory map definitions */
	/* display subsystem */
#define DSS_REG_BASE		0x48050000
#define DSS_REG_SIZE		0x00001000
	/* display controller */
#define DISPC_REG_OFFSET	0x00000400

/* define display controller register offsets */
#define DISPC_REVISION			0x000
#define DISPC_SYSCONFIG			0x010
#define DISPC_SYSSTATUS			0x014
#define DISPC_IRQSTATUS			0x018
#define DISPC_IRQENABLE			0x01C