📄 ves1x93.c
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/* Driver for VES1893 and VES1993 QPSK Frontends Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> Copyright (C) 2001 Ronny Strutz <3des@elitedvb.de> Copyright (C) 2002 Dennis Noermann <dennis.noermann@noernet.de> Copyright (C) 2002-2003 Andreas Oberritter <obi@linuxtv.org> This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.*/ #include <linux/kernel.h>#include <linux/module.h>#include <linux/init.h>#include <linux/string.h>#include <linux/slab.h>#include "dvb_frontend.h"#include "dvb_functions.h"static int debug = 0;#define dprintk if (debug) printkstatic int board_type = 0;#define BOARD_SIEMENS_PCI 0#define BOARD_NOKIA_DBOX2 1#define BOARD_SAGEM_DBOX2 2static int demod_type = 0;#define DEMOD_VES1893 0#define DEMOD_VES1993 1static struct dvb_frontend_info ves1x93_info = { .name = "VES1x93", .type = FE_QPSK, .frequency_min = 950000, .frequency_max = 2150000, .frequency_stepsize = 250, /* kHz for QPSK frontends */ .frequency_tolerance = 29500, .symbol_rate_min = 1000000, .symbol_rate_max = 45000000,/* .symbol_rate_tolerance = ???,*/ .notifier_delay = 50, /* 1/20 s */ .caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | FE_CAN_QPSK};/** * nokia dbox2 (ves1893) and sagem dbox2 (ves1993) * need bit AGCR[PWMS] set to 1 */static u8 init_1893_tab [] = { 0x01, 0xa4, 0x35, 0x80, 0x2a, 0x0b, 0x55, 0xc4, 0x09, 0x69, 0x00, 0x86, 0x4c, 0x28, 0x7f, 0x00, 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x21, 0xb0, 0x14, 0x00, 0xdc, 0x00, 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x7f, 0x00};static u8 init_1993_tab [] = { 0x00, 0x9c, 0x35, 0x80, 0x6a, 0x09, 0x72, 0x8c, 0x09, 0x6b, 0x00, 0x00, 0x4c, 0x08, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x40, 0x21, 0xb0, 0x00, 0x00, 0x00, 0x10, 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x0e, 0x80, 0x00};static u8 * init_1x93_tab;static u8 init_1893_wtab[] ={ 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0, 0,1,0,0,0,0,0,0, 1,0,1,1,0,0,0,1, 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0, 1,1,1,0,1,1};static u8 init_1993_wtab[] ={ 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0, 0,1,0,0,0,0,0,0, 1,1,1,1,0,0,0,1, 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0, 1,1,1,0,1,1,1,1, 1,1,1,1,1};struct ves1x93_state { fe_spectral_inversion_t inversion;};static int ves1x93_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data){ u8 buf [] = { 0x00, reg, data }; struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = buf, .len = 3 }; int err; if ((err = i2c->xfer (i2c, &msg, 1)) != 1) { dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data); return -EREMOTEIO; } return 0;}static u8 ves1x93_readreg (struct dvb_i2c_bus *i2c, u8 reg){ int ret; u8 b0 [] = { 0x00, reg }; u8 b1 [] = { 0 }; struct i2c_msg msg [] = { { .addr = 0x08, .flags = 0, .buf = b0, .len = 2 }, { .addr = 0x08, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; ret = i2c->xfer (i2c, msg, 2); if (ret != 2) dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret); return b1[0];}static int tuner_write (struct dvb_i2c_bus *i2c, u8 *data, u8 len){ int ret; struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = len }; ves1x93_writereg(i2c, 0x00, 0x11); ret = i2c->xfer (i2c, &msg, 1); ves1x93_writereg(i2c, 0x00, 0x01); if (ret != 1) printk("%s: i/o error (ret == %i)\n", __FUNCTION__, ret); return (ret != 1) ? -1 : 0;}/** * set up the downconverter frequency divisor for a * reference clock comparision frequency of 125 kHz. */static int sp5659_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, u8 pwr){ u32 div = (freq + 479500) / 125; u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, 0x95, (pwr << 5) | 0x30 }; return tuner_write (i2c, buf, sizeof(buf));}static int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq){ int ret; u8 buf [2]; freq /= 1000; buf[0] = (freq >> 8) & 0x7F; buf[1] = freq & 0xFF; ret = tuner_write(i2c, buf, sizeof(buf)); return ret;}static int tuner_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, u8 pwr){ if ((demod_type == DEMOD_VES1893) && (board_type == BOARD_SIEMENS_PCI)) return sp5659_set_tv_freq (i2c, freq, pwr); else if (demod_type == DEMOD_VES1993) return tsa5059_set_tv_freq (i2c, freq); return -EINVAL;}static int ves1x93_init (struct dvb_i2c_bus *i2c){ int i; int size; u8 *init_1x93_wtab; dprintk("%s: init chip\n", __FUNCTION__); switch (demod_type) { case DEMOD_VES1893: init_1x93_tab = init_1893_tab; init_1x93_wtab = init_1893_wtab; size = sizeof(init_1893_tab); if (board_type == BOARD_NOKIA_DBOX2) init_1x93_tab[0x05] |= 0x20; /* invert PWM */ break; case DEMOD_VES1993: init_1x93_tab = init_1993_tab; init_1x93_wtab = init_1993_wtab; size = sizeof(init_1993_tab); if (board_type == BOARD_SAGEM_DBOX2) init_1x93_tab[0x05] |= 0x20; /* invert PWM */ break; default: return -EINVAL; } for (i = 0; i < size; i++) if (init_1x93_wtab[i]) ves1x93_writereg (i2c, i, init_1x93_tab[i]); if (demod_type == DEMOD_VES1993) { if (board_type == BOARD_NOKIA_DBOX2) tuner_write(i2c, "\x06\x5c\x83\x60", 4); else if (board_type == BOARD_SAGEM_DBOX2) tuner_write(i2c, "\x25\x70\x92\x40", 4); } return 0;}static int ves1x93_clr_bit (struct dvb_i2c_bus *i2c){ ves1x93_writereg (i2c, 0, init_1x93_tab[0] & 0xfe); ves1x93_writereg (i2c, 0, init_1x93_tab[0]); dvb_delay(5); return 0;}static int ves1x93_init_aquire (struct dvb_i2c_bus *i2c){ ves1x93_writereg (i2c, 3, 0x00); ves1x93_writereg (i2c, 3, init_1x93_tab[3]); dvb_delay(5); return 0;}static int ves1x93_set_inversion (struct dvb_i2c_bus *i2c, fe_spectral_inversion_t inversion){ u8 val; /* * inversion on/off are interchanged because i and q seem to * be swapped on the hardware */ switch (inversion) { case INVERSION_OFF: val = 0xc0; break; case INVERSION_ON: val = 0x80; break; case INVERSION_AUTO: val = 0x00; break; default: return -EINVAL; } return ves1x93_writereg (i2c, 0x0c, (init_1x93_tab[0x0c] & 0x3f) | val);}static int ves1x93_set_fec (struct dvb_i2c_bus *i2c, fe_code_rate_t fec){ if (fec == FEC_AUTO) return ves1x93_writereg (i2c, 0x0d, 0x08); else if (fec < FEC_1_2 || fec > FEC_8_9) return -EINVAL; else return ves1x93_writereg (i2c, 0x0d, fec - FEC_1_2);}static fe_code_rate_t ves1x93_get_fec (struct dvb_i2c_bus *i2c){ return FEC_1_2 + ((ves1x93_readreg (i2c, 0x0d) >> 4) & 0x7);}static int ves1x93_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate){ u32 BDR; u32 ratio; u8 ADCONF, FCONF, FNR; u32 BDRI; u32 tmp; u32 XIN, FIN; dprintk("%s: srate == %d\n", __FUNCTION__, (unsigned int) srate); switch (board_type) { case BOARD_SIEMENS_PCI: XIN = 90100000UL; break; case BOARD_NOKIA_DBOX2: if (demod_type == DEMOD_VES1893) XIN = 91000000UL; else if (demod_type == DEMOD_VES1993)
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