mpc85xx_cds_common.c

来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 470 行 · 第 1/2 页

	immap->im_intctl.ic_sicr = 0;
	immap->im_intctl.ic_scprrh = 0x05309770;
	immap->im_intctl.ic_scprrl = 0x05309770;

	request_irq(MPC85xx_IRQ_CPM, cpm2_cascade, SA_INTERRUPT, "cpm2_cascade", NULL);
#endif

        return;
}

#ifdef CONFIG_PCI
/*
 * interrupt routing
 */
int
mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);

	if (!hose->index)
	{
		/* Handle PCI1 interrupts */
		char pci_irq_table[][4] =
			/*
			 *      PCI IDSEL/INTPIN->INTLINE
			 *        A      B      C      D
			 */

			/* Note IRQ assignment for slots is based on which slot the elysium is
			 * in -- in this setup elysium is in slot #2 (this PIRQA as first
			 * interrupt on slot */
		{
			{ 0, 1, 2, 3 }, /* 16 - PMC */
			{ 3, 0, 0, 0 }, /* 17 P2P (Tsi320) */
			{ 0, 1, 2, 3 }, /* 18 - Slot 1 */
			{ 1, 2, 3, 0 }, /* 19 - Slot 2 */
			{ 2, 3, 0, 1 }, /* 20 - Slot 3 */
			{ 3, 0, 1, 2 }, /* 21 - Slot 4 */
		};

		const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4;
		int i, j;

		for (i = 0; i < 6; i++)
			for (j = 0; j < 4; j++)
				pci_irq_table[i][j] =
					((pci_irq_table[i][j] + 5 -
					  cds_pci_slot) & 0x3) + PIRQ0A;

		return PCI_IRQ_TABLE_LOOKUP;
	} else {
		/* Handle PCI2 interrupts (if we have one) */
		char pci_irq_table[][4] =
		{
			/*
			 * We only have one slot and one interrupt
			 * going to PIRQA - PIRQD */
			{ PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */
		};

		const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4;

		return PCI_IRQ_TABLE_LOOKUP;
	}
}

#define ARCADIA_HOST_BRIDGE_IDSEL     17
#define ARCADIA_2ND_BRIDGE_IDSEL     3

int
mpc85xx_exclude_device(u_char bus, u_char devfn)
{
	if (bus == 0 && PCI_SLOT(devfn) == 0)
		return PCIBIOS_DEVICE_NOT_FOUND;
#ifdef CONFIG_85xx_PCI2
	/* With the current code we know PCI2 will be bus 2, however this may
	 * not be guarnteed */
	if (bus == 2 && PCI_SLOT(devfn) == 0)
		return PCIBIOS_DEVICE_NOT_FOUND;
#endif
	/* We explicitly do not go past the Tundra 320 Bridge */
	if (bus == 1)
		return PCIBIOS_DEVICE_NOT_FOUND;
	if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
		return PCIBIOS_DEVICE_NOT_FOUND;
	else
		return PCIBIOS_SUCCESSFUL;
}
#endif /* CONFIG_PCI */

/* ************************************************************************
 *
 * Setup the architecture
 *
 */
static void __init
mpc85xx_cds_setup_arch(void)
{
        struct ocp_def *def;
        struct ocp_gfar_data *einfo;
        bd_t *binfo = (bd_t *) __res;
        unsigned int freq;

        /* get the core frequency */
        freq = binfo->bi_intfreq;

        printk("mpc85xx_cds_setup_arch\n");

#ifdef CONFIG_CPM2
	cpm2_reset();
#endif

	cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
	cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
	printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot);

        /* Set loops_per_jiffy to a half-way reasonable value,
           for use until calibrate_delay gets called. */
        loops_per_jiffy = freq / HZ;

#ifdef CONFIG_PCI
        /* setup PCI host bridges */
        mpc85xx_setup_hose();
#endif

#ifdef CONFIG_SERIAL_8250
        mpc85xx_early_serial_map();
#endif

#ifdef CONFIG_SERIAL_TEXT_DEBUG
	/* Invalidate the entry we stole earlier the serial ports
	 * should be properly mapped */
	invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif

        def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0);
        if (def) {
                einfo = (struct ocp_gfar_data *) def->additions;
                memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6);
        }

        def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
        if (def) {
                einfo = (struct ocp_gfar_data *) def->additions;
                memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
        }

#ifdef CONFIG_BLK_DEV_INITRD
        if (initrd_start)
                ROOT_DEV = Root_RAM0;
        else
#endif
#ifdef  CONFIG_ROOT_NFS
                ROOT_DEV = Root_NFS;
#else
                ROOT_DEV = Root_HDA1;
#endif

	ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
}

/* ************************************************************************ */
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
              unsigned long r6, unsigned long r7)
{
        /* parse_bootinfo must always be called first */
        parse_bootinfo(find_bootinfo());

        /*
         * If we were passed in a board information, copy it into the
         * residual data area.
         */
        if (r3) {
                memcpy((void *) __res, (void *) (r3 + KERNELBASE),
                       sizeof (bd_t));

        }
#ifdef CONFIG_SERIAL_TEXT_DEBUG
	{
		bd_t *binfo = (bd_t *) __res;

		/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
		settlbcam(NUM_TLBCAMS - 1, binfo->bi_immr_base,
			binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);

	}
#endif

#if defined(CONFIG_BLK_DEV_INITRD)
        /*
         * If the init RAM disk has been configured in, and there's a valid
         * starting address for it, set it up.
         */
        if (r4) {
                initrd_start = r4 + KERNELBASE;
                initrd_end = r5 + KERNELBASE;
        }
#endif                          /* CONFIG_BLK_DEV_INITRD */

        /* Copy the kernel command line arguments to a safe place. */

        if (r6) {
                *(char *) (r7 + KERNELBASE) = 0;
                strcpy(cmd_line, (char *) (r6 + KERNELBASE));
        }

        /* setup the PowerPC module struct */
        ppc_md.setup_arch = mpc85xx_cds_setup_arch;
        ppc_md.show_cpuinfo = mpc85xx_cds_show_cpuinfo;

        ppc_md.init_IRQ = mpc85xx_cds_init_IRQ;
        ppc_md.get_irq = openpic_get_irq;

        ppc_md.restart = mpc85xx_restart;
        ppc_md.power_off = mpc85xx_power_off;
        ppc_md.halt = mpc85xx_halt;

        ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;

        ppc_md.time_init = NULL;
        ppc_md.set_rtc_time = NULL;
        ppc_md.get_rtc_time = NULL;
        ppc_md.calibrate_decr = mpc85xx_calibrate_decr;

#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
        ppc_md.progress = gen550_progress;
#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */

        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_cds_init(): exit", 0);

        return;
}