setup.c

来自「Linux Kernel 2.6.9 for OMAP1710」· C语言 代码 · 共 1,210 行 · 第 1/3 页

C
1,210
字号
};static void __init init_intel(struct cpuinfo_x86 *c){	/* Cache sizes */	unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; 	unsigned n;	if (c->cpuid_level > 1) {		/* supports eax=2  call */		int i, j, n;		int regs[4];		unsigned char *dp = (unsigned char *)regs;		/* Number of times to iterate */		n = cpuid_eax(2) & 0xFF;		for ( i = 0 ; i < n ; i++ ) {			cpuid(2, &regs[0], &regs[1], &regs[2], &regs[3]);						/* If bit 31 is set, this is an unknown format */			for ( j = 0 ; j < 3 ; j++ ) {				if ( regs[j] < 0 ) regs[j] = 0;			}			/* Byte 0 is level count, not a descriptor */			for ( j = 1 ; j < 16 ; j++ ) {				unsigned char des = dp[j];				unsigned char k = 0;				/* look up this descriptor in the table */				while (cache_table[k].descriptor != 0)				{					if (cache_table[k].descriptor == des) {						switch (cache_table[k].cache_type) {						case LVL_1_INST:							l1i += cache_table[k].size;							break;						case LVL_1_DATA:							l1d += cache_table[k].size;							break;						case LVL_2:							l2 += cache_table[k].size;							break;						case LVL_3:							l3 += cache_table[k].size;							break;						case LVL_TRACE:							trace += cache_table[k].size;							break;						}						break;					}					k++;				}			}		}		if (trace)			printk (KERN_INFO "CPU: Trace cache: %dK uops", trace);		else if (l1i)			printk (KERN_INFO "CPU: L1 I cache: %dK", l1i);		if (l1d)			printk(", L1 D cache: %dK\n", l1d);		else			printk("\n"); 		if (l2)			printk(KERN_INFO "CPU: L2 cache: %dK\n", l2);		if (l3)			printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);		c->x86_cache_size = l2 ? l2 : (l1i+l1d);	}	n = cpuid_eax(0x80000000);	if (n >= 0x80000008) {		unsigned eax = cpuid_eax(0x80000008);		c->x86_virt_bits = (eax >> 8) & 0xff;		c->x86_phys_bits = eax & 0xff;	}	if (c->x86 == 15)		c->x86_cache_alignment = c->x86_clflush_size * 2;}void __init get_cpu_vendor(struct cpuinfo_x86 *c){	char *v = c->x86_vendor_id;	if (!strcmp(v, "AuthenticAMD"))		c->x86_vendor = X86_VENDOR_AMD;	else if (!strcmp(v, "GenuineIntel"))		c->x86_vendor = X86_VENDOR_INTEL;	else		c->x86_vendor = X86_VENDOR_UNKNOWN;}struct cpu_model_info {	int vendor;	int family;	char *model_names[16];};/* Do some early cpuid on the boot CPU to get some parameter that are   needed before check_bugs. Everything advanced is in identify_cpu   below. */void __init early_identify_cpu(struct cpuinfo_x86 *c){	u32 tfms;	c->loops_per_jiffy = loops_per_jiffy;	c->x86_cache_size = -1;	c->x86_vendor = X86_VENDOR_UNKNOWN;	c->x86_model = c->x86_mask = 0;	/* So far unknown... */	c->x86_vendor_id[0] = '\0'; /* Unset */	c->x86_model_id[0] = '\0';  /* Unset */	c->x86_clflush_size = 64;	c->x86_cache_alignment = c->x86_clflush_size;	c->x86_num_cores = 1;	c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;	memset(&c->x86_capability, 0, sizeof c->x86_capability);	/* Get vendor name */	cpuid(0x00000000, &c->cpuid_level,	      (int *)&c->x86_vendor_id[0],	      (int *)&c->x86_vendor_id[8],	      (int *)&c->x86_vendor_id[4]);			get_cpu_vendor(c);	/* Initialize the standard set of capabilities */	/* Note that the vendor-specific code below might override */	/* Intel-defined flags: level 0x00000001 */	if (c->cpuid_level >= 0x00000001) {		__u32 misc;		cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],		      &c->x86_capability[0]);		c->x86 = (tfms >> 8) & 0xf;		c->x86_model = (tfms >> 4) & 0xf;		c->x86_mask = tfms & 0xf;		if (c->x86 == 0xf) {			c->x86 += (tfms >> 20) & 0xff;			c->x86_model += ((tfms >> 16) & 0xF) << 4;		} 		if (c->x86_capability[0] & (1<<19)) 			c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;		c->x86_apicid = misc >> 24;	} else {		/* Have CPUID level 0 only - unheard of */		c->x86 = 4;	}}/* * This does the hard work of actually picking apart the CPU stuff... */void __init identify_cpu(struct cpuinfo_x86 *c){	int i;	u32 xlvl;	early_identify_cpu(c);	/* AMD-defined flags: level 0x80000001 */	xlvl = cpuid_eax(0x80000000);	if ( (xlvl & 0xffff0000) == 0x80000000 ) {		if ( xlvl >= 0x80000001 ) {			c->x86_capability[1] = cpuid_edx(0x80000001);			c->x86_capability[5] = cpuid_ecx(0x80000001);		}		if ( xlvl >= 0x80000004 )			get_model_name(c); /* Default name */	}	/* Transmeta-defined flags: level 0x80860001 */	xlvl = cpuid_eax(0x80860000);	if ( (xlvl & 0xffff0000) == 0x80860000 ) {		if (  xlvl >= 0x80860001 )			c->x86_capability[2] = cpuid_edx(0x80860001);	}	/*	 * Vendor-specific initialization.  In this section we	 * canonicalize the feature flags, meaning if there are	 * features a certain CPU supports which CPUID doesn't	 * tell us, CPUID claiming incorrect flags, or other bugs,	 * we handle them here.	 *	 * At the end of this section, c->x86_capability better	 * indicate the features this CPU genuinely supports!	 */	switch ( c->x86_vendor ) {		case X86_VENDOR_AMD:			init_amd(c);			break;		case X86_VENDOR_INTEL:			init_intel(c); 			break; 		case X86_VENDOR_UNKNOWN:		default:			display_cacheinfo(c);			break;	}	select_idle_routine(c);	detect_ht(c); 			/*	 * On SMP, boot_cpu_data holds the common feature set between	 * all CPUs; so make sure that we indicate which features are	 * common between the CPUs.  The first time this routine gets	 * executed, c == &boot_cpu_data.	 */	if ( c != &boot_cpu_data ) {		/* AND the already accumulated flags with these */		for ( i = 0 ; i < NCAPINTS ; i++ )			boot_cpu_data.x86_capability[i] &= c->x86_capability[i];	}	mcheck_init(c);} void __init print_cpu_info(struct cpuinfo_x86 *c){	if (c->x86_model_id[0])		printk("%s", c->x86_model_id);	if (c->x86_mask || c->cpuid_level >= 0) 		printk(" stepping %02x\n", c->x86_mask);	else		printk("\n");}/* *	Get CPU information for use by the procfs. */static int show_cpuinfo(struct seq_file *m, void *v){	struct cpuinfo_x86 *c = v;	/* 	 * These flag bits must match the definitions in <asm/cpufeature.h>.	 * NULL means this bit is undefined or reserved; either way it doesn't	 * have meaning as far as Linux is concerned.  Note that it's important	 * to realize there is a difference between this table and CPUID -- if	 * applications want to get the raw CPUID data, they should access	 * /dev/cpu/<cpu_nr>/cpuid instead.	 */	static char *x86_cap_flags[] = {		/* Intel-defined */	        "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",	        "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",	        "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",	        "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,		/* AMD-defined */		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,		NULL, NULL, NULL, NULL, NULL, "lm", "3dnowext", "3dnow",		/* Transmeta-defined */		"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		/* Other (Linux-defined) */		"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		/* Intel-defined (#2) */		"pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",		"tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,	};	static char *x86_power_flags[] = { 		"ts",	/* temperature sensor */		"fid",  /* frequency id control */		"vid",  /* voltage id control */		"ttp",  /* thermal trip */	};#ifdef CONFIG_SMP	if (!cpu_online(c-cpu_data))		return 0;#endif	seq_printf(m,"processor\t: %u\n"		     "vendor_id\t: %s\n"		     "cpu family\t: %d\n"		     "model\t\t: %d\n"		     "model name\t: %s\n",		     (unsigned)(c-cpu_data),		     c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",		     c->x86,		     (int)c->x86_model,		     c->x86_model_id[0] ? c->x86_model_id : "unknown");		if (c->x86_mask || c->cpuid_level >= 0)		seq_printf(m, "stepping\t: %d\n", c->x86_mask);	else		seq_printf(m, "stepping\t: unknown\n");		if (cpu_has(c,X86_FEATURE_TSC)) {		seq_printf(m, "cpu MHz\t\t: %u.%03u\n",			     cpu_khz / 1000, (cpu_khz % 1000));	}	/* Cache size */	if (c->x86_cache_size >= 0) 		seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);	#ifdef CONFIG_X86_HT	if (cpu_has_ht) {		seq_printf(m, "physical id\t: %d\n", phys_proc_id[c - cpu_data]);		seq_printf(m, "siblings\t: %d\n", smp_num_siblings);	}#endif		seq_printf(m,	        "fpu\t\t: yes\n"	        "fpu_exception\t: yes\n"	        "cpuid level\t: %d\n"	        "wp\t\t: yes\n"	        "flags\t\t:",		   c->cpuid_level);	{ 		int i; 		for ( i = 0 ; i < 32*NCAPINTS ; i++ )			if ( test_bit(i, &c->x86_capability) &&			     x86_cap_flags[i] != NULL )				seq_printf(m, " %s", x86_cap_flags[i]);	}			seq_printf(m, "\nbogomips\t: %lu.%02lu\n",		   c->loops_per_jiffy/(500000/HZ),		   (c->loops_per_jiffy/(5000/HZ)) % 100);	if (c->x86_tlbsize > 0) 		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);	seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n", 		   c->x86_phys_bits, c->x86_virt_bits);	seq_printf(m, "power management:");	{		unsigned i;		for (i = 0; i < 32; i++) 			if (c->x86_power & (1 << i)) {				if (i < ARRAY_SIZE(x86_power_flags))					seq_printf(m, " %s", x86_power_flags[i]);				else					seq_printf(m, " [%d]", i);			}	}	if (c->x86_num_cores > 1)		seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);	seq_printf(m, "\n\n"); 	return 0;}static void *c_start(struct seq_file *m, loff_t *pos){	return *pos < NR_CPUS ? cpu_data + *pos : NULL;}static void *c_next(struct seq_file *m, void *v, loff_t *pos){	++*pos;	return c_start(m, pos);}static void c_stop(struct seq_file *m, void *v){}struct seq_operations cpuinfo_op = {	.start =c_start,	.next =	c_next,	.stop =	c_stop,	.show =	show_cpuinfo,};

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?