debug.s
来自「Linux Kernel 2.6.9 for OMAP1710」· S 代码 · 共 781 行 · 第 1/2 页
S
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.macro senduart,rd,rx str \rd, [\rx, #UART_TD(0)] .endm .macro waituart,rd,rx1001: ldr \rd, [\rx, #UART_TSR(0)] and \rd, \rd, #UART_TSR_TX_LEVEL_MSK cmp \rd, #15 beq 1001b .endm .macro busyuart,rd,rx1001: ldr \rd, [\rx, #UART_TSR(0)] ands \rd, \rd, #UART_TSR_TX_LEVEL_MSK bne 1001b .endm#elif defined(CONFIG_ARCH_IOP3XX) .macro addruart,rx mov \rx, #0xfe000000 @ physical#if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244) orr \rx, \rx, #0x00800000 @ location of the UART#elif defined(CONFIG_ARCH_IOP331) mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0x000fe000 @ Physical Base movne \rx, #0 orr \rx, \rx, #0xfe000000 orr \rx, \rx, #0x00f00000 @ Virtual Base orr \rx, \rx, #0x00001700 @ location of the UART#else#error Unknown IOP3XX implementation#endif .endm .macro senduart,rd,rx strb \rd, [\rx] .endm .macro busyuart,rd,rx1002: ldrb \rd, [\rx, #0x5] and \rd, \rd, #0x60 teq \rd, #0x60 bne 1002b .endm .macro waituart,rd,rx#if !defined(CONFIG_ARCH_IQ80321) || !defined(CONFIG_ARCH_IQ31244) || !defined(CONFIG_ARCH_IQ80331)1001: ldrb \rd, [\rx, #0x6] tst \rd, #0x10 beq 1001b#endif .endm#elif defined(CONFIG_ARCH_IXP4XX) .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0xc8000000 movne \rx, #0xff000000 add \rx,\rx,#3 @ Uart regs are at off set of 3 if @ byte writes used - Big Endian. .endm .macro senduart,rd,rx strb \rd, [\rx] .endm .macro waituart,rd,rx1002: ldrb \rd, [\rx, #0x14] and \rd, \rd, #0x60 @ check THRE and TEMT bits teq \rd, #0x60 bne 1002b .endm .macro busyuart,rd,rx .endm#elif defined(CONFIG_ARCH_IXP2000) .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0xc0000000 @ Physical base movne \rx, #0xfe000000 @ virtual base orrne \rx, \rx, #0x00f00000 orr \rx, \rx, #0x00030000#ifdef __ARMEB__ orr \rx, \rx, #0x00000003#endif .endm .macro senduart,rd,rx strb \rd, [\rx] .endm .macro busyuart,rd,rx1002: ldrb \rd, [\rx, #0x14] tst \rd, #0x20 beq 1002b .endm .macro waituart,rd,rx nop nop nop .endm#elif defined(CONFIG_ARCH_OMAP) || defined(CONFIG_ARCH_OMAP24XX) .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled?#ifdef CONFIG_ARCH_OMAP moveq \rx, #0xff000000 @ physical base address movne \rx, #0xfe000000 @ virtual base orr \rx, \rx, #0x00fb0000#ifdef CONFIG_OMAP_LL_DEBUG_UART3 orr \rx, \rx, #0x00009000 @ UART 3#endif#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) orr \rx, \rx, #0x00000800 @ UART 2 & 3#endif#endif#ifdef CONFIG_ARCH_OMAP24XX moveq \rx, #0x48000000 @ physical base address movne \rx, #0xd8000000 @ virtual base orr \rx, \rx, #0x0006a000#ifdef CONFIG_OMAP_LL_DEBUG_UART2 orr \rx, \rx, #0x0006c000 @ UART 2#endif#ifdef CONFIG_OMAP_LL_DEBUG_UART3 orr \rx, \rx, #0x0006e000 @ UART 3#endif#endif .endm .macro senduart,rd,rx strb \rd, [\rx] .endm .macro busyuart,rd,rx1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends and \rd, \rd, #0x60 teq \rd, #0x60#ifdef CONFIG_ARCH_OMAP730 beq 1002f ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only and \rd, \rd, #0x60 teq \rd, #0x60#endif bne 1001b1002: .endm .macro waituart,rd,rx .endm#elif defined(CONFIG_ARCH_S3C2410)#include <asm/arch/map.h>#include <asm/arch/regs-serial.h> .macro addruart, rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 ldreq \rx, = S3C2410_PA_UART ldrne \rx, = S3C2410_VA_UART#if CONFIG_DEBUG_S3C2410_UART != 0 add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)#endif .endm .macro senduart,rd,rx str \rd, [\rx, # S3C2410_UTXH ] .endm .macro busyuart, rd, rx ldr \rd, [ \rx, # S3C2410_UFCON ] tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? beq 1001f @ @ FIFO enabled...1003: ldr \rd, [ \rx, # S3C2410_UFSTAT ] tst \rd, #S3C2410_UFSTAT_TXFULL bne 1003b b 1002f1001: @ busy waiting for non fifo ldr \rd, [ \rx, # S3C2410_UTRSTAT ] tst \rd, #S3C2410_UTRSTAT_TXFE beq 1001b1002: @ exit busyuart .endm .macro waituart,rd,rx ldr \rd, [ \rx, # S3C2410_UFCON ] tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? beq 1001f @ @ FIFO enabled...1003: ldr \rd, [ \rx, # S3C2410_UFSTAT ] ands \rd, \rd, #15<<S3C2410_UFSTAT_TXSHIFT bne 1003b b 1002f1001: @ idle waiting for non fifo ldr \rd, [ \rx, # S3C2410_UTRSTAT ] tst \rd, #S3C2410_UTRSTAT_TXFE beq 1001b1002: @ exit busyuart .endm#elif defined(CONFIG_ARCH_LH7A40X) @ It is not known if this will be appropriate for every 40x @ board. .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? mov \rx, #0x00000700 @ offset from base orreq \rx, \rx, #0x80000000 @ physical base orrne \rx, \rx, #0xf8000000 @ virtual base .endm .macro senduart,rd,rx strb \rd, [\rx] @ DATA .endm .macro busyuart,rd,rx @ spin while busy1001: ldr \rd, [\rx, #0x10] @ STATUS tst \rd, #1 << 3 @ BUSY (TX FIFO not empty) bne 1001b @ yes, spin .endm .macro waituart,rd,rx @ wait for Tx FIFO room1001: ldrb \rd, [\rx, #0x10] @ STATUS tst \rd, #1 << 5 @ TXFF (TX FIFO full) bne 1001b @ yes, spin .endm#elif defined(CONFIG_ARCH_VERSATILE_PB)#include <asm/hardware/amba_serial.h> .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0x10000000 movne \rx, #0xf1000000 @ virtual base orr \rx, \rx, #0x001F0000 orr \rx, \rx, #0x00001000 .endm .macro senduart,rd,rx strb \rd, [\rx, #UART01x_DR] .endm .macro waituart,rd,rx1001: ldr \rd, [\rx, #0x18] @ UARTFLG tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full bne 1001b .endm .macro busyuart,rd,rx1001: ldr \rd, [\rx, #0x18] @ UARTFLG tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy bne 1001b .endm#elif defined(CONFIG_ARCH_IMX) .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0x00000000 @ physical movne \rx, #0xe0000000 @ virtual orr \rx, \rx, #0x00200000 orr \rx, \rx, #0x00006000 @ UART1 offset .endm .macro senduart,rd,rx str \rd, [\rx, #0x40] @ TXDATA .endm .macro waituart,rd,rx .endm .macro busyuart,rd,rx1002: ldr \rd, [\rx, #0x98] @ SR2 tst \rd, #1 << 3 @ TXDC beq 1002b @ wait until transmit done .endm#elif defined(CONFIG_ARCH_H720X) .equ io_virt, IO_BASE .equ io_phys, IO_START .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #io_phys @ physical base address movne \rx, #io_virt @ virtual address add \rx, \rx, #0x00020000 @ UART1 .endm .macro senduart,rd,rx str \rd, [\rx, #0x0] @ UARTDR .endm .macro waituart,rd,rx1001: ldr \rd, [\rx, #0x18] @ UARTFLG tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full bne 1001b .endm .macro busyuart,rd,rx1001: ldr \rd, [\rx, #0x18] @ UARTFLG tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy bne 1001b .endm#else#error Unknown architecture#endif/* * Useful debugging routines */ENTRY(printhex8) mov r1, #8 b printhexENTRY(printhex4) mov r1, #4 b printhexENTRY(printhex2) mov r1, #2printhex: adr r2, hexbuf add r3, r2, r1 mov r1, #0 strb r1, [r3]1: and r1, r0, #15 mov r0, r0, lsr #4 cmp r1, #10 addlt r1, r1, #'0' addge r1, r1, #'a' - 10 strb r1, [r3, #-1]! teq r3, r2 bne 1b mov r0, r2 b printascii .ltorgENTRY(printascii) addruart r3 b 2f1: waituart r2, r3 senduart r1, r3 busyuart r2, r3 teq r1, #'\n' moveq r1, #'\r' beq 1b2: teq r0, #0 ldrneb r1, [r0], #1 teqne r1, #0 bne 1b mov pc, lrENTRY(printch) addruart r3 mov r1, r0 mov r0, #0 b 1bhexbuf: .space 16⌨️ 快捷键说明
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