📄 m500auc.lst
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713 2 // necessary
714 2 // initialize bit phase
715 2
716 2
717 2 WriteIO(RegBitPhase,0xAD);
718 2
719 2 Temp = ReadIO(RegBitPhase);
720 2
721 2 // initialize minlevel
722 2 WriteIO(RegRxThreshold,0xFF);
723 2
724 2 Temp = ReadIO(RegRxThreshold);
725 2
726 2 // disable auto power down
727 2 WriteIO(RegRxControl2,0x01);
728 2 Temp = ReadIO(RegRxControl2);
729 2 // Depending on the processing speed of the
730 2 // operation environment, the waterlevel
731 2 // can be adapted. (not very critical for
732 2 // mifare applications)
733 2 // initialize waterlevel to value 4
734 2 WriteIO(RegFIFOLevel,0x04);
735 2
736 2 Temp = ReadIO(RegFIFOLevel);
C51 COMPILER V7.06 M500AUC 02/25/2005 08:31:58 PAGE 13
737 2 //Timer configuration
738 2 WriteIO(RegTimerControl,0x02); // TStopRxEnd=0,TStopRxBeg=0,
739 2 // TStartTxEnd=1,TStartTxBeg=0
740 2 // timer must be stopped manually
741 2
742 2 Temp = ReadIO(RegTimerControl);
743 2 M500PcdSetTmo(1); // short timeout
744 2
745 2 WriteIO(RegIRqPinConfig,0x03); // interrupt active low enable
746 2
747 2 Temp = ReadIO(RegIRqPinConfig);
748 2 M500PcdRfReset(1); // Rf - reset and enable output driver
749 2 Pt = &MKeys[0][0];
750 2 // initialize internal key memory
751 2 for (i = 0; i < 16; i++)
752 2 {
753 3 for (j = 0; j < 12; j++)
754 3 {
755 4 MKeys[i][j] = 0x00;
756 4 Pt++;
757 4 }
758 3 }
759 2
760 2 memcpy(MKeys,AledKey,192);
761 2
762 2 }
763 1
764 1 return status;
765 1 }
766
767 ///////////////////////////////////////////////////////////////////////
768 // M I F A R E R E M O T E A N T E N N A
769 // Configuration of slave module
770 ///////////////////////////////////////////////////////////////////////
771 char M500PcdMfInOutSlaveConfig(void)
772 {
773 1 char data status = MI_OK;
774 1
775 1 FlushFIFO(); // empty FIFO
776 1 ResetInfo(MInfo);
777 1 MSndBuffer[0] = 0x10; // addr low byte
778 1 MSndBuffer[1] = 0x00; // addr high byte
779 1
780 1 MSndBuffer[2] = 0x00; // Page
781 1 MSndBuffer[3] = 0x7B; // RegTxControl modsource 11,InvTx2,Tx2RFEn,TX1RFEn
782 1 MSndBuffer[4] = 0x3F; // RegCwConductance
783 1 MSndBuffer[5] = 0x3F; // RFU13
784 1 MSndBuffer[6] = 0x19; // RFU14
785 1 MSndBuffer[7] = 0x13; // RegModWidth
786 1 MSndBuffer[8] = 0x00; // RFU16
787 1 MSndBuffer[9] = 0x00; // RFU17
788 1
789 1 MSndBuffer[10] = 0x00; // Page
790 1 MSndBuffer[11] = 0x73; // RegRxControl1
791 1 MSndBuffer[12] = 0x08; // RegDecoderControl
792 1 MSndBuffer[13] = 0x6c; // RegBitPhase
793 1 MSndBuffer[14] = 0xFF; // RegRxThreshold
794 1 MSndBuffer[15] = 0x00; // RFU1D
795 1 MSndBuffer[16] = 0x00; // RegRxControl2
796 1 MSndBuffer[17] = 0x00; // RegClockQControl
797 1
798 1 MSndBuffer[18] = 0x00; // Page
C51 COMPILER V7.06 M500AUC 02/25/2005 08:31:58 PAGE 14
799 1 MSndBuffer[19] = 0x06; // RegRxWait
800 1 MSndBuffer[20] = 0x03; // RegChannelRedundancy
801 1 MSndBuffer[21] = 0x63; // RegCRCPresetLSB
802 1 MSndBuffer[22] = 0x63; // RegCRCPresetMSB
803 1 MSndBuffer[23] = 0x0; // RFU25
804 1 MSndBuffer[24] = 0x04; // RegMfOutSelect enable mfout = manchester HT
805 1 MSndBuffer[25] = 0x00; // RFU27
806 1
807 1 // PAGE 5 FIFO, Timer and IRQ-Pin Configuration
808 1 MSndBuffer[26] = 0x00; // Page
809 1 MSndBuffer[27] = 0x08; // RegFIFOLevel
810 1 MSndBuffer[28] = 0x07; // RegTimerClock
811 1 MSndBuffer[29] = 0x06; // RegTimerControl
812 1 MSndBuffer[30] = 0x0A; // RegTimerReload
813 1 MSndBuffer[31] = 0x02; // RegIRqPinConfig
814 1 MSndBuffer[32] = 0x00; // RFU
815 1 MSndBuffer[33] = 0x00; // RFU
816 1 MInfo.nBytesToSend = 34;
817 1
818 1 status = M500PcdCmd(PCD_WRITEE2,
819 1 MSndBuffer,
820 1 MRcvBuffer,
821 1 &MInfo); // write e2
822 1 return status;
823 1 }
824
825 ///////////////////////////////////////////////////////////////////////
826 // M I F A R E R E M O T E A N T E N N A
827 // Configuration of master module
828 ///////////////////////////////////////////////////////////////////////
829 char M500PcdMfInOutMasterConfig(void)
830 {
831 1 WriteIO(RegRxControl2,0x42);
832 1 WriteIO(RegTxControl,0x10);
833 1 WriteIO(RegBitPhase,0x11);
834 1
835 1 return MI_OK;
836 1 }
837
838 ///////////////////////////////////////////////////////////////////////
839 // M A S T E R K E Y L O A D
840 ///////////////////////////////////////////////////////////////////////
841 char M500PcdLoadMk(unsigned char auth_mode, // KEYA or KEYB
842 unsigned char key_addr, // 0 <= key_addr <= 15
843 unsigned char *mk) // 6 bytes uncoded master key
844 {
845 1 unsigned char data offset = (auth_mode == PICC_AUTHENT1A) ? 0 : 6;
846 1
847 1 memcpy(MKeys[key_addr] + offset,mk,6);
848 1 return MI_OK;
849 1 }
850
851 ///////////////////////////////////////////////////////////////////////
852 // E E P R O M M A S T E R K E Y L O A D
853 ///////////////////////////////////////////////////////////////////////
854 char M500PcdLoadKeyE2(unsigned char key_type,
855 unsigned char sector,
856 unsigned char *uncoded_keys)
857 {
858 1 char data status = MI_OK;
859 1 // eeprom address calculation
860 1 // 0x80 ... offset
C51 COMPILER V7.06 M500AUC 02/25/2005 08:31:58 PAGE 15
861 1 // key_sector ... sector
862 1 // 0x18 ... 2 * 12 = 24 = 0x18
863 1 unsigned short data e2addr = 0x80 + sector * 0x18;
864 1 unsigned char data *e2addrbuf = (unsigned char*)&e2addr;
865 1 unsigned char data keycoded[12];
866 1
867 1 if (key_type == PICC_AUTHENT1B)
868 1 e2addr += 12; // key B offset
869 1
870 1 FlushFIFO(); // empty FIFO
871 1 ResetInfo(MInfo);
872 1
873 1 M500HostCodeKey(uncoded_keys,keycoded);
874 1 memcpy(MSndBuffer,e2addrbuf,2); // write low and high byte of address
875 1 MSndBuffer[2] = MSndBuffer[0]; // Move the LSB of the 2-bytes
876 1 MSndBuffer[0] = MSndBuffer[1]; // address to the first byte
877 1 MSndBuffer[1] = MSndBuffer[2];
878 1 memcpy(&MSndBuffer[2],keycoded,12); // write 12 bytes of coded keys
879 1 MInfo.nBytesToSend = 14;
880 1
881 1 // write load command
882 1 status = M500PcdCmd(PCD_WRITEE2,
883 1 MSndBuffer,
884 1 MRcvBuffer,
885 1 &MInfo);
886 1
887 1 return status;
888 1 }
889
890 ///////////////////////////////////////////////////////////////////////
891 // E E P R O M R E A D
892 ///////////////////////////////////////////////////////////////////////
893 char PcdReadE2(unsigned short startaddr,
894 unsigned char length,
895 unsigned char* _data)
896 {
897 1 char status = MI_OK;
898 1 Pt = &MSndBuffer;
899 1 // ************* Cmd Sequence **********************************
900 1 ResetInfo(MInfo);
901 1 MSndBuffer[0] = startaddr & 0xFF; //低字节
902 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF; //高字节
903 1 MSndBuffer[2] = length; //数据长度
904 1 MInfo.nBytesToSend = 3;
905 1 status = M500PcdCmd(PCD_READE2,
906 1 MSndBuffer,
907 1 MRcvBuffer,
908 1 &MInfo);
909 1 if (status == MI_OK)
910 1 {
911 2
912 2 memcpy(_data,MRcvBuffer,length);
913 2
914 2 }
915 1 else // Response Processing
916 1 {
917 2 _data[0] = 0;
918 2 }
919 1 return status ;
920 1 }
921
922 ///////////////////////////////////////////////////////////////////////
C51 COMPILER V7.06 M500AUC 02/25/2005 08:31:58 PAGE 16
923 // E E P R O M W R I T E
924 ///////////////////////////////////////////////////////////////////////
925 char PcdWriteE2(unsigned short startaddr,
926 unsigned char length,
927 unsigned char* _data)
928 {
929 1 char status = MI_OK;
930 1
931 1 // ************* Cmd Sequence **********************************
932 1 ResetInfo(MInfo);
933 1 MSndBuffer[0] = startaddr & 0xFF;
934 1 MSndBuffer[1] = (startaddr >> 8) & 0xFF;
935 1 memcpy(MSndBuffer + 2,_data,length);
936 1
937 1 MInfo.nBytesToSend = length + 2;
938 1
939 1 status = M500PcdCmd(PCD_WRITEE2,
940 1 MSndBuffer,
941 1 MRcvBuffer,
942 1 &MInfo); // write e2
943 1 return status;
944 1 }
945
946 ///////////////////////////////////////////////////////////////////////
947 // C O N F I G M F O U T S E L E C T
948 ///////////////////////////////////////////////////////////////////////
949 char M500PcdMfOutSelect(unsigned char type)
950 {
951 1 WriteIO(RegMfOutSelect,type&0x7);
952 1 return MI_OK;
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