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📄 m500auc.lst

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 692          {
 693   1         char data status;
 694   1         char data i;
 695   1         char data j;
 696   1      
 697   1         if ((status = M500PcdReset()) == MI_OK)//复位成功
 698   1         {
 699   2           delay_50us(100);
 700   2      
 701   2           WriteIO(0x0,0x0);
 702   2           // test clock Q calibration - value in the range of 0x46 expected
 703   2           // 时钟产生控制寄存器
 704   2           // ClockQControl(
 705   2           WriteIO(RegClockQControl,0x0);
 706   2      
 707   2           Temp = ReadIO(RegClockQControl);
 708   2      
 709   2           WriteIO(RegClockQControl,0x40);
 710   2      
 711   2           Temp = ReadIO(RegClockQControl);
 712   2      
 713   2           delay_50us(2);  // wait approximately 100 us - calibration in progress
 714   2           ClearBitMask(RegClockQControl,0x40); // clear bit ClkQCalib for
 715   2                                                // further calibration
 716   2      
 717   2           // The following values for RegBitPhase and
 718   2           // RegRxThreshold represents an optimal
 719   2           // value for our demo package. For user
 720   2           // implementation some changes could be
 721   2           // necessary
 722   2           // initialize bit phase
 723   2      
 724   2      
 725   2           WriteIO(RegBitPhase,0xAD);//page3调整发射器河接收器的相位差,该值影响数据接受质量
 726   2                                     //该寄存器复位值为0xAD;
 727   2      
 728   2           Temp = ReadIO(RegBitPhase);
 729   2      
 730   2           // initialize minlevel
 731   2           WriteIO(RegRxThreshold,0xFF);//选择bit解码的阀值
 732   2                                        //(7654bit)Minnlevel定义解码起能够接受的最小信号
 733   2                                        //若信号的强度低于该值,则不被处理
 734   2                                        //(3210bit)定义Manchester编码的信号里弱半bit相对
 735   2                                        //强半bit产生冲突必须达到的最小值
 736   2                                        //该寄存器复位值为oxFF. 
C51 COMPILER V7.06   M500AUC                                                               03/21/2005 16:36:23 PAGE 13  

 737   2      
 738   2           Temp = ReadIO(RegRxThreshold);
 739   2      
 740   2           // disable auto power down
 741   2           WriteIO(RegRxControl2,0x01);//解码控制及选择接收源
 742   2                                       //赋值0x01 :选择Q时钟作为接收器时钟
 743   2                                       //接收器始终打开
 744   2                                       //选择内部解调器
 745   2           Temp = ReadIO(RegRxControl2);
 746   2           // Depending on the processing speed of the
 747   2           // operation environment, the waterlevel
 748   2           // can be adapted. (not very critical for
 749   2           // mifare applications)
 750   2           // initialize waterlevel to value 4
 751   2           WriteIO(RegFIFOLevel,0x04);//定义FIFO向上或向下的溢出级别
 752   2                                      //若FIFO里剩下的空间(64-FIFOLength)小于等于Waterlevel则HiAlert=1.
 753   2                                      //若FIFO里已有的数据FIFOLength)小于等于WaterLever则LoAlert=1;
 754   2      
 755   2           Temp = ReadIO(RegFIFOLevel);
 756   2           //Timer configuration
 757   2           WriteIO(RegTimerControl,0x02);  //选择Timer时钟的启动和停止条件
 758   2                                           //数据发送结束后Timer自动启动
 759   2                                                                               // TStopRxEnd=0,TStopRxBeg=0,
 760   2                                           // TStartTxEnd=1,TStartTxBeg=0
 761   2                                           // timer must be stopped manually
 762   2      
 763   2           Temp = ReadIO(RegTimerControl);
 764   2           M500PcdSetTmo(1);               // short timeout
 765   2      
 766   2           WriteIO(RegIRqPinConfig,0x03); // interrupt active low enable
 767   2      
 768   2           Temp = ReadIO(RegIRqPinConfig);//定义管脚输出电平
 769   2                                          //IRQ管脚为Irq bit 的反相输出
 770   2                                          //IRQ管脚为标准的CMOS输出
 771   2      
 772   2           M500PcdRfReset(1);            // Rf - reset and enable output driver
 773   2      
 774   2           Pt = &MKeys[0][0];
 775   2           // initialize internal key memory
 776   2           for (i = 0; i < 16; i++)
 777   2           {
 778   3              for (j = 0; j < 12; j++)
 779   3                 {
 780   4                   MKeys[i][j] = 0x00;
 781   4                   Pt++;
 782   4                 }
 783   3           }
 784   2      
 785   2           memcpy(MKeys,AledKey,192);
 786   2      
 787   2         }
 788   1      
 789   1         return status;
 790   1      }
 791          
 792          ///////////////////////////////////////////////////////////////////////
 793          //          M I F A R E   R E M O T E   A N T E N N A
 794          //  Configuration of slave module
 795          ///////////////////////////////////////////////////////////////////////
 796          char M500PcdMfInOutSlaveConfig(void)
 797          {
 798   1         char data status = MI_OK;
C51 COMPILER V7.06   M500AUC                                                               03/21/2005 16:36:23 PAGE 14  

 799   1      
 800   1         FlushFIFO();    // empty FIFO
 801   1         ResetInfo(MInfo);
 802   1         MSndBuffer[0] = 0x10; // addr low byte
 803   1         MSndBuffer[1] = 0x00; // addr high byte
 804   1      
 805   1         MSndBuffer[2] = 0x00; // Page
 806   1         MSndBuffer[3] = 0x7B; // RegTxControl modsource 11,InvTx2,Tx2RFEn,TX1RFEn
 807   1         MSndBuffer[4] = 0x3F; // RegCwConductance
 808   1         MSndBuffer[5] = 0x3F; // RFU13
 809   1         MSndBuffer[6] = 0x19; // RFU14
 810   1         MSndBuffer[7] = 0x13; // RegModWidth
 811   1         MSndBuffer[8] = 0x00; // RFU16
 812   1         MSndBuffer[9] = 0x00; // RFU17
 813   1      
 814   1         MSndBuffer[10] = 0x00; // Page
 815   1         MSndBuffer[11] = 0x73; // RegRxControl1
 816   1         MSndBuffer[12] = 0x08; // RegDecoderControl
 817   1         MSndBuffer[13] = 0x6c; // RegBitPhase
 818   1         MSndBuffer[14] = 0xFF; // RegRxThreshold
 819   1         MSndBuffer[15] = 0x00; // RFU1D
 820   1         MSndBuffer[16] = 0x00; // RegRxControl2
 821   1         MSndBuffer[17] = 0x00; // RegClockQControl
 822   1      
 823   1         MSndBuffer[18] = 0x00; // Page
 824   1         MSndBuffer[19] = 0x06; // RegRxWait
 825   1         MSndBuffer[20] = 0x03; // RegChannelRedundancy
 826   1         MSndBuffer[21] = 0x63; // RegCRCPresetLSB
 827   1         MSndBuffer[22] = 0x63; // RegCRCPresetMSB
 828   1         MSndBuffer[23] = 0x0;  // RFU25
 829   1         MSndBuffer[24] = 0x04; // RegMfOutSelect enable mfout = manchester HT
 830   1         MSndBuffer[25] = 0x00; // RFU27
 831   1      
 832   1         // PAGE 5      FIFO, Timer and IRQ-Pin Configuration
 833   1         MSndBuffer[26] = 0x00; // Page
 834   1         MSndBuffer[27] = 0x08; // RegFIFOLevel
 835   1         MSndBuffer[28] = 0x07; // RegTimerClock
 836   1         MSndBuffer[29] = 0x06; // RegTimerControl
 837   1         MSndBuffer[30] = 0x0A; // RegTimerReload
 838   1         MSndBuffer[31] = 0x02; // RegIRqPinConfig
 839   1         MSndBuffer[32] = 0x00; // RFU
 840   1         MSndBuffer[33] = 0x00; // RFU
 841   1         MInfo.nBytesToSend   = 34;
 842   1      
 843   1         status = M500PcdCmd(PCD_WRITEE2,
 844   1                             MSndBuffer,
 845   1                             MRcvBuffer,
 846   1                             &MInfo); // write e2
 847   1         return status;
 848   1      }
 849          
 850          ///////////////////////////////////////////////////////////////////////
 851          //          M I F A R E   R E M O T E   A N T E N N A
 852          //  Configuration of master module
 853          ///////////////////////////////////////////////////////////////////////
 854          char M500PcdMfInOutMasterConfig(void)
 855          {
 856   1         WriteIO(RegRxControl2,0x42);
 857   1         WriteIO(RegTxControl,0x10);
 858   1         WriteIO(RegBitPhase,0x11);
 859   1      
 860   1         return MI_OK;
C51 COMPILER V7.06   M500AUC                                                               03/21/2005 16:36:23 PAGE 15  

 861   1      }
 862          
 863          ///////////////////////////////////////////////////////////////////////
 864          //          M A S T E R   K E Y   L O A D
 865          ///////////////////////////////////////////////////////////////////////
 866          char M500PcdLoadMk(unsigned char  auth_mode,  // KEYA or KEYB
 867                             unsigned char  key_addr,   // 0 <= key_addr <= 15
 868                             unsigned char  *mk)        // 6 bytes uncoded master key
 869          {
 870   1         unsigned char data offset = (auth_mode == PICC_AUTHENT1A) ? 0 : 6;
 871   1      
 872   1         memcpy(MKeys[key_addr] + offset,mk,6);
 873   1         return MI_OK;
 874   1      }
 875          
 876          ///////////////////////////////////////////////////////////////////////
 877          //          E E P R O M   M A S T E R   K E Y   L O A D
 878          ///////////////////////////////////////////////////////////////////////
 879          char M500PcdLoadKeyE2(unsigned char key_type,
 880                                    unsigned char sector,
 881                                    unsigned char *uncoded_keys)
 882          {
 883   1         char data status = MI_OK;
 884   1         // eeprom address calculation
 885   1         // 0x80 ... offset
 886   1         // key_sector ... sector
 887   1         // 0x18 ... 2 * 12 = 24 = 0x18
 888   1         unsigned short data e2addr = 0x80 + sector * 0x18;
 889   1         unsigned char data *e2addrbuf = (unsigned char*)&e2addr;
 890   1         unsigned char data keycoded[12];
 891   1      
 892   1         if (key_type == PICC_AUTHENT1B)
 893   1            e2addr += 12; // key B offset
 894   1      
 895   1         FlushFIFO();    // empty FIFO
 896   1         ResetInfo(MInfo);
 897   1      
 898   1         M500HostCodeKey(uncoded_keys,keycoded);
 899   1         memcpy(MSndBuffer,e2addrbuf,2); // write low and high byte of address
 900   1         MSndBuffer[2] = MSndBuffer[0];    // Move the LSB of the 2-bytes
 901   1         MSndBuffer[0] = MSndBuffer[1];    // address to the first byte
 902   1         MSndBuffer[1] = MSndBuffer[2];
 903   1         memcpy(&MSndBuffer[2],keycoded,12); // write 12 bytes of coded keys
 904   1         MInfo.nBytesToSend   = 14;
 905   1      
 906   1         // write load command
 907   1         status = M500PcdCmd(PCD_WRITEE2,
 908   1                              MSndBuffer,
 909   1                              MRcvBuffer,
 910   1                              &MInfo);
 911   1      
 912   1         return status;
 913   1      }
 914          
 915          ///////////////////////////////////////////////////////////////////////
 916          //          E E P R O M   R E A D(读取EEPROM中的值)                   //
 917          //          形参:起始地址
 918          //                读取字节数
 919          //                保存地址
 920          ///////////////////////////////////////////////////////////////////////
 921          char PcdReadE2(unsigned short startaddr,
 922                         unsigned char length,
C51 COMPILER V7.06   M500AUC                                                               03/21/2005 16:36:23 PAGE 16  

 923                         unsigned char * _data)
 924          {

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