2db.c

这是一个同样来自贝尔实验室的和UNIX有着渊源的操作系统, 其简洁的设计和实现易于我们学习和理解

	case IPACK:
		bprint(ip, "$#");
		for (i = 0; i < 24 && ip->curr < ip->end-1; i++) {
			_hexify(ip->curr, ap->floater[i], 1);
			ip->curr += 2;
		}
		break;
	case IEXT:
		bprint(ip, "$#");
		ip->curr += beieee80ftos(ip->curr, left-2, (void*)ap->floater);
		break;
	default:
		bprint(ip, "??%x??", ap->eatype);
		ip->errmsg = "bad EA type";
		break;
	}
}

static char *cctab[]  = { "F", "T", "HI", "LS", "CC", "CS", "NE", "EQ",
			  "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" };
static	char *fcond[] =
{
	"F",	"EQ",	"OGT",	"OGE",	"OLT",	"OLE",	"OGL", "OR",
	"UN",	"UEQ",	"UGT",	"UGE",	"ULT",	"ULE",	"NE",	"T",
	"SF",	"SEQ",	"GT",	"GE",	"LT",	"LE",	"GL",	"GLE",
	"NGLE",	"NGL",	"NLE",	"NLT",	"NGE",	"NGT",	"SNE",	"ST"
};
static	char *cachetab[] =	{ "NC", "DC", "IC", "BC" };
static	char *mmutab[] =	{ "TC", "??", "SRP", "CRP" };
static	char *crtab0[] =
{
	"SFC", "DFC", "CACR", "TC", "ITT0", "ITT1", "DTT0", "DTT1",
};
static	char *crtab1[] =
{
	"USP", "VBR", "CAAR", "MSP", "ISP", "MMUSR", "URP", "SRP",
};
static	char typetab[] =	{ 'L', 'S', 'X', 'P', 'W', 'D', 'B', '?', };
static	char sztab[] =		{'?', 'B', 'W', 'L', '?' };

static	void
formatins(char *fmt, Inst *ip)
{
	short op, w1;
	int r1, r2;
	int currand;

	op = ip->raw[0];
	w1 = ip->raw[1];
	currand = 0;
	for (; *fmt && ip->curr < ip->end; fmt++) {
		if (*fmt != '%')
			*ip->curr++ = *fmt;
		else switch(*++fmt)
		{
		case '%':
			*ip->curr++ = '%';
			break;
		case 'a':	/* register number; word 1:[0-2] */
			*ip->curr++ = (w1&0x07)+'0';
			break;
		case 'c':	/* condition code; opcode: [8-11] */
			bprint(ip, cctab[(op>>8)&0x0f]);
			break;
		case 'd':	/* shift direction; opcode: [8] */
			if (op&0x100)
				*ip->curr++ = 'L';
			else
				*ip->curr++ = 'R';
			break;
		case 'e':	/* source effective address */
			pea(op&0x07, ip, &ip->and[currand++]);
			break;
		case 'f':	/* trap vector; op code: [0-3] */
			bprint(ip, "%x", op&0x0f);
			break;
		case 'h':	/* register number; word 1: [5-7] */
			*ip->curr++ = (w1>>5)&0x07+'0';
			break;
		case 'i':	/* immediate operand */
			ip->curr += symoff(ip->curr, ip->end-ip->curr,
					ip->and[currand++].immediate, CANY);
			break;
		case 'j':	/* data registers; word 1: [0-2] & [12-14] */
			r1 = w1&0x07;
			r2 = (w1>>12)&0x07;
			if (r1 == r2)
				bprint(ip, "R%d", r1);
			else
				bprint(ip, "R%d:R%d", r2, r1);
			break;
		case 'k':	/* k factor; word 1 [0-6] */
			bprint(ip, "%x", w1&0x7f);
			break;
		case 'm':	/* register mask; word 1 [0-7] */
			bprint(ip, "%x", w1&0xff);
			break;
		case 'o':	/* bit field offset; word1: [6-10] */
			bprint(ip, "%d", (w1>>6)&0x3f);
			break;
		case 'p':	/* conditional predicate; opcode: [0-5]
				   only bits 0-4 are defined  */
			bprint(ip, fcond[op&0x1f]);
			break;
		case 'q':	/* 3-bit immediate value; opcode[9-11] */
			r1 = (op>>9)&0x07;
			if (r1 == 0)
				*ip->curr++ = '8';
			else
				*ip->curr++ = r1+'0';
			break;
		case 'r':	/* register type & number; word 1: [12-15] */
			bprint(ip, regname[(w1>>12)&0x0f]);
			break;
		case 's':	/* size; opcode [6-7] */
			*ip->curr = sztab[((op>>6)&0x03)+1];
			if (*ip->curr++ == '?')
				ip->errmsg = "bad size code";
			break;
		case 't':	/* text offset */
			ip->curr += symoff(ip->curr, ip->end-ip->curr,
				ip->and[currand++].immediate+ip->addr+2, CTEXT);
			break;
		case 'u':	/* register number; word 1: [6-8] */
			*ip->curr++ = ((w1>>6)&0x07)+'0';
			break;
		case 'w':	/* bit field width; word 1: [0-4] */
			bprint(ip, "%d", w1&0x0f);
			break;
		case 'x':	/* register number; opcode: [9-11] */
			*ip->curr++ = ((op>>9)&0x07)+'0';
			break;
		case 'y':	/* register number; opcode: [0-2] */
			*ip->curr++ = (op&0x07)+'0';
			break;
		case 'z':	/* shift count; opcode: [9-11] */	
			*ip->curr++ = ((op>>9)&0x07)+'0';
			break;
		case 'A':	/* register number; word 2: [0-2] */
			*ip->curr++ = (ip->raw[2]&0x07)+'0';
			break;
		case 'B':	/* float source reg; word 1: [10-12] */
			*ip->curr++ = ((w1>>10)&0x07)+'0';
			break;
		case 'C':	/* cache identifier; opcode: [6-7] */
			bprint(ip, cachetab[(op>>6)&0x03]);
			break;
		case 'D':	/* float dest reg; word 1: [7-9] */
			*ip->curr++ = ((w1>>7)&0x07)+'0';
			break;
		case 'E':	/* destination EA; opcode: [6-11] */
			pea((op>>9)&0x07, ip, &ip->and[currand++]);
			break;
		case 'F':	/* float dest register(s); word 1: [7-9] & [10-12] */
			r1 = (w1>>7)&0x07;
			r2 = (w1>>10)&0x07;
			if (r1 == r2)
				bprint(ip, "F%d", r1);
			else
				bprint(ip, "F%d,F%d", r2, r1);
			break;
		case 'H':	/* MMU register; word 1 [10-13] */
			bprint(ip, mmutab[(w1>>10)&0x03]);
			if (ip->curr[-1] == '?')
				ip->errmsg = "bad mmu register";
			break;
		case 'I':	/* MMU function code mask; word 1: [5-8] */
			bprint(ip, "%x", (w1>>4)&0x0f);
			break;
		case 'K':	/* dynamic k-factor register; word 1: [5-8] */
			bprint(ip, "%d",  (w1>>4)&0x0f);
			break;
		case 'L':	/* MMU function code; word 1: [0-6] */
			if (w1&0x10)
				bprint(ip, "%x", w1&0x0f);
			else if (w1&0x08)
				bprint(ip, "R%d",w1&0x07);
			else if (w1&0x01)
				bprint(ip, "DFC");
			else
				bprint(ip, "SFC");
			break;
		case 'N':	/* control register; word 1: [0-11] */
			r1 = w1&0xfff;
			if (r1&0x800)
				bprint(ip, crtab1[r1&0x07]);
			else
				bprint(ip, crtab0[r1&0x07]);
			break;
		case 'P':	/* conditional predicate; word 1: [0-5] */
			bprint(ip, fcond[w1&0x1f]);
			break;
		case 'R':	/* register type & number; word 2 [12-15] */
			bprint(ip, regname[(ip->raw[2]>>12)&0x0f]);
			break;
		case 'S':	/* float source type code; word 1: [10-12] */
			*ip->curr = typetab[(w1>>10)&0x07];
			if (*ip->curr++ == '?')
				ip->errmsg = "bad float type";
			break;
		case 'U':	/* register number; word 2: [6-8] */
			*ip->curr++ = ((ip->raw[2]>>6)&0x07)+'0';
			break;
		case 'Z':	/* ATC level number; word 1: [10-12] */
			bprint(ip, "%x", (w1>>10)&0x07);
			break;
		case '1':	/* effective address in second operand*/
			pea(op&0x07, ip, &ip->and[1]);
			break;
		default:
			bprint(ip, "%%%c", *fmt);
			break;
		}
	}
	*ip->curr = 0;		/* there's always room for 1 byte */
}

static int
dispsize(Inst *ip)
{
	ushort ext;
	static int dsize[] = {0, 0, 1, 2};	/* in words */

	if (get2(mymap, ip->addr+ip->n*2, &ext) < 0)
		return -1;
	if ((ext&0x100) == 0)
		return 1;
	return dsize[(ext>>4)&0x03]+dsize[ext&0x03]+1;
}

static int
immsize(Inst *ip, int mode)
{
	static int fsize[] = { 2, 2, 6, 12, 1, 4, 1, -1 };
	static int isize[] = { 1, 1, 2, -1 };

	switch(mode)
	{
	case EAM_B:			/* byte */
	case EAALL_B:
	case EADI_W:			/* word */
	case EAALL_W:
		return 1;
	case EADI_L:			/* long */
	case EAALL_L:
		return 2;
	case EAFLT:	/* floating point - size in bits 10-12 or word 1 */
		return fsize[(ip->raw[1]>>10)&0x07];
	case IV:	/* size encoded in bits 6&7 of opcode word */
	default:
		return isize[(ip->raw[0]>>6)&0x03];
	}
}

static int
easize(Inst *ip, int ea, int mode)
{
	switch((ea>>3)&0x07)
	{
	case 0x00:
	case 0x01:
	case 0x02:
	case 0x03:
	case 0x04:
		return 0;
	case 0x05:
		return 1;
	case 0x06:
		return dispsize(ip);
	case 0x07:
		switch(ea&0x07)
		{
		case 0x00:
		case 0x02:
			return 1;
		case 0x01:
			return 2;
		case 0x03:
			return dispsize(ip);
		case 0x04:
			return immsize(ip, mode);
		default:
			return -1;
		}
	}
	return -1;
}

static int
instrsize(Inst *ip, Optable *op)
{
	int i, t, mode;
	short opcode;

	opcode = ip->raw[0];
	for (i = 0; i < nelem(op->opdata) && op->opdata[i]; i++) {
		mode = op->opdata[i];
		switch(mode)
		{
		case EAPI:		/* normal EA modes */
		case EACA:
		case EACAD:
		case EACAPI:
		case EACAPD:
		case EAMA:
		case EADA:
		case EAA:
		case EAC:
		case EACPI:
		case EACD:
		case EAD:
		case EAM:
		case EAM_B:
		case EADI:
		case EADI_L:
		case EADI_W:
		case EAALL:
		case EAALL_L:
		case EAALL_W:
		case EAALL_B:
		case EAFLT:
			t = easize(ip, opcode&0x3f, mode);
			if (t < 0)
				return -1;
			ip->n += t;
			break;
		case EADDA:	/* stupid bit flop required */
			t = ((opcode>>9)&0x07)|((opcode>>3)&0x38);
			t = easize(ip, t, mode);
			if (t < 0)
				return -1;
			ip->n += t;
			break;
		case BREAC:	/* EAC JMP or CALL operand */
				/* easy displacements for follow set */
			if ((opcode&0x038) == 0x28 || (opcode&0x3f) == 0x3a) {
				if (i16(ip, &ip->and[i].immediate) < 0)
					return -1;
			} else {
				t = easize(ip, opcode&0x3f, mode);
				if (t < 0)
					return -1;
				ip->n += t;
			}
			break;
		case I16:	/* 16 bit immediate */
		case C16:	/* CAS2 16 bit immediate */
			ip->n++;
			break;
		case BR16:	/* 16 bit branch displacement */
			if (i16(ip, &ip->and[i].immediate) < 0)
				return -1;
			break;
		case BR32:	/* 32 bit branch displacement */
			if (i32(ip, &ip->and[i].immediate) < 0)
				return -1;
			break;
		case I32:	/* 32 bit immediate */
			ip->n += 2;
			break;
		case IV:	/* immediate data depends on size field */
			t = (ip->raw[0]>>6)&0x03;
			if (t < 2)
				ip->n++;
			else if (t == 2)
				ip->n += 2;
			else 
				return -1;
			break;
		case BR8:	/* loony branch displacement format */
			t = opcode&0xff;
			if (t == 0) {
				if (i16(ip, &ip->and[i].immediate) < 0)
					return -1;
			} else if (t == 0xff) {
				if (i32(ip, &ip->and[i].immediate) < 0)
					return -1;
			} else {
				ip->and[i].immediate = t;
				if (t & 0x80)
					ip->and[i].immediate |= ~0xff;
			}
			break;
		case STACK:	/* Dummy operand for Return instructions */
		case OP8:	/* weird movq instruction */
		case I8:	/* must be two-word opcode */
		default:
			break;
		}
	}
	return 1;
}

static int
eaval(Inst *ip, Operand *ap, Rgetter rget)
{
	int reg;
	char buf[8];

	reg = ip->raw[0]&0x07;
	switch(ap->eatype)
	{
	case AInd:
		sprint(buf, "A%d", reg);
		return (*rget)(mymap, buf);
	case PDisp:
		return ip->addr+2+ap->disp;
	case ADisp:
		sprint(buf, "A%d", reg);
		return ap->disp+(*rget)(mymap, buf);
	case ABS:
		return ap->immediate;
	default:
		return 0;
	}
}

static int
m68020instlen(Map *map, uvlong pc)
{
	Inst i;
	Optable *op;

	mymap = map;
	i.addr = pc;
	i.errmsg = 0;
	op = instruction(&i);
	if (op && instrsize(&i, op) > 0)
			return i.n*2;
	return -1;
}

static int
m68020foll(Map *map, uvlong pc, Rgetter rget, uvlong *foll)
{
	int j;
	Inst i;
	ulong l;
	Optable *op;

	mymap = map;
	i.addr = pc;
	i.errmsg = 0;
	op = instruction(&i);
	if (op == 0  || instrsize(&i, op) < 0)
		return -1;
	for (j = 0; j < nelem(op->opdata) && op->opdata[j]; j++) {
		switch(op->opdata[j])
		{
		case BREAC:	/* CALL, JMP, JSR */
			foll[0] = pc+2+eaval(&i, &i.and[j], rget);
			return 1;
		case BR8:	/* Bcc, BSR, & BRA */
		case BR16:	/* FBcc, FDBcc, DBcc */
		case BR32:	/* FBcc */
			foll[0] = pc+i.n*2;
			foll[1] = pc+2+i.and[j].immediate;
			return 2;
		case STACK:	/* RTR, RTS, RTD */
			if (get4(map, (*rget)(map, mach->sp), &l) < 0)
				return -1;
			*foll = l;
			return 1;
		default:
			break;
		}
	}
	foll[0] = pc+i.n*2;			
	return 1;
}

static int
m68020inst(Map *map, uvlong pc, char modifier, char *buf, int n)
{
	Inst i;
	Optable *op;

	USED(modifier);
	mymap = map;
	i.addr = pc;
	i.curr = buf;
	i.end = buf+n-1;
	i.errmsg = 0;
	op = instruction(&i);
	if (!op)
		return -1;
	if (decode(&i, op) > 0)
		formatins(op->format, &i);
	if (i.errmsg) {
		if (i.curr != buf)
			bprint(&i, "\t\t;");
		bprint(&i, "%s: ", i.errmsg);
		dumpinst(&i, i.curr, i.end-i.curr);
	}
	return i.n*2;
}

static int
m68020das(Map *map, uvlong pc, char *buf, int n)
{
	Inst i;
	Optable *op;

	mymap = map;
	i.addr = pc;
	i.curr = buf;
	i.end = buf+n-1;
	i.errmsg = 0;
	
	op = instruction(&i);
	if (!op)
		return -1;
	decode(&i, op);
	if (i.errmsg)
		bprint(&i, "%s: ", i.errmsg);
	dumpinst(&i, i.curr, i.end-i.curr);
	return i.n*2;
}