mga4xx.c

这是一个同样来自贝尔实验室的和UNIX有着渊源的操作系统, 其简洁的设计和实现易于我们学习和理解

	trace("%s: HSync = %c\n", 			ctlr->name, mode->hsync);
	trace("%s: VSync = %c\n", 				ctlr->name, mode->vsync);
	trace("%s: Interlace = %d\n", 			ctlr->name, mode->interlace);

	/* TODO : G400 Max : 360000000 */
	if (mga->devid == MGA4XX || mga->devid == MGA550)
		mga->maxpclk	= 300000000;
	else
		mga->maxpclk	= 250000000;

	if (mode->frequency < 50000)
		error("mga: Too little Frequency %d : Minimum supported by PLL is %d", 
			mode->frequency, 50000);

	if (mode->frequency > mga->maxpclk)
		error("mga: Too big Frequency %d : Maximum supported by PLL is %ld",
			mode->frequency, mga->maxpclk);
	
	trace("mga: revision ID is %x\n", mga->revid);
	if ((mga->devid == MGA200) || ((mga->devid == MGA4XX) && (mga->revid & 0x80) == 0x00)) {
		/* Is it G200/G400 or G450 ? */
		Fpll = g400_calcclock(mga, mode->frequency);
		trace("Fpll set to %f\n", Fpll);
		trace("pixclks : n = %d m = %d p = %d\n", mga->pixpll_n, mga->pixpll_m, mga->pixpll_p & 0x7);
	} else
		mga->Fneeded = mode->frequency;

	trace("PCI Option1 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption1));
	trace("PCI Option2 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption2));
	trace("PCI Option3 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption3));

	mga->htotal =			(mode->ht >> 3) - 5;
	mga->hdispend =		(mode->x >> 3) - 1;
	mga->hblkstr =		mga->hdispend; 		/* (mode->shb >> 3); */
	mga->hblkend =		mga->htotal + 4;		/* (mode->ehb >> 3); */
	mga->hsyncstr =		(mode->shs >> 3) - 1;	// Was (mode->shs >> 3);
	mga->hsyncend =		(mode->ehs >> 3) - 1;	// Was (mode->ehs >> 3);
	mga->hsyncdel = 		0;
	mga->vtotal =			mode->vt - 2;
	mga->vdispend = 		mode->y - 1;
	mga->vblkstr = 		mode->y - 1;
	mga->vblkend = 		mode->vt - 1;
	mga->vsyncstr = 		mode->vrs;
	mga->vsyncend = 		mode->vre;
	mga->linecomp =		mode->y;
	mga->hsyncsel = 		0;					/* Do not double lines ... */
	mga->startadd =		0;
	mga->offset =		(mode->z==24) ? (vga->virtx * 3) >> (4 - bppShift) : vga->virtx >> (4-bppShift);
	/* No Zoom */
	mga->maxscan = 		0;
	/* Not used in Power Graphic mode */
	mga->curloc =			0;
	mga->prowscan = 		0;
	mga->currowstr = 		0;
	mga->currowend = 		0;
	mga->curoff = 		1;
	mga->undrow = 		0;
	mga->curskew = 		0;
	mga->conv2t4 = 		0;
	mga->interlace =		0;
	mga->hdispskew =		0;
	mga->bytepan = 		0;
	mga->dotclkrt = 		0;
	mga->dword =			0;
	mga->wbmode =		1;
	mga->addwrap = 		0;	/* Not Used ! */
	mga->selrowscan =		1;
	mga->cms =			1;
	mga->csynccen =		0; 	/* Disable composite sync */

	/* VIDRST Pin */
	mga->hrsten =			0; 	// Was 1;
	mga->vrsten =			0; 	// Was 1;

	/* vertical interrupt control ... disabled */
	mga->vinten = 		1;
	mga->vintclr = 		0;

	/* Let [hv]sync run freely */
	mga->hsyncoff =		0;
	mga->vsyncoff =		0;

	mga->crtcrstN =		1;

	mga->mgamode = 		1;
	mga->scale   =		(mode->z == 24) ? ((1 << bppShift)*3)-1 : (1 << bppShift)-1;
	
	mga->crtcprotect =      1;
	mga->winsize = 		0;
	mga->winfreq = 		0;

	if ((mga->htotal == 0)
	    || (mga->hblkend <= (mga->hblkstr + 1))
	    || ((mga->htotal - mga->hdispend) == 0)
	    || ((mga->htotal - mga->bytepan + 2) <= mga->hdispend)
	    || (mga->hsyncstr <= (mga->hdispend + 2))
	    || (mga->vtotal == 0))
	{
		error("Invalid Power Graphic Mode :\n"
		      "mga->htotal = %ld\n"
		      "mga->hdispend = %ld\n"
		      "mga->hblkstr = %ld\n"
		      "mga->hblkend = %ld\n"
		      "mga->hsyncstr = %ld\n"
		      "mga->hsyncend = %ld\n"
		      "mga->hsyncdel = %ld\n"
		      "mga->vtotal = %ld\n"
		      "mga->vdispend = %ld\n"
		      "mga->vblkstr = %ld\n"
		      "mga->vblkend = %ld\n"
		      "mga->vsyncstr = %ld\n"
		      "mga->vsyncend = %ld\n"
		      "mga->linecomp = %ld\n",
		      mga->htotal,
		      mga->hdispend,
		      mga->hblkstr,
		      mga->hblkend,
		      mga->hsyncstr,
		      mga->hsyncend,
		      mga->hsyncdel,
		      mga->vtotal,
		      mga->vdispend,
		      mga->vblkstr,
		      mga->vblkend,
		      mga->vsyncstr,
		      mga->vsyncend,
		      mga->linecomp
		      );
	}

	mga->hiprilvl = 0;
	mga->maxhipri = 0;
	mga->c2hiprilvl = 0;
	mga->c2maxhipri = 0;

	mga->misc = ((mode->hsync != '-')?0:(1<<6)) | ((mode->vsync != '-')?0:(1<<7));

	trace("mga->htotal = %ld\n"
		      "mga->hdispend = %ld\n"
		      "mga->hblkstr = %ld\n"
		      "mga->hblkend = %ld\n"
		      "mga->hsyncstr = %ld\n"
		      "mga->hsyncend = %ld\n"
		      "mga->hsyncdel = %ld\n"
		      "mga->vtotal = %ld\n"
		      "mga->vdispend = %ld\n"
		      "mga->vblkstr = %ld\n"
		      "mga->vblkend = %ld\n"
		      "mga->vsyncstr = %ld\n"
		      "mga->vsyncend = %ld\n"
		      "mga->linecomp = %ld\n",
		      mga->htotal,
		      mga->hdispend,
		      mga->hblkstr,
		      mga->hblkend,
		      mga->hsyncstr,
		      mga->hsyncend,
		      mga->hsyncdel,
		      mga->vtotal,
		      mga->vdispend,
		      mga->vblkstr,
		      mga->vblkend,
		      mga->vsyncstr,
		      mga->vsyncend,
		      mga->linecomp
		      );	

	mga->crtc[0x00] = 0xff & mga->htotal;

	mga->crtc[0x01] = 0xff & mga->hdispend;

	mga->crtc[0x02] = 0xff & mga->hblkstr;

	mga->crtc[0x03] = (0x1f & mga->hblkend) 
		| ((0x03 & mga->hdispskew) << 5)
		| 0x80	/* cf 3-304 */
		;

	mga->crtc[0x04] = 0xff & mga->hsyncstr;

	mga->crtc[0x05] = (0x1f & mga->hsyncend) 
		| ((0x03 & mga->hsyncdel) << 5) 
		| ((0x01 & (mga->hblkend >> 5)) << 7)
		;

	mga->crtc[0x06] = 0xff & mga->vtotal;

	t = ((0x01 & (mga->vtotal >> 8)) << 0)
	  | ((0x01 & (mga->vdispend >> 8)) << 1)
	  | ((0x01 & (mga->vsyncstr >> 8)) << 2)
	  | ((0x01 & (mga->vblkstr >> 8)) << 3)
	  | ((0x01 & (mga->linecomp >> 8)) << 4)
	  | ((0x01 & (mga->vtotal >> 9)) << 5)
	  | ((0x01 & (mga->vdispend >> 9)) << 6)
	  | ((0x01 & (mga->vsyncstr >> 9)) << 7)
	  ;
	mga->crtc[0x07] = 0xff & t;

	mga->crtc[0x08] = (0x1f & mga->prowscan) 
		| ((0x03 & mga->bytepan) << 5)
		;

	mga->crtc[0x09] = (0x1f & mga->maxscan) 
		| ((0x01 & (mga->vblkstr >> 9)) << 5)
		| ((0x01 & (mga->linecomp >> 9)) << 6)
		| ((0x01 & mga->conv2t4) << 7)
		;

	mga->crtc[0x0a] = (0x1f & mga->currowstr)
		| ((0x01 & mga->curoff) << 5)
		;

	mga->crtc[0x0b] = (0x1f & mga->currowend)
		| ((0x03 & mga->curskew) << 5)
		;

	mga->crtc[0x0c] = 0xff & (mga->startadd >> 8);

	mga->crtc[0x0d] = 0xff & mga->startadd;

	mga->crtc[0x0e] = 0xff & (mga->curloc >> 8);

	mga->crtc[0x0f] = 0xff & mga->curloc;

	mga->crtc[0x10] = 0xff & mga->vsyncstr;

	mga->crtc[0x11] = (0x0f & mga->vsyncend)
		| ((0x01 & mga->vintclr) << 4)
		| ((0x01 & mga->vinten) << 5)
		| ((0x01 & mga->crtcprotect) << 7)
		;

	mga->crtc[0x12] = 0xff & mga->vdispend;

	mga->crtc[0x13] = 0xff & mga->offset;

	mga->crtc[0x14] = 0x1f & mga->undrow;	/* vga only */

	mga->crtc[0x15] = 0xff & mga->vblkstr;

	mga->crtc[0x16] = 0xff & mga->vblkend;

	mga->crtc[0x17] = ((0x01 & mga->cms) << 0)
		| ((0x01 & mga->selrowscan) << 1)
		| ((0x01 & mga->hsyncsel) << 2)
		| ((0x01 & mga->addwrap) << 5)
		| ((0x01 & mga->wbmode) << 6)
		| ((0x01 & mga->crtcrstN) << 7)
		;

	mga->crtc[0x18] = 0xff & mga->linecomp;
	
	mga->crtcext[0] = (0x0f & (mga->startadd >> 16))
		| ((0x03 & (mga->offset >> 8)) << 4)
		| ((0x01 & (mga->startadd >> 20)) << 6)
		| ((0x01 & mga->interlace) << 7)
		;

	mga->crtcext[1] = ((0x01 & (mga->htotal >> 8)) << 0)
		| ((0x01 & (mga->hblkstr >> 8)) << 1)
		| ((0x01 & (mga->hsyncstr >> 8)) << 2)
		| ((0x01 & mga->hrsten) << 3)
		| ((0x01 & mga->hsyncoff) << 4)
		| ((0x01 & mga->vsyncoff) << 5)
		| ((0x01 & (mga->hblkend >> 6)) << 6)
		| ((0x01 & mga->vrsten) << 7)
		;

	mga->crtcext[2] = ((0x03 & (mga->vtotal >> 10)) << 0)
		| ((0x01 & (mga->vdispend >> 10)) << 2)
		| ((0x03 & (mga->vblkstr >> 10)) << 3)
		| ((0x03 & (mga->vsyncstr >> 10)) << 5)
		| ((0x01 & (mga->linecomp >> 10)) << 7)
		;

	mga->crtcext[3] = ((0x07 & mga->scale) << 0)
		| ((0x01 & mga->csynccen) << 6)
		| ((0x01 & mga->mgamode) << 7)
		;

	mga->crtcext[4] = 0;	/* memory page ... not used in Power Graphic Mode */

	mga->crtcext[5] = 0;	/* Not used in non-interlaced mode */

	mga->crtcext[6] = ((0x07 & mga->hiprilvl) << 0)
		| ((0x07 & mga->maxhipri) << 4)
		;

	mga->crtcext[7] = ((0x07 & mga->winsize) << 1)
		| ((0x07 & mga->winfreq) << 5)
		;

	mga->crtcext[8] = (0x01 & (mga->startadd >> 21)) << 0;

	/* Initialize Sequencer */
	mga->sequencer[0] = 0;
	mga->sequencer[1] = 0;
	mga->sequencer[2] = 0x03;
	mga->sequencer[3] = 0;
	mga->sequencer[4] = 0x02;

	/* Graphic Control registers are ignored when not using 0xA0000 aperture */	
	for (i = 0; i < 9; i++)
		mga->graphics[i] = 0;	

	/* The Attribute Controler is not available in Power Graphics mode */
	for (i = 0; i < 0x15; i++)
		mga->attribute[i] = i;	

	/* disable vga load (want to do fields in different order) */
	for(c = vga->link; c; c = c->link)
		if (strncmp(c->name, "vga", 3) == 0)
			c->load = nil;
}

static void
load(Vga* vga, Ctlr* ctlr)
{
	Mga*	mga;
	int	i;
	uchar*	p;
	Mode*	mode;
	uchar	cursor;

	mga = vga->private;
	mode = vga->mode;

	trace("mga: Loading ...\n");
	dump_all_regs(mga);

	if (mode->z == 8)
		setpalettedepth(mode->z);

	trace("mga mmio at %#p\n", mga->mmio);
	trace("mga: loading vga registers ...\n" );
	if (ultradebug) Bflush(&stdout);

	/* Initialize Sequencer registers */
	for(i = 0; i < 5; i++)
		seqset(mga, i, mga->sequencer[i], 0xff);

	/* Initialize Attribute register */
	for(i = 0; i < 0x15; i++)
		attrset(mga, i, mga->attribute[i], 0xff);

	/* Initialize Graphic Control registers */
	for(i = 0; i < 9; i++)
		gctlset(mga, i, mga->graphics[i], 0xff);

	/* Wait VSYNC */
	while (mgaread8(mga, STATUS1) & 0x08);
	while (! (mgaread8(mga, STATUS1) & ~0x08));

	/* Turn off the video. */
	seqset(mga, Seq_ClockingMode, Scroff, 0);

	/* Crtc2 Off */
	mgawrite32(mga, C2_CTL, 0);

	/* Disable Cursor */
	cursor = dacset(mga, Dac_Xcurctrl, CursorDis, 0xff);

	/* Pixel Pll UP and set Pixel clock source to Pixel Clock PLL */
	dacset(mga, Dac_Xpixclkctrl, 0x01 | 0x08, 0x0f);

	trace("mga: waiting for the clock source becomes stable ...\n");
	while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
		;
	trace("mga: pixpll locked !\n");
	if (ultradebug) Bflush(&stdout);

	/* Enable LUT, Disable MAFC */
	dacset(mga, Dac_Xmiscctrl, Ramcs | Mfcsel, Vdoutsel);

	/* Disable Dac */
	dacset(mga, Dac_Xmiscctrl, 0, Dacpdn);

	/* Initialize Panel Mode */
	dacset(mga, Dac_Xpanelmode, 0, 0xff);

	/* Disable the PIXCLK and set Pixel clock source to Pixel Clock PLL */
	dacset(mga, Dac_Xpixclkctrl, Pixclkdis | 0x01, 0x3);

	/* Disable mapping of the memory */ 
	miscset(mga, 0, Misc_rammapen);

	/* Enable 8 bit palette */
	dacset(mga, Dac_Xmiscctrl, Vga8dac, 0);

	/* Select MGA Pixel Clock */
	miscset(mga, Misc_clksel, 0);

	/* Initialize Z Buffer ... (useful?) */
	mgawrite32(mga, Z_DEPTH_ORG, 0);

	/* Wait */
	for (i = 0; i < 50; i++)
		mgaread32(mga, MGA_STATUS);

	if ((mga->devid == MGA200) || ((mga->devid == MGA4XX) && (mga->revid & 0x80) == 0x00)) { 
		dacset(mga, Dac_Xpixpllcm, mga->pixpll_m, 0xff);
		dacset(mga, Dac_Xpixpllcn, mga->pixpll_n, 0xff);
		dacset(mga, Dac_Xpixpllcp, mga->pixpll_p, 0xff);

		/* Wait until new clock becomes stable */
		trace("mga: waiting for the clock source becomes stable ...\n");
		while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
			;
		trace("mga: pixpll locked !\n");
	} else {
	/* MGA450 and MGA550 */
		/* Wait until new clock becomes stable */
		trace("mga450: waiting for the clock source becomes stable ...\n");
		while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
			;
		trace("mga: pixpll locked !\n");

		G450SetPLLFreq(mga, (long) mga->Fneeded / 1000);
	}

	/* Enable Pixel Clock Oscillation */
	dacset(mga, Dac_Xpixclkctrl, 0, Pixclkdis);
	if (ultradebug) Bflush(&stdout);

	/* Enable Dac */
	dacset(mga, Dac_Xmiscctrl, Dacpdn, 0);

	/* Set Video Mode */
	switch (mode->z) {
	case 8:
		dacset(mga, Dac_Xmulctrl, _8bitsPerPixel, ColorDepth);	
		break;
	case 16:
		dacset(mga, Dac_Xmulctrl, _16bitsPerPixel, ColorDepth);	
		break;
	case 24:
		dacset(mga, Dac_Xmulctrl, _24bitsPerPixel, ColorDepth);	
		break;
	case 32:
		dacset(mga, Dac_Xmulctrl, _32bitsPerPixel, ColorDepth);
		break;
	default: 
		error("Unsupported depth %d\n", mode->z);
	}

	/* Wait */
	for (i = 0; i < 50; i++)
		mgaread32(mga, MGA_STATUS);

	/* Wait until new clock becomes stable */
	trace("mga: waiting for the clock source becomes stable ...\n");
	if (ultradebug) Bflush(&stdout);
	while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
		;
	trace("mga: pixpll locked !\n");
	if (ultradebug) Bflush(&stdout);

	/* Initialize CRTC registers and remove irq */
	crtcset(mga, 0x11, (1<<4), (1<<5)|0x80);
	for (i = 0; i < 25; i++)
		crtcset(mga, i, mga->crtc[i], 0xff);

	trace("mga: crtc loaded !\n");
	if (ultradebug) Bflush(&stdout);

	/* Initialize CRTC Extension registers */
	for (i = 0; i < 9; i++)
		crtcextset(mga, i, mga->crtcext[i], 0xff);

	trace("mga: ext loaded !\n");
	if (ultradebug) Bflush(&stdout);

	/* Disable Zoom */
	dacset(mga, Dac_Xzoomctrl, 0, 0xff);

	trace("mga: XzoomCtrl Loaded !\n");
	if (ultradebug) Bflush(&stdout);

	/* Enable mga mode again ... Just in case :) */
	crtcextset(mga, CrtcExt_Miscellaneous, Mgamode, 0);

	trace("mga: crtcext MgaMode loaded !\n");
	if (ultradebug) Bflush(&stdout);

	if (mode->z == 32 || mode->z == 24 ) {
		/* Initialize Big Endian Mode ! */
		mgawrite32(mga, 0x1e54, 0x02 << 16);
	}


	/* Set final misc ... enable mapping ... */
	miscset(mga, mga->misc | Misc_rammapen, 0);

	trace("mga: mapping enabled !\n");
	if (ultradebug) Bflush(&stdout);

	/* Enable Screen */
	seqset(mga, 1, 0, 0xff);

	trace("screen enabled ...\n");

	if (0) {
		p = mga->mmfb;
		for (i = 0; i < mga->fbsize; i++)
			*p++ = (0xff & i);
	}

	trace("mga: Loaded !\n" );
	dump_all_regs(mga);
	if (ultradebug) Bflush(&stdout);

	trace("mga: Loaded [bis]!\n" );

	/*
	 * TODO: In 16bpp mode, what is the correct palette ?
	 *       in the meantime lets use the default one,
	 *       which has a weird color combination.
	 */

	if (mode->z != 8 && mode ->z != 16) {
		/* Initialize Palette */
		mgawrite8(mga, RAMDACIDX, 0);
		for (i = 0; i < 0x100; i++) {
			mgawrite8(mga, RAMDACPALDATA, i);
			mgawrite8(mga, RAMDACPALDATA, i);
			mgawrite8(mga, RAMDACPALDATA, i);
		}
	}

	trace("mga: Palette initialised !\n");

	/* Enable Cursor */
	dacset(mga, Dac_Xcurctrl, cursor, 0xff);

	ctlr->flag |= Fload;
	if (ultradebug) Bflush(&stdout);
}

Ctlr mga4xx = {
	"mga4xx",			/* name */
	snarf,				/* snarf */
	options,				/* options */
	init,					/* init */
	load,					/* load */
	dump,				/* dump */
};

Ctlr mga4xxhwgc = {
	"mga4xxhwgc",		/* name */
	0,					/* snarf */
	0,					/* options */
	0,					/* init */
	0,					/* load */
	dump,				/* dump */
};