virge.c

这是一个同样来自贝尔实验室的和UNIX有着渊源的操作系统, 其简洁的设计和实现易于我们学习和理解

#include <u.h>
#include <libc.h>
#include <bio.h>

#include "pci.h"
#include "vga.h"

/*
 * S3 Trio/ViRGE/Savage4
 * Requires work.
 */

/* on some cards, savage4mem[1] == 8, but i don't know how to tell. -rsc */
static uchar savage4mem[] = { 2, 4, 8, 12, 16, 32, 0, 32};
static void
snarf(Vga* vga, Ctlr* ctlr)
{
	int i, id;
	char *p;

	/*
	 * The Trio/ViRGE variants have some extra sequencer registers
	 * which need to be unlocked for access.
	 */
	vgaxo(Seqx, 0x08, 0x06);
	s3generic.snarf(vga, ctlr);

	for(i = 0x08; i < 0x4F; i++)
		vga->sequencer[i] = vgaxi(Seqx, i);
	vga->crt[0x2D] = vgaxi(Crtx, 0x2D);
	vga->crt[0x2E] = vgaxi(Crtx, 0x2E);
	vga->crt[0x2F] = vgaxi(Crtx, 0x2F);
	for(i = 0x70; i < 0x99; i++)
		vga->crt[i] = vgaxi(Crtx, i);

	id = (vga->crt[0x2D]<<8)|vga->crt[0x2E];
	switch(id){

	default:
		trace("Unknown ViRGE/Trio64+ - 0x%4.4uX\n",
			(vga->crt[0x2D]<<8)|vga->crt[0x2E]);
		/*FALLTHROUGH*/

	case 0x8810:				/* Microsoft Virtual PC 2004 */
	case 0x8811:				/* Trio64+ */
		vga->r[1] = 3;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 135000000;
		trace("Trio64+\n");
		break;

	case 0x8812:				/* Aurora64V+ */
		vga->r[1] = 3;
		vga->m[1] = 127;
		vga->n[1] = 63;
		vga->f[1] = 135000000;
		trace("Aurora64V+\n");
		break;

	case 0x8901:				/* Trio64V2 */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 170000000;
		trace("Trio64V2\n");
		break;

	case 0x5631:				/* ViRGE */
		vga->r[1] = 3;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 135000000;
		vga->apz = 64*1024*1024;
		trace("ViRGE\n");
		break;

	case 0x8A01:				/* ViRGE/[DG]X */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 170000000;
		trace("ViRGE/[DG]X\n");
		break;

	case 0x8A10:				/* ViRGE/GX2 */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 170000000;
		vga->apz = 64*1024*1024;
		trace("ViRGE/GX2\n");
		/*
		 * Memory encoding on the ViRGE/GX2 is different.
		 */
		switch((vga->crt[0x36]>>6) & 0x03){

		case 0x01:
			vga->vmz = 4*1024*1024;
			break;

		case 0x03:
			vga->vmz = 2*1024*1024;
			break;
		}
		break;

	case 0x883D:				/* ViRGE/VX */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 31;
		vga->f[1] = 220000000;
		vga->apz = 64*1024*1024;
		trace("ViRGE/VX\n");
		/*
		 * Memory encoding on the ViRGE/VX is different.
		 */
		vga->vmz = (2*(((vga->crt[0x36]>>5) & 0x03)+1)) * 1*1024*1024;
		break;

	case 0x8C10:				/* Savage MX/MV */
	case 0x8C12:				/* Savage4/IX-MV */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 127;
		vga->f[1] = 135000000;		/* without clock-doubling */
		for(i = 0x50; i < 0x70; i++)
			vga->sequencer[i] = vgaxi(Seqx, i);
		vga->apz = 128*1024*1024;
		vga->vmz = savage4mem[vga->crt[0x36]>>5] * 1024 * 1024;
		trace("Savage4/IX-MV\n");
		break;

	case 0x8C2E:				/* SuperSavage/IXC16 */
		/*
		 * This is all guessed, from the Savage4/IX,
		 * inspection of the card (apz), and web pages
		 * talking about the chip (f[1]).  It seems to
		 * work on the IBM Thinkpad T23.
		 *
		 * XXX only 1024x768 works, not 1400x1050.
		 */
		vga->r[1] = 4;
		vga->m[1] = 127;
		vga->n[1] = 127;
		vga->f[1] = 135000000;		/* 300000000 after doubling? */
		for(i = 0x50; i < 0x70; i++)
			vga->sequencer[i] = vgaxi(Seqx, i);
		vga->apz = 64*1024*1024;
		vga->vmz = savage4mem[vga->crt[0x36]>>5] * 1024 * 1024;
		trace("SuperSavage/IXC16\n");
		break;

	case 0x8A22:				/* Savage4 */
	case 0x8A25:				/* ProSavage PN133 */
	case 0x8A26:				/* ProSavage KN133 */
	case 0x8D04:				/* ProSavage DDR, K.Okamoto */
		vga->r[1] = 4;
		vga->m[1] = 511;
		vga->n[1] = 127;
		vga->f[1] = 300000000;	

		vga->apz = 128*1024*1024;
		vga->vmz = savage4mem[vga->crt[0x36]>>5] * 1024 * 1024;
		trace("Savage4\n");
		break;
	}

	/*
	 * Work out the part speed-grade from name. Name can have,
	 * e.g. '-135' on the end for 135MHz part.
	 */
	if(p = strrchr(ctlr->name, '-'))
		vga->f[1] = strtoul(p+1, 0, 0) * 1000000;

	ctlr->flag |= Fsnarf;
}

static void
options(Vga *vga, Ctlr* ctlr)
{
	int id;

	id = (vga->crt[0x2D]<<8)|(vga->crt[0x2E]);
	switch(id){
	case 0x8C2E:				/* SuperSavage/IXC16 */
	case 0x8C10:				/* Savage MX/MV */
	case 0x8C12:				/* Savage4/IX-MV */
	case 0x8A22:				/* Savage4 */
	case 0x8A25:				/* ProSavage PN133 */
	case 0x8A26:				/* ProSavage KN133 */
	case 0x8D04:				/* ProSavabe DDR, K.Okamoto */
		/*
		 * Round up so stride is multiple of 16.
		 */
		if(vga->virtx%16)
			vga->virtx = (vga->virtx+15)&~15;
		break;
	}

	ctlr->flag |= Hlinear|Hpclk2x8|Henhanced|Foptions;
}

static void
init(Vga* vga, Ctlr* ctlr)
{
	char *p, *val;
	Mode *mode;
	ulong pclk, x;
	int id, noclockset, width;

	id = (vga->crt[0x2D]<<8)|vga->crt[0x2E];
	mode = vga->mode;

	/*
	 * double 16bpp horizontal timings on ViRGE/[DG]X
	 * leaves overflow bit-fiddling to s3generic.init
	 */
	if((id == 0x8A01) && ((mode->z+7)/8 == 2)){
		resyncinit(vga, ctlr, Uenhanced, 0);
		vga->crt[0x00] = ((mode->ht * 2) >> 3) - 5;
		vga->crt[0x01] = ((mode->x * 2) >> 3) - 1;
		vga->crt[0x02] = ((mode->shb * 2) >> 3) - 1;
		x = (mode->ehb * 2) >> 3;
		vga->crt[0x03] = 0x80 | (x & 0x1F);
		vga->crt[0x04] = (mode->shs * 2) >> 3;
		vga->crt[0x05] = ((mode->ehs * 2) >> 3) & 0x1F;
		if(x & 0x20)
			vga->crt[0x05] |= 0x80;
	}
	s3generic.init(vga, ctlr);

	/*
	 * Work out the part speed-grade from name. Name can have,
	 * e.g. '-135' on the end for 135MHz part.
	 */
	noclockset = 0;
	if(p = strrchr(ctlr->name, '-'))
		vga->f[1] = strtoul(p+1, 0, 0) * 1000000;
	pclk = vga->f[1];

	if(vga->mode->z > 8)
		width = vga->virtx*(vga->mode->z/8);
	else
		width = vga->virtx*(8/vga->mode->z);
	
	switch(id){

	case 0x8810:				/* Microsoft Virtual PC 2004 */
	case 0x8811:				/* Trio64+ */
		/*
		 * Part comes in -135MHz speed grade. In 8-bit mode
		 * the maximum DCLK is 80MHz. In 2x8-bit mode the maximum
		 * DCLK is 135MHz using the internal clock doubler.
		 */
		if((ctlr->flag & Hpclk2x8) && vga->mode->z == 8){
			if(vga->f[0] > 80000000)
				ctlr->flag |= Upclk2x8;
		}
		else
			pclk = 80000000;

		vga->crt[0x67] &= ~0xF2;
		if(ctlr->flag & Upclk2x8){
			vga->sequencer[0x15] |= 0x10;
			vga->sequencer[0x18] |= 0x80;
			/*
			 * There's a little strip of the border
			 * appears on the left in resolutions
			 * 1280 and above if the 0x02 bit isn't
			 * set (when it appears on the right...).
			 */
			vga->crt[0x67] |= 0x10;
		}
	
		/*
		 * VLB address latch delay.
		 */
		if((vga->crt[0x36] & 0x03) == 0x01)
			vga->crt[0x58] &= ~0x08;

		/*
		 * Display memory access control.
		 */
		vga->crt[0x60] = 0xFF;

		if(vga->mode->z > 8)
			error("trio64: depth %d not supported\n", vga->mode->z);
		break;

	case 0x8901:				/* Trio64V2 */
		vga->crt[0x90] = 0;
		vga->crt[0x91] = 0;
		break;
	case 0x8A10:				/* ViRGE/GX2 */
		vga->crt[0x90] = 0;
	
		vga->crt[0x31] |= 0x08;

		vga->crt[0x13] = (width>>3) & 0xFF;
		vga->crt[0x51] &= ~0x30;
		vga->crt[0x51] |= (width>>7) & 0x30;

		/*
		 * Increase primary FIFO threshold
	 	 * to reduce flicker and tearing.
		 */
		vga->crt[0x85] = 0x0F;

		/*FALLTHROUGH*/
	case 0x5631:				/* ViRGE */
	case 0x8A01:				/* ViRGE/[DG]X */
		if(id == 0x8A01){
			x = mode->x * ((mode->z + 7) / 8);
			x = (x + 7) / 8;
			vga->crt[0x91] = x & 0xFF;
			vga->crt[0x90] = (x >> 8) | 0x80;
		}
	case 0x883D:				/* ViRGE/VX */
		vga->crt[0x60] &= 0x0F;
		/*FALLTHROUGH*/
	case 0x8812:				/* Aurora64V+ */
		if(id == 0x8812)		/* Aurora64V+ */
			noclockset = 1;
		vga->crt[0x65] = 0;
		vga->crt[0x66] = 0x89;
		vga->crt[0x67] = 0;

		if(id == 0x883D){		/* ViRGE/VX */
			/*
			 * Put the VRAM in 1-cycle EDO mode.  
			 * If it is not put in this mode, hardware acceleration
			 * will leave little turds on the screen when hwfill is used.
			 */
			vga->crt[0x36] &= ~0x0C;

			if(vga->mode->x > 800 && vga->mode->z == 8)
				vga->crt[0x67] = 0x10;
			else
				vga->crt[0x67] = 0;

	 		/*
			 * Adjustments to the generic settings:
			 *	heuristic fiddling.
			 *
			 * We used to set crt[0x66] to 0x89, but setting it
			 * to 0x90 seems to allow us (and more importantly the card)
			 * to access more than 2MB of memory.
			 */
			vga->crt[0x66] = 0x90;
			vga->crt[0x58] &= ~0x88;
			vga->crt[0x58] |= 0x40;
			if(vga->mode->x > 640 && vga->mode->z >= 8)
				vga->crt[0x63] |= 0x01;
			else
				vga->crt[0x63] &= ~0x01;
		}

		/*
		 * The high nibble is the mode; or'ing in 0x02 turns
		 * on support for gamma correction via the DACs, but I
		 * haven't figured out how to turn on the 8-bit DACs,
		 * so gamma correction stays off.
		 */
		switch(vga->mode->z){
		case 1:
		case 2:
		case 4:
		case 8:
		default:
			vga->crt[0x67] |= 0x00;
			break;
		case 15:
			vga->crt[0x67] |= 0x30;
			break;
		case 16:
			vga->crt[0x67] |= 0x50;
			break;
		case 24:
			if(id == 0x8A10)	/* GX2 has to be different */