📄 drivers.c
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MCF_GPIO_PORTUB = (MCF_GPIO_PORTUB & 0xFB);
}
/*
* RTXENAssert : Assert the MC13192 RTXEN pin (initiates programmed cycle)
*
* Parameters : None
*
* Return : None
*/
void RTXENAssert(void)
{
MCF_GPIO_PORTUB = (MCF_GPIO_PORTUB | 0x04);
}
/*
* SPIDrvWrite : Write 1 word to SPI
*
* Parameters : u8Addr - SPI address
* u16Content - Data to send
*
* Return : None
*/
void SPIDrvWrite(UINT8 addr, UINT16 content)
{
/*disable interrupts to avoid double access to zigbee spi*/
MC13192DisableInterrupts();
/*Initialize Tx pkt Ram*/
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x0000; /*initialize CR for 8 bit xfer*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = addr; /*loads address */
AssertCE();
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x4000; /*initialize CR for 16 bit xfer*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = content; /*loads high byte */
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
DeAssertCE();
/*enable interrupts*/
MC13192RestoreInterrupts();
}
/*
* SPIDrvRead : Read 1 word from SPI
*
* Parameters : u8Addr - SPI address
*
* Return : u16Data - u16Data[0] is the MSB, u16Data[1] is the LSB
*/
UINT16 SPIDrvRead(UINT8 addr)
{
UINT16 value;
MC13192DisableInterrupts();
/*Initialize Tx pkt Ram*/
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x0000; /*initialize CR for pkt*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = (addr | 0x80); /*sets destination*/
AssertCE();
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x4000; /*initialize CR for pkt*/
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x10;
value = MCF_QSPI_QDR;
DeAssertCE();
MC13192RestoreInterrupts();
return value;
}
/*
* SPIDrvRead2 : Read the second word from SPI
*
* Parameters : u8Addr - SPI address
*
* Return : u16Data - u16Data[0] is the MSB, u16Data[1] is the LSB
*/
UINT16 SPIDrvRead2(UINT8 addr)
{
UINT8 tempvalue;
UINT16 value;
MC13192DisableInterrupts();
/*Initialize Tx pkt Ram*/
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x0000; /*initialize CR for pkt*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = (addr | 0x80); /*sets destination*/
AssertCE();
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x4000; /*initialize CR for pkt*/
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x10;
value = MCF_QSPI_QDR;
DeAssertCE();
MC13192RestoreInterrupts();
return value;
}
/*
* MC13192DisableInterrupts : Disable MC13192 interrupts
*
* Parameters : None
*
* Return : None
*/
void MC13192DisableInterrupts(void)
{
gu8IRQValue = MCF_EPORT_EPIER;
MCF_EPORT_EPIER = (gu8IRQValue & 0xFD);
}
/*
* MC13192RestoreInterrupts : Restore MC13192 interrupts to previous condition
*
* Parameters : None
*
* Return : None
*/
void MC13192RestoreInterrupts(void)
{
MCF_EPORT_EPIER = gu8IRQValue;
}
/*
* RAMDrvWriteTx : Write a block of data to TX packet RAM, whichever is selected
*
* Parameters : length - Length of the block of data in bytes
* *contents - Pointer to the data block
*
* Return : None
*/
void RAMDrvWriteTx(tTxPacket *tx_pkt)
{
UINT16 tmp;
UINT8 tmp2;
int i;
/*Prepare the packet length by adding 2 to the total value*/
/*for MDR purposes*/
tmp = SPIDrvRead(TX_PKT_LEN);
SPIDrvWrite(TX_PKT_LEN,((tmp & 0xFF80) | (tx_pkt->u8DataLength + 4) ));
MC13192DisableInterrupts();
MCF_QSPI_QAR = 0x20;
MCF_QSPI_QDR = 0x0000;
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = TX_PKT;
/*Drop chip select and send address and first byte*/
AssertCE();
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x4000; /*16 bit transfers*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = 0xFF7E;
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
for(i=0; i<=tx_pkt->u8DataLength;)
//for (i=0; i<((tx_pkt->u8DataLength+1) >> 1); i++)
{
MCF_QSPI_QAR = 0x00;
MCF_QSPI_QDR = (((UINT16)tx_pkt->pu8Data[i+1])<<8|(UINT16)tx_pkt->pu8Data[i]); /* high byte */
//MCF_QSPI_QDR = (UINT8)tx_pkt->pu8Data[i+1]; /* high byte */
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
//MCF_QSPI_QAR = 0x00;
//MCF_QSPI_QDR = (UINT8)tx_pkt->pu8Data[i]; /* low byte */
//MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
//SPIWaitTransferDone ();
//MCF_QSPI_QIR = (0xD00F | MCF_QSPI_QIR_SPIF);
i = i+2;
}
DeAssertCE();
MC13192RestoreInterrupts();
}
/*
* RAMDrvReadRx : Read a block of data from RX packet RAM, whichever is selected
*
* Parameters : *length - Returned length of the block of data in bytes
* *contents - Pointer to the data block storage
*
* Return : Status
*/
UINT8 RAMDrvReadRx(tRxPacket *rx_pkt)
{
UINT16 tmp;
UINT8 tmp2;
int i;
rx_pkt->u8DataLength = rx_pkt->u8DataLength - 4;
MC13192DisableInterrupts();
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x0000; /*initialize CR for pkt*/
/*Grab first byte*/
MCF_QSPI_QAR = 0x00; /*points to TX pkt ram*/
MCF_QSPI_QDR = 0x81; /*sets destination*/
AssertCE();
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF); /*clears tsfr status bit*/
MCF_QSPI_QAR = 0x20; /*points to the command ram*/
MCF_QSPI_QDR = 0x4000; /*initialize CR for pkt*/
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF); /*clears tsfr status bit*/
/*2 bytes have been ignored*/
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF); /*clears tsfr status bit*/
/*2byte codes have been ignored*/
for(i = 0; i<= rx_pkt->u8DataLength ;)
{
MCF_QSPI_QDLYR = 0x8000; /*will tsfr above info to zigbee*/
SPIWaitTransferDone ();
MCF_QSPI_QIR = (MCF_QSPI_QIR | MCF_QSPI_QIR_SPIF); /*clears tsfr status bit*/
MCF_QSPI_QAR = 0x10;
tmp = MCF_QSPI_QDR;
if(i+1 == rx_pkt->u8DataLength )
{
/*do nothing garbage byte*/
}
else
{
rx_pkt->pu8Data[i+1] = (tmp>>8);
}
rx_pkt->pu8Data[i] = tmp;
i = i + 2;
}
DeAssertCE();
MC13192RestoreInterrupts();
return SUCCESS;
}
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