ch7013.h

ch7013驱动

#ifndef _CH7013B_H
#define _CH7013B_H
/***************************************************************************************/
#define  CM7013_ADDR_OPT      0
/*-------------------------------------------------------------------------------------*/
#if CM7013_ADDR_OPT==1 
  #define DeviceID    0x75
#else
  #define DeviceID    0x76
#endif 
 
#define AutoInc     (1 << 6)

/*-------------------------------------------------------------------------------------*/
//Macro of Regster Address
#define DMR     0x00
#define FFR     0x01
#define VBW     0x03
#define IDF     0x04
#define CM      0x06
#define SAV     0x07
#define PO      0x08
#define BLR     0x09
#define HPR     0x0A
#define VPR     0x0B
#define SPR     0x0D
#define PMR     0x0E
#define CDR     0x10
#define CE      0x11
#define MNE     0x13
#define PLLM    0x14
#define PPLN    0x15
#define BCO     0x17
#define FSCI_1  0x18
#define FSCI_2  0x19
#define FSCI_3  0x1A
#define FSCI_4  0x1B
#define FSCI_5  0x1C
#define FSCI_6  0x1D
#define FSCI_7  0x1E
#define FSCI_8  0x1F
#define PLLC    0x20
#define CIVC    0x21
#define CIV_1   0x22
#define CIV_2   0x23
#define CIV_3   0x24
#define VID     0x25
#define TR_1    0x26
#define TR_2    0x27
#define TR_3    0x28
#define TR_4    0x29
#define AR      0x3F
/*-------------------------------------------------------------------------------------*/
//Macro for PMR Setting
#define SCART               (1 << 4)
#define Composite_Off       0x00
#define Power_Down          0x01
#define S_Vide_Off          0x02
#define Normal              0x03
#define Full_Power_Down     0x04
/*-------------------------------------------------------------------------------------*/
//Macro for SPR Setting
#define DES     (0 << 3)
#define SYO     (0 << 2)
#define VSP     (0 << 1)
#define HSP     (0)
/*-------------------------------------------------------------------------------------*///Macro for IDF Setting
#define DACG    (0 << 6)
#define REGBP   (1 << 5)
#define nonMulti_16Bit_RGB_16BitColr_565    0x00
#define nonMulti_16Bit_YCrCb_24BitColr      0x01
#define Multi_16Bit_RGB_24BitClor           0x02
#define nonMulti_15Bit_RGB_15BitColr_555    0x03
#define Multi_12Bit_RGB_24BitColr_C         0x04
#define Multi_12Bit_RGB_24BitColr_I         0x05
#define Multi_8Bit_RGB_24BitColr_888        0x06
#define Multi_8Bit_RGB_16BitColr_565        0x07
#define Multi_8Bit_RGB_15BitColr_555        0x08
#define Multi_8Bit_YCrCb_24BitClor          0x09
/*-------------------------------------------------------------------------------------*///Macro for CM setting
#define CFRB    (1 << 7)//Subcarrier  1 - locked to the video signal;    0 - free-runs 
#define M_S     (0 << 6)//Clock Mode   1 - Master;   0 - Slave
#define MCP     (0 << 4)//Edge of the pixel clock used to latch input data. 1 - Rise edge   0 - Fall edge

/***************************************************************************************/
void I2C_START();
void I2C_STOP();
void I2C_INIT();
U8   GetSCL();
U8   GetSDA();
void SetSCL(U8 level);
void SetSDA(U8 level);
void ReleaseSDA();
void IIC_Delay();
U8   I2C_ReadData();
BOOL I2C_WriteData(const U8 RegData);
/***************************************************************************************/
#endif