boot_gfd.s

ch7013驱动

;/*****************************************************
;	file name :	 	boot.s
;	descrition:		boot the arm processor
;	history:		2003-1-7 15:59 lc create
;*****************************************************/

	include	asm.h
	
	AREA BOOT, CODE, READONLY                                                     
	       ENTRY                           		; Mark first instruction to execute 
 

;vector table
    b		RST_DO  
	b		EXTENT_INSTRU
	b		SWI_DO
	b		ABORT_PREFETCH_DO
	b		ABORT_DATA_DO
	b		Reserve				;reserved exception
	b		Irq_Do
	b		Fiq_Do   
	;the code for the fiq

;*****************************************************************
;	init all the stacks under all CPU mode
;*****************************************************************	
RST_DO 
	EXPORT	RST_DO
	
	
	;init sp_svc
	ldr		sp, =SP_SVC 
	
	
	;chmod to irq and init sp_irq                                       
	mov		R1, #0xD2                                                  
	msr		cpsr_cf, R1
	ldr		sp, =SP_IRQ                                                 
	                                                           
	;chomod to fiq and init sp_fiq                                      
	mov		R1, #0XD1                                                  
	msr		cpsr_cf, R1                                                
	ldr		sp, =SP_FIQ                                                 
                                                                    
	;chomod to abt and init sp_ABT                                      
	mov		R1, #0XD7                                                  
	msr		cpsr_cf, R1
	ldr		sp, =SP_ABT                                                 
                                                                    
	;chomod to undf and init sp_UNDF                                    
	mov		R1, #0XDB                                                  
	msr		cpsr_cf, R1                                                
	ldr		sp, =SP_UND 	                                            
                                                                    
	;chomod to SYS and init sp_SYS                                       
	mov 	R1, #0xDF
	msr		cpsr_cxsf, R1
	ldr		sp, =SP_SYS
                                                                    
	;chmod to svc modle                                                 
	mov		R1, #0XD3                                                  
	msr		cpsr_c, R1   


;配置工作频率为60MHz

		ldr		r1, =0x1000100c
		ldr		r2, =0x17fff
		str		r2,[r1]
	        	
		ldr		r1, =0x10001014
		ldr		r2, =0x1
		str		r2,[r1]
	        	
		ldr		r1, =0x10001000
		ldr		r2, =0x018000cd
		str		r2,[r1]
	        	
		ldr		r1, =0x10001004
		ldr		r2, =0X230
		str		r2,[r1]
	        	
		ldr		r1, =0x10001004
		ldr		r2, =0X1230
		str		r2,[r1]


;****************************************************************
; 	init the EMI and get the memory space
;****************************************************************

		ldr		r1, =0x11000004    ;THE ADD OF EMI_CSGBAB   
		ldr		r2, =0x24002000	                     
		str		r2, [ r1 ] 


		ldr		r1, =0x11000008    ;THE ADD OF EMI_CSGBCD   
		ldr		r2, =0x2c002800	                       
		str		r2, [ r1 ]     

		ldr		r1, =0x1100000c    ;THE ADD OF EMI_CSGBEF   
		ldr		r2, =0x34003000	                       
		str		r2, [ r1 ]     

		                          
		ldr		r1, =0x11000000        ;THE ADD OF EMIADDR_SMCONF
		ldr		r2, =0x090003ff			;0x0b0001aa
		str		r2, [ r1 ]

;		ldr		r1, =0x11000014        ;THE ADD OF EMIADDR_SMCONF1
;		ldr		r2, =0x0110a077	
;		str		r2, [ r1 ]

;		ldr		r1, =0x11000018        ;THE ADD OF EMIADDR_SMCONF2
;		ldr		r2, =0x80000500
;		str		r2, [ r1 ]
   
	  	ldr		r1, =0x11000010    	;REMAP 0 ADDRESS TO SDRAM
		ldr		r2, =0x0000000b    	
		str		r2, [ r1 ] 

		
		ldr		r1, =0x10000000		; Disable all interrupt
		ldr		r2, =0x00000000
		str		r2, [ r1 ]

		ldr		r1, =0x10000004		; Mask All Interrupt
		ldr		r2, =0xFFFFFFFF
		str		r2, [ r1 ]

;***************************************************************
;    	enable CPSR IRQ bit
;***************************************************************
  	mrs		R1, cpsr
	bic		R1, R1, #0x80  		;set bit7 to zero
	msr		cpsr_c, R1     
		
;***************************************************************
	IMPORT	__main
	b		__main 


;***********************************************************  

Irq_Do
 	b	Irq_Do
    
EXTENT_INSTRU                                                         
	b		EXTENT_INSTRU                                             
	                                                                  
SWI_DO                                                              
	b		SWI_DO                                                    
	                                                                  
ABORT_PREFETCH_DO                                                     
	b		ABORT_PREFETCH_DO                                         
	                                                                  
ABORT_DATA_DO                                                         
	b		ABORT_DATA_DO                                             

Fiq_Do                                                                
	b		Fiq_Do                                                    

Reserve
	b		Reserve                                                                      
                                                                      
	END