idk7a400_board.h

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#define IDK_LED_SLEEP           0x0002

/* IDK Run mode LED control bit */
#define IDK_LED_RUN             0x0004

/* IDK Reset mode LED control bit */
#define IDK_LED_RESET           0x0008

/***********************************************************************
 * IDK power management register and bits
 *  Bit 0 = read only
 *    0 = POWERBAD_nTRUE signal is low
 *    1 = POWERBAD_nTRUE signal is high
 *  Bit 1 = read only
 *    0 = nSTANDBY signal is low
 *    1 = nSTANDBY signal is high
 *  Bit 2 = read only
 *    0 = nSUSPEND signal is low
 *    1 = nSUSPEND signal is high
 *  Bit 3 = read only
 *    0 = SW_nRESET signal is low
 *    1 = SW_nRESET signal is high
 **********************************************************************/

/* IDK POWERBAD_nTRUE mask bit */
#define IDK_POWERBAD_N          0x0001

/* IDK nSTANDBY mask bit */
#define IDK_STANDBY_N           0x0002

/* IDK nSUSPEND mask bit */
#define IDK_SUSPEND_N           0x0004

/* IDK SW_nRESET mask bit */
#define IDK_RESET_N             0x0008

/***********************************************************************
 * IDK interrupt register 0 and bits
 *  Bit 0 = read only
 *    0 = UART interrupt 1 is pending
 *    1 = UART interrupt 1 is not pending
 *  Bit 1 = read only
 *    0 = UART interrupt 2 is pending
 *    1 = UART interrupt 2 is not pending
 *  Bit 2 = read only
 *    0 = MMC interrupt is pending
 *    1 = MMC interrupt is not pending
 *  Bit 3 = read only
 *    0 = LAN2 (IDK) interrupt is pending
 *    1 = LAN2 (IDK) interrupt is not pending
 *  Bit 4 = read only
 *    0 = USB device controller suspend interrupt is pending
 *    1 = USB device controller suspend interrupt is not pending
 *  Bit 5 = read only
 *    0 = USB host controller suspend interrupt is pending
 *    1 = USB host controller suspend interrupt is not pending
 *  Bit 6 = read only
 *    0 = USB host controller interrupt is pending
 *    1 = USB host controller interrupt is not pending
 *  Bit 7 = read only
 *    0 = USB device interrupt is pending
 *    1 = USB device interrupt is not pending
**********************************************************************/

/* IDK UART interrupt 1 interrupt pending bit */
#define IDK_UART1INT_PEND       0x0001

/* IDK UART interrupt 2 interrupt pending bit */
#define IDK_UART2INT_PEND       0x0002

/* IDK MMC interrupt interrupt pending bit */
#define IDK_MMCINT_PEND         0x0004

/* IDK LAN interrupt interrupt pending bit */
#define IDK_LANINT_PEND         0x0008

/* IDK USB device suspend interrupt interrupt pending bit */
#define IDK_USBDEVSUSP_PEND     0x0010

/* IDK USB host suspend interrupt interrupt pending bit */
#define IDK_USBHOSTSUSP_PEND    0x0020

/* IDK USB device interrupt interrupt pending bit */
#define IDK_USBDEV_PEND         0x0040

/* IDK USB host interrupt interrupt pending bit */
#define IDK_USBHOST_PEND        0x0080

/***********************************************************************
 * IDK interrupt mask register 0 and bits
 *  Bit 0 = write only
 *    0 = UART interrupt 1 is not masked
 *    1 = UART interrupt 1 is masked
 *  Bit 1 = write only
 *    0 = UART interrupt 2 is not masked
 *    1 = UART interrupt 2 is masked
 *  Bit 2 = write only
 *    0 = MMC interrupt is not masked
 *    1 = MMC interrupt is masked
 *  Bit 3 = write only
 *    0 = LAN2 (IDK) interrupt is not masked
 *    1 = LAN2 (IDK) interrupt is masked
 *  Bit 4 = write only
 *    0 = USB device controller suspend interrupt is not masked
 *    1 = USB device controller suspend interrupt is masked
 *  Bit 5 = write only
 *    0 = USB host controller suspend interrupt is not masked
 *    1 = USB host controller suspend interrupt is masked
 *  Bit 6 = write only
 *    0 = USB host controller interrupt is not masked
 *    1 = USB host controller interrupt is masked
 *  Bit 7 = write only
 *    0 = USB device interrupt is not masked
 *    1 = USB device interrupt is masked
**********************************************************************/

/* IDK UART interrupt 1 mask bit */
#define IDK_UART1INT_MASK       IDK_UART1INT_PEND

/* IDK UART interrupt 2 mask bit */
#define IDK_UART2INT_MASK       IDK_UART2INT_PEND

/* IDK MMC interrupt mask bit */
#define IDK_MMCINT_MASK         IDK_MMCINT_PEND

/* IDK LAN interrupt mask bit */
#define IDK_LANINT_MASK         IDK_LANINT_PEND

/* IDK USB device suspend interrupt mask bit */
#define IDK_USBDEVSUSP_MASK     IDK_USBDEVSUSP_PEND

/* IDK USB host suspend interrupt mask bit */
#define IDK_USBHOSTSUSP_MASK    IDK_USBHOSTSUSP_PEND

/* IDK USB device interrupt mask bit */
#define IDK_USBDEV_MASK         IDK_USBDEV_PEND

/* IDK USB host interrupt mask bit */
#define IDK_USBHOST_MASK        IDK_USBHOST_PEND

/***********************************************************************
 * IDK interrupt register 1 and bits
 *  Bit 0 = read only
 *    0 = PCMCIA RDYA interrupt is pending
 *    1 = PCMCIA RDYA interrupt is not pending
 *  Bit 1 = read only
 *    0 = Voyager GX graphics controller interrupt is pending
 *    1 = Voyager GX graphics controller interrupt is not pending
 *  Bit 2 = read only
 *    0 = Battery charger interrupt is pending
 *    1 = Battery charger interrupt is not pending
**********************************************************************/

/* IDK PCMCIA RDYA interrupt pending bit */
#define IDK_PCMCIARDYAINT_PEND  0x0001

/* IDK Voyager FX Graphics controller interrupt pending bit */
#define IDK_FXGINT_PEND         0x0002

/* IDK Battery charger interrupt pending bit */
#define IDK_BATTINT_PEND        0x0004

/***********************************************************************
 * IDK interrupt mask register 1 and bits
 *  Bit 0 = write only
 *    0 = PCMCIA RDYA interrupt is not masked
 *    1 = PCMCIA RDYA interrupt is masked
 *  Bit 1 = write only
 *    0 = Voyager GX graphics controller interrupt is not masked
 *    1 = Voyager GX graphics controller interrupt is masked
 *  Bit 2 = write only
 *    0 = Battery charger interrupt is not masked
 *    1 = Battery charger interrupt is masked
**********************************************************************/

/* IDK PCMCIA RDYA interrupt mask bit */
#define IDK_PCMCIARDYAINT_MASK  IDK_PCMCIARDYAINT_PEND

/* IDK Voyager FX Graphics controller interrupt mask bit */
#define IDK_FXGINT_MASK         IDK_FXGINT_PEND

/* IDK Battery charger interrupt mask bit */
#define IDK_BATTINT_MASK        IDK_BATTINT_PEND

/***********************************************************************
 * IDK processor/CODEC type register and bits
 *  Bits 0..2 = read/write
 *    011 = Sharp LH79520 is in the card engine
 *    100 = Sharp LH7A400 is in the card engine
 *    101 = Sharp LH7A404 is in the card engine
 *    110 = Sharp LH75401 is in the card engine
 *  Bits 3..4 = read/write
 *    00 = Phillips UDA1345TS CODEC is in the card engine
 *    01 = TI TLV320DAC23GQE CODEC is in the card engine
 *    10 = Wolfson XWM9708CDS CODEC is in the card engine
 *  Bits 5..7 = read only (returns 000)
**********************************************************************/

/***********************************************************************
 * IDK IO controller code revision register and bits
 *  Bits 0..7 = read only (returns revision number of CPLD)
**********************************************************************/

/***********************************************************************
 * IDK control register and bits
 *  Bit 0 = read/write
 *    0 = Audio shutdown is enabled (AUDIO_SHDN)
 *    1 = Audio shutdown is disabled
 *  Bit 1 = read/write
 *    0 = MMC enable signal is enabled
 *    1 = MMC enable signal is disabled
 *  Bit 2 = reserved
 *  Bit 3 = read/write
 *    0 = KEYBOARD2_nEN signal is enabled
 *    1 = KEYBOARD2_nEN signal is disabled
**********************************************************************/

/* IDK audio shutdown bit */
#define IDK_AUDIO_SHDN          0x0001

/* IDK MMC disable bit */
#define IDK_MMC_NEN             0x0002

/* IDK keyboard read signal disable bit */
#define IDK_KEYBOARD2_NEN       0x0008

#endif /* IDK7A400_BOARD_H */