push.dump

ARM push assembly example

push.out:     file format elf32-littlearm

Disassembly of section .text:

00000000 <_start>:
   0:	ea000006 	b	20 <LCM_E_1>
   4:	ea00004e 	b	144 <undefined_handler>
   8:	ea00004e 	b	148 <swi_handler>
   c:	ea00004e 	b	14c <prefetch_handler>
  10:	ea00004e 	b	150 <abort_handler>
  14:	e1a00000 	nop			(mov r0,r0)
  18:	ea00004d 	b	154 <irq_handler>
  1c:	ea000074 	b	1f4 <fiq_handler>

00000020 <reset_handler>:
  20:	e59fd1d0 	ldr	sp, [pc, #1d0]	; 1f8 <fiq_handler+0x4>
  24:	e59f01d0 	ldr	r0, [pc, #1d0]	; 1fc <fiq_handler+0x8>
  28:	e3a01001 	mov	r1, #1	; 0x1
  2c:	e5c01000 	strb	r1, [r0]
  30:	e59f01c8 	ldr	r0, [pc, #1c8]	; 200 <fiq_handler+0xc>
  34:	e3a01000 	mov	r1, #0	; 0x0
  38:	e5c01000 	strb	r1, [r0]
  3c:	e59f01c0 	ldr	r0, [pc, #1c0]	; 204 <fiq_handler+0x10>
  40:	e3a01000 	mov	r1, #0	; 0x0
  44:	e5801000 	str	r1, [r0]
  48:	e3a00409 	mov	r0, #150994944	; 0x9000000
  4c:	e59f11b4 	ldr	r1, [pc, #1b4]	; 208 <fiq_handler+0x14>
  50:	e5801000 	str	r1, [r0]
  54:	e59f01b0 	ldr	r0, [pc, #1b0]	; 20c <fiq_handler+0x18>
  58:	e3a010cf 	mov	r1, #207	; 0xcf
  5c:	e5801000 	str	r1, [r0]
  60:	e59f01a8 	ldr	r0, [pc, #1a8]	; 210 <fiq_handler+0x1c>
  64:	e3a01030 	mov	r1, #48	; 0x30
  68:	e5801000 	str	r1, [r0]
  6c:	e59f01a0 	ldr	r0, [pc, #1a0]	; 214 <fiq_handler+0x20>
  70:	e3a01000 	mov	r1, #0	; 0x0
  74:	e5801000 	str	r1, [r0]
  78:	e59f0198 	ldr	r0, [pc, #198]	; 218 <fiq_handler+0x24>
  7c:	e3a01000 	mov	r1, #0	; 0x0
  80:	e5801000 	str	r1, [r0]
  84:	e59f0190 	ldr	r0, [pc, #190]	; 21c <fiq_handler+0x28>
  88:	e59f1190 	ldr	r1, [pc, #190]	; 220 <fiq_handler+0x2c>
  8c:	e5801000 	str	r1, [r0]
  90:	e59f018c 	ldr	r0, [pc, #18c]	; 224 <fiq_handler+0x30>
  94:	e3a01000 	mov	r1, #0	; 0x0
  98:	e5801000 	str	r1, [r0]
  9c:	e59f0184 	ldr	r0, [pc, #184]	; 228 <fiq_handler+0x34>
  a0:	e3a01000 	mov	r1, #0	; 0x0
  a4:	e5801000 	str	r1, [r0]
  a8:	e59f017c 	ldr	r0, [pc, #17c]	; 22c <fiq_handler+0x38>
  ac:	e3a01d05 	mov	r1, #320	; 0x140
  b0:	e5801000 	str	r1, [r0]
  b4:	e28f6f6a 	add	r6, pc, #424	; 0x1a8
  b8:	e3a08005 	mov	r8, #5	; 0x5

000000bc <lcm_init_loop>:
  bc:	e5d61000 	ldrb	r1, [r6]
  c0:	e3a020df 	mov	r2, #223	; 0xdf
  c4:	eb000072 	bl	294 <stop+0x3>
  c8:	e2866001 	add	r6, r6, #1	; 0x1
  cc:	e2588001 	subs	r8, r8, #1	; 0x1
  d0:	1afffff9 	bne	bc <lcm_init_loop>
  d4:	e59f0154 	ldr	r0, [pc, #154]	; 230 <fiq_handler+0x3c>
  d8:	e3a01401 	mov	r1, #16777216	; 0x1000000
  dc:	e5801000 	str	r1, [r0]
  e0:	e59f014c 	ldr	r0, [pc, #14c]	; 234 <fiq_handler+0x40>
  e4:	e3a01401 	mov	r1, #16777216	; 0x1000000
  e8:	e5801000 	str	r1, [r0]
  ec:	e59f0144 	ldr	r0, [pc, #144]	; 238 <fiq_handler+0x44>
  f0:	e3a01000 	mov	r1, #0	; 0x0
  f4:	e5801000 	str	r1, [r0]
  f8:	e59f013c 	ldr	r0, [pc, #13c]	; 23c <fiq_handler+0x48>
  fc:	e59f113c 	ldr	r1, [pc, #13c]	; 240 <fiq_handler+0x4c>
 100:	e5801000 	str	r1, [r0]
 104:	e59f0138 	ldr	r0, [pc, #138]	; 244 <fiq_handler+0x50>
 108:	e59f1138 	ldr	r1, [pc, #138]	; 248 <fiq_handler+0x54>
 10c:	e5801000 	str	r1, [r0]
 110:	e59f0134 	ldr	r0, [pc, #134]	; 24c <fiq_handler+0x58>
 114:	e3a01041 	mov	r1, #65	; 0x41
 118:	e5801000 	str	r1, [r0]
 11c:	e59f012c 	ldr	r0, [pc, #12c]	; 250 <fiq_handler+0x5c>
 120:	e59f1120 	ldr	r1, [pc, #120]	; 248 <fiq_handler+0x54>
 124:	e5801000 	str	r1, [r0]
 128:	e3a000d2 	mov	r0, #210	; 0xd2
 12c:	e121f000 	msr	CPSR_c, r0
 130:	e59fd11c 	ldr	sp, [pc, #11c]	; 254 <fiq_handler+0x60>
 134:	e3a00010 	mov	r0, #16	; 0x10
 138:	e121f000 	msr	CPSR_c, r0
 13c:	e59fd114 	ldr	sp, [pc, #114]	; 258 <fiq_handler+0x64>
 140:	ea000048 	b	268 <string_init+0x4>

00000144 <undefined_handler>:
 144:	e1b0f00e 	movs	pc, lr

00000148 <swi_handler>:
 148:	e1b0f00e 	movs	pc, lr

0000014c <prefetch_handler>:
 14c:	e25ef004 	subs	pc, lr, #4	; 0x4

00000150 <abort_handler>:
 150:	e25ef008 	subs	pc, lr, #8	; 0x8

00000154 <irq_handler>:
 154:	e24ee004 	sub	lr, lr, #4	; 0x4
 158:	e92d5fff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}
 15c:	e59f00f8 	ldr	r0, [pc, #f8]	; 25c <fiq_handler+0x68>
 160:	e4b04000 	ldrt	r4, [r0]
 164:	e3140001 	tst	r4, #1	; 0x1
 168:	1b000002 	blne	178 <irq0_handler>
 16c:	e3140040 	tst	r4, #64	; 0x40
 170:	1b00000d 	blne	1ac <irq6_handler>
 174:	e8fd9fff 	ldmia	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}^

00000178 <irq0_handler>:
 178:	e59f00cc 	ldr	r0, [pc, #cc]	; 24c <fiq_handler+0x58>
 17c:	e3a01001 	mov	r1, #1	; 0x1
 180:	e4a01000 	strt	r1, [r0]
 184:	e59f0070 	ldr	r0, [pc, #70]	; 1fc <fiq_handler+0x8>
 188:	e4f01000 	ldrbt	r1, [r0]
 18c:	e3510080 	cmp	r1, #128	; 0x80
 190:	11a01081 	movne	r1, r1, lsl #1
 194:	03a01001 	moveq	r1, #1	; 0x1
 198:	e5c01000 	strb	r1, [r0]
 19c:	e1e01001 	mvn	r1, r1
 1a0:	e59f00b8 	ldr	r0, [pc, #b8]	; 260 <fiq_handler+0x6c>
 1a4:	e4a01000 	strt	r1, [r0]
 1a8:	e1a0f00e 	mov	pc, lr

000001ac <irq6_handler>:
 1ac:	e1a0300e 	mov	r3, lr
 1b0:	e59f0094 	ldr	r0, [pc, #94]	; 24c <fiq_handler+0x58>
 1b4:	e3a01040 	mov	r1, #64	; 0x40
 1b8:	e4a01000 	strt	r1, [r0]
 1bc:	e3a01001 	mov	r1, #1	; 0x1
 1c0:	e3a020df 	mov	r2, #223	; 0xdf
 1c4:	eb000032 	bl	294 <stop+0x3>
 1c8:	e59f0030 	ldr	r0, [pc, #30]	; 200 <fiq_handler+0xc>
 1cc:	e5d01000 	ldrb	r1, [r0]
 1d0:	e3510009 	cmp	r1, #9	; 0x9
 1d4:	00411001 	subeq	r1, r1, r1
 1d8:	12811001 	addne	r1, r1, #1	; 0x1
 1dc:	e5c01000 	strb	r1, [r0]
 1e0:	e2811030 	add	r1, r1, #48	; 0x30
 1e4:	e3a02020 	mov	r2, #32	; 0x20
 1e8:	eb000029 	bl	294 <stop+0x3>
 1ec:	e1a0e003 	mov	lr, r3
 1f0:	e1a0f00e 	mov	pc, lr

000001f4 <fiq_handler>:
 1f4:	e25ef004 	subs	pc, lr, #4	; 0x4
 1f8:	08030e00 	stmeqda	r3, {r9, r10, r11}
 1fc:	08030000 	stmeqda	r3, {}
 200:	08030001 	stmeqda	r3, {r0}
 204:	09001604 	stmeqdb	r0, {r2, r9, r10, r12}
 208:	00003fff 	streqsh	r3, [r0], -pc
 20c:	09001644 	stmeqdb	r0, {r2, r6, r9, r10, r12}
 210:	09000020 	stmeqdb	r0, {r5}
 214:	0900160c 	stmeqdb	r0, {r2, r3, r9, r10, r12}
 218:	09001608 	stmeqdb	r0, {r3, r9, r10, r12}
 21c:	09000004 	stmeqdb	r0, {r2}
 220:	00000faa 	andeq	r0, r0, r10, lsr #31
 224:	09001654 	stmeqdb	r0, {r2, r4, r6, r9, r10, r12}
 228:	09001650 	stmeqdb	r0, {r4, r6, r9, r10, r12}
 22c:	09000028 	stmeqdb	r0, {r3, r5}
 230:	09001204 	stmeqdb	r0, {r2, r9, r12}
 234:	09001208 	stmeqdb	r0, {r3, r9, r12}
 238:	0900120c 	stmeqdb	r0, {r2, r3, r9, r12}
 23c:	09001218 	stmeqdb	r0, {r3, r4, r9, r12}
 240:	01ffffff 	ldreqsh	pc, [pc, #ff]	; 347 <delay+0x22>
 244:	0900121c 	stmeqdb	r0, {r2, r3, r4, r9, r12}
 248:	01ffffbe 	ldreqh	pc, [pc, #fe]	; 34e <delay+0x29>
 24c:	09001220 	stmeqdb	r0, {r5, r9, r12}
 250:	09001200 	stmeqdb	r0, {r9, r12}
 254:	08031000 	stmeqda	r3, {r12}
 258:	08030f00 	stmeqda	r3, {r8, r9, r10, r11}
 25c:	09001214 	stmeqdb	r0, {r2, r4, r9, r12}
 260:	09001600 	stmeqdb	r0, {r9, r10, r12}

00000264 <string_init>:
 264:	0e010838 	mcreq	8, 0, r0, cr1, cr8, {1}
 268:	9f00c306 	swils	0x0000c306

00000269 <start>:
 269:	e59f00c3 	ldr	r0, [pc, #c3]	; 334 <delay+0xf>
 26d:	e5d01000 	ldrb	r1, [r0]
 271:	e1e01001 	mvn	r1, r1
 275:	e59f00bb 	ldr	r0, [pc, #bb]	; 338 <delay+0x13>
 279:	e5801000 	str	r1, [r0]
 27d:	e59f00b7 	ldr	r0, [pc, #b7]	; 33c <delay+0x17>
 281:	e5d01000 	ldrb	r1, [r0]
 285:	e2811030 	add	r1, r1, #48	; 0x30
 289:	e3a02020 	mov	r2, #32	; 0x20
 28d:	ebffffff 	bl	291 <stop>

00000291 <stop>:
 291:	eafffffd 	b	28d <start+0x24>

00000295 <lcm_write>:
 295:	e92d40ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, lr}
 299:	e3a03000 	mov	r3, #0	; 0x0
 29d:	e3a05000 	mov	r5, #0	; 0x0
 2a1:	e59f0097 	ldr	r0, [pc, #97]	; 340 <delay+0x1b>
 2a5:	e59f4097 	ldr	r4, [pc, #97]	; 344 <delay+0x1f>
 2a9:	e0033004 	and	r3, r3, r4
 2ad:	e5803000 	str	r3, [r0]
 2b1:	e59f008f 	ldr	r0, [pc, #8f]	; 348 <delay+0x23>
 2b5:	eb000019 	bl	321 <lcm_write+0x8c>
 2b9:	e59f008b 	ldr	r0, [pc, #8b]	; 34c <delay+0x27>
 2bd:	e1855002 	orr	r5, r5, r2
 2c1:	e5805000 	str	r5, [r0]
 2c5:	e59f0073 	ldr	r0, [pc, #73]	; 340 <delay+0x1b>
 2c9:	e59f407f 	ldr	r4, [pc, #7f]	; 350 <delay+0x2b>
 2cd:	e0033004 	and	r3, r3, r4
 2d1:	e5803000 	str	r3, [r0]
 2d5:	e59f006b 	ldr	r0, [pc, #6b]	; 348 <delay+0x23>
 2d9:	eb000010 	bl	321 <lcm_write+0x8c>
 2dd:	e59f005b 	ldr	r0, [pc, #5b]	; 340 <delay+0x1b>
 2e1:	e3a04020 	mov	r4, #32	; 0x20
 2e5:	e1833004 	orr	r3, r3, r4
 2e9:	e5803000 	str	r3, [r0]
 2ed:	e59f0053 	ldr	r0, [pc, #53]	; 348 <delay+0x23>
 2f1:	eb00000a 	bl	321 <lcm_write+0x8c>
 2f5:	e59f0057 	ldr	r0, [pc, #57]	; 354 <delay+0x2f>
 2f9:	e5801000 	str	r1, [r0]
 2fd:	e59f0043 	ldr	r0, [pc, #43]	; 348 <delay+0x23>
 301:	eb000006 	bl	321 <lcm_write+0x8c>
 305:	e59f0033 	ldr	r0, [pc, #33]	; 340 <delay+0x1b>
 309:	e59f4033 	ldr	r4, [pc, #33]	; 344 <delay+0x1f>
 30d:	e0033004 	and	r3, r3, r4
 311:	e5803000 	str	r3, [r0]
 315:	e59f002b 	ldr	r0, [pc, #2b]	; 348 <delay+0x23>
 319:	eb000000 	bl	321 <lcm_write+0x8c>
 31d:	e8bd40ff 	ldmia	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, lr}
 321:	e1a0f00e 	mov	pc, lr

00000325 <delay>:
 325:	e2500001 	subs	r0, r0, #1	; 0x1
 329:	1afffffc 	bne	321 <lcm_write+0x8c>
 32d:	e1a0f00e 	mov	pc, lr
 331:	00000000 	andeq	r0, r0, r0
 335:	00080300 	andeq	r0, r8, r0, lsl #6
 339:	01090016 	tsteq	r9, r6, lsl r0
 33d:	50080300 	andpl	r0, r8, r0, lsl #6
 341:	df090016 	swile	0x00090016
 345:	ffffffff 	swinv	0x00ffffff
 349:	4000001f 	andmi	r0, r0, pc, lsl r0
 34d:	ef090016 	swi	0x00090016
 351:	08ffffff 	ldmeqia	pc!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, sp, lr, pc}^
 355:	Address 0x355 is out of bounds.

Disassembly of section .data: