r2processor.flow.rpt

FFT基2 处理器（定点

Flow report for R2Processor
Fri Mar 30 17:46:52 2007
Version 5.0 Build 148 04/26/2005 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Elapsed Time
  5. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.



+--------------------------------------------------------------------------+
; Flow Summary                                                             ;
+-------------------------------+------------------------------------------+
; Flow Status                   ; Successful - Fri Mar 30 17:46:52 2007    ;
; Quartus II Version            ; 5.0 Build 148 04/26/2005 SJ Full Version ;
; Revision Name                 ; R2Processor                              ;
; Top-level Entity Name         ; R2Processor                              ;
; Family                        ; Stratix II                               ;
; Device                        ; EP2S90H484C5                             ;
; Timing Models                 ; Preliminary                              ;
; Met timing requirements       ; N/A                                      ;
; Total combinational functions ; 267                                      ;
; Total registers               ; 166                                      ;
; Total pins                    ; 163                                      ;
; Total virtual pins            ; 0                                        ;
; Total memory bits             ; 0                                        ;
; DSP block 9-bit elements      ; 6                                        ;
; Total PLLs                    ; 0                                        ;
; Total DLLs                    ; 0                                        ;
+-------------------------------+------------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 03/30/2007 17:46:42 ;
; Main task         ; Compilation         ;
; Revision Name     ; R2Processor         ;
+-------------------+---------------------+


+-------------------------------------+
; Flow Elapsed Time                   ;
+----------------------+--------------+
; Module Name          ; Elapsed Time ;
+----------------------+--------------+
; Analysis & Synthesis ; 00:00:11     ;
; Total                ; 00:00:11     ;
+----------------------+--------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off R2Processor -c R2Processor