16c74.h

pic16c6x和pic16c7xxx都可以通用

#pragma option -l;  // Disable header inclusion in listing
/*
        MPC Code Development System
        Header file for PIC16C74        V1.10

                        16C74.H

        (c) Copyright 1994   Byte Craft Limited
        421 King St.N., Waterloo, ON, Canada, N2J 4E4

        Sherif Abdel-Kader
*/

// 14-bit core
#pragma has PIC14;

// Reset and interrupt vectors
#pragma vector __RESET @ 0x0000;
#pragma vector __INT   @ 0x0004;

// ROM and RAM size/starting address
#pragma option +l;
#define MAXROM 4091
#pragma memory ROM [MAXROM] @ 0x05;
#pragma memory RAM [0x60]   @ 0x20;
#pragma memory RAM [0x60]   @ 0xA0;
#pragma option -l;  // Disable header inclusion in listing

char temp_WREG   @  0x20;  // Also 0xA0
char __WImage    @  0x21;
char temp_WImage @  0x22;
char temp_STATUS @  0x23;
char temp_FSR    @  0x24;   
char temp_PCLATH @  0x25;

// Math routines scratch pad space
char __SPAD[5]; 

// Working (W) register
registerw  WREG;

// Special-purpose registers
#pragma portw  INDF    @ 0x00;
#pragma portrw TMR0    @ 0x01;
#pragma portrw OPTION  @ 0x81;
#pragma portrw PCL     @ 0x02;
#pragma portrw STATUS  @ 0x03;
#pragma portrw FSR     @ 0x04;
#pragma portrw PORTA   @ 0x05;
#pragma portrw TRISA   @ 0x85;
#pragma portrw PORTB   @ 0x06;
#pragma portrw TRISB   @ 0x86;
#pragma portrw PORTC   @ 0x07;
#pragma portrw TRISC   @ 0x87;
#pragma portrw PORTD   @ 0x08;
#pragma portrw TRISD   @ 0x88;
#pragma portrw PORTE   @ 0x09;
#pragma portrw TRISE   @ 0x89;
#pragma portrw PCLATH  @ 0x0A;
#pragma portrw INTCON  @ 0x0B;
#pragma portrw PIR1    @ 0x0C;
#pragma portrw PIE1    @ 0x8C;
#pragma portrw PIR2    @ 0x0D;
#pragma portrw PIE2    @ 0x8D;
#pragma portrw TMR1L   @ 0x0E;
#pragma portrw PCON    @ 0x8E;
#pragma portrw TMR1H   @ 0x0F;
#pragma portrw T1CON   @ 0x10;
#pragma portrw TMR2    @ 0x11;
#pragma portrw T2CON   @ 0x12;
#pragma portrw PR2     @ 0x92;
#pragma portrw SSPBUF  @ 0x13;
#pragma portrw SSPADD  @ 0x93;
#pragma portrw SSPCON  @ 0x14;
#pragma portrw SSPSTAT @ 0x94;
#pragma portrw CCPR1L  @ 0x15;
#pragma portrw CCPR1H  @ 0x16;
#pragma portrw CCP1CON @ 0x17;
#pragma portrw RCSTA   @ 0x18;
#pragma portrw TXSTA   @ 0x98;
#pragma portrw TXREG   @ 0x19;
#pragma portrw SPBRG   @ 0x99;
#pragma portrw RCREG   @ 0x1A;
#pragma portrw CCPR2L  @ 0x1B;
#pragma portrw CCPR2H  @ 0x1C;
#pragma portrw CCP2CON @ 0x1D;
#pragma portrw ADRES   @ 0x1E;
#pragma portrw ADCON0  @ 0x1F;
#pragma portrw ADCON1  @ 0x9F;

// OPTION register bits
#define PS0      0
#define PS1      1
#define PS2      2
#define PSA      3
#define RTE      4
#define RTS      5
#define INTEDG   6
#define RBPU     7

// STATUS register bits
#define C        0
#define DC       1
#define Z        2
#define PD       3
#define TO       4
#define RP0      5
#define RP1      6
#define IRP      7

// PORTA register bits (special pins)
#define AN0      0
#define AN1      1
#define AN2      2
#define AN3      3
#define T0CKI    4
#define AN4      5
#define SS       5

// PORTB register bits (special pins)
#define INT      0

// PORTC register bits (special pins)
#define T1CKI    0
#define T1OSO    0
#define T1OSI    1
#define CCP2     1
#define CCP1     2
#define SCK      3
#define SCL      3
#define SDI      4
#define SDA      4
#define SDO      5
#define TX       6
#define CK       6
#define RX       7
#define DT       7

// TRISE register bits
#define TRISE0   0
#define TRISE1   1
#define TRISE2   2
#define PSPMODE  4
#define IBOV     5
#define OBF      6
#define IBF      7

// PORTE register bits
#define RD       0
#define AN5      0
#define WR       1
#define AN6      1
#define CS       2
#define AN7      2

// INTCON register bits
#define RBIF     0
#define INTF     1
#define T0IF     2
#define RBIE     3
#define INTE     4
#define T0IE     5
#define PEIE     6
#define GIE      7

// PIR1 register bits
#define TMR1IF   0
#define TMR2IF   1
#define CCP1IF   2
#define SSPIF    3
#define TXIF     4
#define RCIF     5
#define ADIF     6
#define PSPIF    7

// PIE1 register bits
#define TMR1IE   0
#define TMR2IE   1
#define CCP1IE   2
#define SSPIE    3
#define TXIE     4
#define RCIE     5
#define ADIE     6
#define PSPIE    7

// PIR2 register bits
#define CCP2IE   0

// PIE2 register bits
#define CCP2IF   0

// PCON register bits
#define POR      1

// T1CON register bits
#define TMR1ON   0
#define TMR1CS   1
#define T1INSYNC 2
#define T1OSCEN  3
#define T1CKPS0  4
#define T1CKPS1  5

// T2CON register bits
#define T2CKPS0  0
#define T2CKPS1  1
#define TMR2ON   2
#define TOUTPS0  3
#define TOUTPS1  4
#define TOUTPS2  5
#define TOUTPS3  6

// SSPCON register bits
#define SSPM0    0
#define SSPM1    1
#define SSPM2    2
#define SSPM3    3
#define CKP      4
#define SSPEN    5
#define SSPOV    6
#define WCOL     7

// SSPSTAT register bits
#define BF       0
#define UA       1
#define RW       2
#define S        3
#define P        4
#define DA       5

// RCSTA register bits
#define RCD8     0
#define OERR     1
#define FERR     2
#define CREN     4
#define SREN     5
#define R89      6
#define SPEN     7

// TXSTA register bits
#define TXD8     0
#define TRMT     1
#define BRGH     2
#define SYNC     4
#define TXEN     5
#define TX89     6
#define CSRC     7

// ADCON0 register bits
#define ADON    0
#define GO      2
#define N_DONE  2
#define CHS0    3
#define CHS1    4
#define CHS2    5
#define ADCS0   6
#define ADCS1   7

// ADCON1 register bits
#define PCFG0   0
#define PCFG1   1
#define PCFG2   2

// Enable listing for user program
#pragma option +l;