booth_pipeline.tan.qmsg

布思基四乘法器实现,很好用,快来看,希望对大家有所帮助.

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 30 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register aid_st2 register pro_tmp_st3\[3\] 268.67 MHz 3.722 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 268.67 MHz between source register \"aid_st2\" and destination register \"pro_tmp_st3\[3\]\" (period= 3.722 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.279 ns + Longest register register " "Info: + Longest register to register delay is 3.279 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns aid_st2 1 REG LC_X5_Y2_N9 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X5_Y2_N9; Fanout = 7; REG Node = 'aid_st2'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "" { aid_st2 } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 39 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.611 ns) + CELL(0.462 ns) 1.073 ns add~879 2 COMB LC_X5_Y2_N6 3 " "Info: 2: + IC(0.611 ns) + CELL(0.462 ns) = 1.073 ns; Loc. = LC_X5_Y2_N6; Fanout = 3; COMB Node = 'add~879'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "1.073 ns" { aid_st2 add~879 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.715 ns) + CELL(0.611 ns) 2.399 ns m1_tmp_st3\[3\]~59 3 COMB LC_X4_Y2_N6 2 " "Info: 3: + IC(0.715 ns) + CELL(0.611 ns) = 2.399 ns; Loc. = LC_X4_Y2_N6; Fanout = 2; COMB Node = 'm1_tmp_st3\[3\]~59'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "1.326 ns" { add~879 m1_tmp_st3[3]~59 } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 56 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.077 ns) 2.476 ns pro_tmp_st3\[0\]~48 4 COMB LC_X4_Y2_N7 2 " "Info: 4: + IC(0.000 ns) + CELL(0.077 ns) = 2.476 ns; Loc. = LC_X4_Y2_N7; Fanout = 2; COMB Node = 'pro_tmp_st3\[0\]~48'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "0.077 ns" { m1_tmp_st3[3]~59 pro_tmp_st3[0]~48 } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 52 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.077 ns) 2.553 ns pro_tmp_st3\[1\]~52 5 COMB LC_X4_Y2_N8 1 " "Info: 5: + IC(0.000 ns) + CELL(0.077 ns) = 2.553 ns; Loc. = LC_X4_Y2_N8; Fanout = 1; COMB Node = 'pro_tmp_st3\[1\]~52'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "0.077 ns" { pro_tmp_st3[0]~48 pro_tmp_st3[1]~52 } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 52 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.726 ns) 3.279 ns pro_tmp_st3\[3\] 6 REG LC_X4_Y2_N9 6 " "Info: 6: + IC(0.000 ns) + CELL(0.726 ns) = 3.279 ns; Loc. = LC_X4_Y2_N9; Fanout = 6; REG Node = 'pro_tmp_st3\[3\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "0.726 ns" { pro_tmp_st3[1]~52 pro_tmp_st3[3] } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 52 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.953 ns 59.56 % " "Info: Total cell delay = 1.953 ns ( 59.56 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.326 ns 40.44 % " "Info: Total interconnect delay = 1.326 ns ( 40.44 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "3.279 ns" { aid_st2 add~879 m1_tmp_st3[3]~59 pro_tmp_st3[0]~48 pro_tmp_st3[1]~52 pro_tmp_st3[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.279 ns" { aid_st2 add~879 m1_tmp_st3[3]~59 pro_tmp_st3[0]~48 pro_tmp_st3[1]~52 pro_tmp_st3[3] } { 0.000ns 0.611ns 0.715ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.462ns 0.611ns 0.077ns 0.077ns 0.726ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.093 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 61 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 61; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 30 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns pro_tmp_st3\[3\] 2 REG LC_X4_Y2_N9 6 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X4_Y2_N9; Fanout = 6; REG Node = 'pro_tmp_st3\[3\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "1.366 ns" { CLK pro_tmp_st3[3] } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 52 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK pro_tmp_st3[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_tmp_st3[3] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.093 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 61 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 61; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 30 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns aid_st2 2 REG LC_X5_Y2_N9 7 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X5_Y2_N9; Fanout = 7; REG Node = 'aid_st2'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "1.366 ns" { CLK aid_st2 } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 39 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK aid_st2 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout aid_st2 } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK pro_tmp_st3[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_tmp_st3[3] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } } { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK aid_st2 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout aid_st2 } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.235 ns + " "Info: + Micro clock to output delay of source is 0.235 ns" {  } { { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 39 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.208 ns + " "Info: + Micro setup delay of destination is 0.208 ns" {  } { { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 52 -1 0 } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "3.279 ns" { aid_st2 add~879 m1_tmp_st3[3]~59 pro_tmp_st3[0]~48 pro_tmp_st3[1]~52 pro_tmp_st3[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.279 ns" { aid_st2 add~879 m1_tmp_st3[3]~59 pro_tmp_st3[0]~48 pro_tmp_st3[1]~52 pro_tmp_st3[3] } { 0.000ns 0.611ns 0.715ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.462ns 0.611ns 0.077ns 0.077ns 0.726ns } } } { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK pro_tmp_st3[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout pro_tmp_st3[3] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } } { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK aid_st2 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout aid_st2 } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "m2_reg\[0\] M2\[0\] CLK 1.326 ns register " "Info: tsu for register \"m2_reg\[0\]\" (data pin = \"M2\[0\]\", clock pin = \"CLK\") is 1.326 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.211 ns + Longest pin register " "Info: + Longest pin to register delay is 3.211 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.708 ns) 0.708 ns M2\[0\] 1 PIN PIN_42 1 " "Info: 1: + IC(0.000 ns) + CELL(0.708 ns) = 0.708 ns; Loc. = PIN_42; Fanout = 1; PIN Node = 'M2\[0\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "" { M2[0] } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 32 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.328 ns) + CELL(0.175 ns) 3.211 ns m2_reg\[0\] 2 REG LC_X5_Y2_N4 7 " "Info: 2: + IC(2.328 ns) + CELL(0.175 ns) = 3.211 ns; Loc. = LC_X5_Y2_N4; Fanout = 7; REG Node = 'm2_reg\[0\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.503 ns" { M2[0] m2_reg[0] } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 36 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.883 ns 27.50 % " "Info: Total cell delay = 0.883 ns ( 27.50 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.328 ns 72.50 % " "Info: Total interconnect delay = 2.328 ns ( 72.50 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "3.211 ns" { M2[0] m2_reg[0] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.211 ns" { M2[0] M2[0]~combout m2_reg[0] } { 0.000ns 0.000ns 2.328ns } { 0.000ns 0.708ns 0.175ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.208 ns + " "Info: + Micro setup delay of destination is 0.208 ns" {  } { { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 36 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.093 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK\" to destination register is 2.093 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.727 ns) 0.727 ns CLK 1 CLK PIN_14 61 " "Info: 1: + IC(0.000 ns) + CELL(0.727 ns) = 0.727 ns; Loc. = PIN_14; Fanout = 61; CLK Node = 'CLK'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "" { CLK } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 30 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.792 ns) + CELL(0.574 ns) 2.093 ns m2_reg\[0\] 2 REG LC_X5_Y2_N4 7 " "Info: 2: + IC(0.792 ns) + CELL(0.574 ns) = 2.093 ns; Loc. = LC_X5_Y2_N4; Fanout = 7; REG Node = 'm2_reg\[0\]'" {  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "1.366 ns" { CLK m2_reg[0] } "NODE_NAME" } "" } } { "../../src/booth_pipeline.v" "" { Text "D:/Practice/Booth_mutipler/src/booth_pipeline.v" 36 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.301 ns 62.16 % " "Info: Total cell delay = 1.301 ns ( 62.16 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.792 ns 37.84 % " "Info: Total interconnect delay = 0.792 ns ( 37.84 % )" {  } {  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK m2_reg[0] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[0] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}  } { { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "3.211 ns" { M2[0] m2_reg[0] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.211 ns" { M2[0] M2[0]~combout m2_reg[0] } { 0.000ns 0.000ns 2.328ns } { 0.000ns 0.708ns 0.175ns } } } { "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" "" { Report "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline_cmp.qrpt" Compiler "booth_pipeline" "UNKNOWN" "V1" "D:/Practice/Booth_mutipler/pr/booth_pipeline/db/booth_pipeline.quartus_db" { Floorplan "D:/Practice/Booth_mutipler/pr/booth_pipeline/" "" "2.093 ns" { CLK m2_reg[0] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.093 ns" { CLK CLK~combout m2_reg[0] } { 0.000ns 0.000ns 0.792ns } { 0.000ns 0.727ns 0.574ns } } }  } 0}