exercise-5.c

TI MSP430针对cap sense 按键的源码, 可实现单击或滑动键, 如IPOD上的人机接口.

/* Exercise 5

    A simple oscilloscope demo for the FG439, using the ADC12 to sample a signal, and the
    UART to send the the results to a PC for display. A simple signal source is generated
    using timer A in PWM mode. Constructed from elements of examples:
        fet430_adc12_09.c
        fet430_tb_10.c
        fet430_uart01_0115k.c
        fet430_ta_17.c
*/
#include  <msp430xG43x.h>

#define PWM_PERIOD    3277

void main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                 // Stop WDT
    FLL_CTL0 |= XCAP18PF;                     // Configure load caps

    /* Based on fet430_uart01_0115k.c */
    P2SEL |= BIT4;                            // P2.4 = USART0 TXD
    ME1 |= UTXE0;                             // Enable USART0 TXD
    UCTL0 |= CHAR;                            // 8-bit character
    UTCTL0 |= SSEL1;                          // UCLK = SMCLK
    UBR00 = 0x09;                             // 1MHz 115200
    UBR10 = 0x00;                             //
    UMCTL0 = 0x08;                            // Modulation
    UCTL0 &= ~SWRST;                          // Initialize USART state machine

    /* Based on fet430_tb_10.c */
    TBCCR0 = 200 - 1;                         // PWM Period
    TBCCTL1 = OUTMOD_7;                       // TBCCR1 reset/set
    TBCCR1 = 100;                             // TBCCR1 PWM duty cycle = 50%
    TBCTL = TBSSEL_2 | MC_1;                  // SMCLK, up mode
    P2SEL |= BIT2;
    P2DIR |= BIT2;

    /* Based on fet430_adc12_09.c */
    P6SEL = BIT2 | BIT1 | BIT0;                         // Enable A/D channel inputs
    ADC12CTL0 = ADC12ON | MSC | SHT0_2;                 // Turn on ADC12, set sampling time
    ADC12CTL1 = SHS_3 | SHP | CONSEQ_1 | ADC12SSEL_0;   // Use sampling timer, single sequence, triggered by TB1
    ADC12MCTL0 = INCH_0;                                // ref+=AVcc, channel = A0
    ADC12MCTL1 = INCH_1;                                // ref+=AVcc, channel = A1
    ADC12MCTL2 = INCH_2 | EOS;                          // ref+=AVcc, channel = A2, end of sequence
    ADC12IE = BIT2;                                     // Enable ADC12IFG.2
    ADC12CTL0 |= ENC;                                   // Enable conversions
    _EINT();                                            // Enable interrupts

    /* Based on fet430_ta_17.c */
    P1DIR |= BIT2;                            // P1.2 output
    P1SEL |= BIT2;                            // P1.2 TA1 option
    TACCR0 = PWM_PERIOD - 1;                  // PWM Period
    TACCTL1 = OUTMOD_7;                       // TACCR1 reset/set
    TACCR1 = PWM_PERIOD/20;                   // TACCR1 PWM duty cycle
    TACTL = TASSEL_1 | MC_1;                  // ACLK, up mode

    BTCTL = BT_fLCD_DIV64 | BT_fCLK2_DIV128 | BT_fCLK2_ACLK_DIV256;
    IE2 |= BTIE;                              // Enable BT interrupt

    for (;;)
        _BIS_SR(LPM0_bits);                             // Enter LPM0
}

#pragma vector=ADC_VECTOR
__interrupt void ADC12ISR (void)
{
    ADC12IFG = 0;
    ADC12CTL0 &= ~ENC;                                  // Disable conversion
    TXBUF0 = ADC12MEM2 >> 4;                            // Move results, IFG is cleared
    ADC12CTL0 |= ENC;                                   // Re-enable conversion
}

#pragma vector=BASICTIMER_VECTOR
__interrupt void basic_timer_interrupt(void)
{
    static int up = 1;
    unsigned int i;

    /* Step the duty cycle in 5% steps, up to 90% */
    if (up)
    {
        i = TACCR1 + PWM_PERIOD/20;
        if (i >= PWM_PERIOD*9/10)
            up = 0;
    }
    else
    {
        i = TACCR1 - PWM_PERIOD/20;
        if (i <= PWM_PERIOD/20)
            up = 1;
    }
    TACCR1 = i;
}