counters.c

一个内存数据库的源代码这是服务器端还有客户端

	{ 28, 28, (str) &chr_nil, "P4_RETIRED_MISPRED_BRANCH_TYPE", 28, 0 },
	{ 29, 29, (str) &chr_nil, "P4_RETIRED_BRANCH_TYPE", 29, 0 },
	{ 30, 30, (str) &chr_nil, "P4_RESOURCE_STALL", 30, 0 },
	{ 31, 31, (str) &chr_nil, "P4_WC_BUFFER", 31, 0 },
	{ 32, 32, (str) &chr_nil, "P4_B2B_CYCLES", 32, 0 },
	{ 33, 33, (str) &chr_nil, "P4_BNR", 33, 0 },
	{ 34, 34, (str) &chr_nil, "P4_SNOOP", 34, 0 },
	{ 35, 35, (str) &chr_nil, "P4_RESPONSE", 35, 0 },
	{ 36, 36, (str) &chr_nil, "P4_FRONT_END_EVENT", 36, 0 },
	{ 37, 37, (str) &chr_nil, "P4_EXECUTION_EVENT", 37, 0 },
	{ 38, 38, (str) &chr_nil, "P4_REPLAY_EVENT", 38, 0 },
	{ 39, 39, (str) &chr_nil, "P4_INSTR_RETIRED", 39, 0 },
	{ 40, 40, (str) &chr_nil, "P4_UOPS_RETIRED", 40, 0 },
	{ 41, 41, (str) &chr_nil, "P4_UOP_TYPE", 41, 0 },
	{ 42, 42, (str) &chr_nil, "P4_BRANCH_RETIRED", 42, 0 },
	{ 43, 43, (str) &chr_nil, "P4_MISPRED_BRANCH_RETIRED", 43, 0 },
	{ 44, 44, (str) &chr_nil, "P4_X87_ASSIST", 44, 0 },
	{ 45, 45, (str) &chr_nil, "P4_MACHINE_CLEAR", 45, 0 },
	{ 46, 46, (str) &chr_nil, "P4M3_INSTR_COMPLETED", 46, 0 },
	/* customized events (inspired by pcl library code ;)
	 * (NOTE: the P4_ names are not official, but made up by me, sandor) */
	{ 47, 47, "Load/Store Instructions", "P4_LOAD_STORE", 12, 0x100 },
	{ 48, 48, "L2 Cache Miss", "P4_L2_CACHE_MISS", 8, 0x1 },
	{ 49, 49, (str) &chr_nil, (str) &chr_nil, 49, 0}
};

#if defined(HAVE_LIBPERFCTR)
static int perfctr_event_set_count( const struct perfctr_event_set * s )
{
	int cnt = 0;

	if (s->include)
		cnt = perfctr_event_set_count(s->include);
	cnt += s->nevents;
	return cnt;
}

static const struct perfctr_event * perfctr_event_set_find( const struct perfctr_event_set * s, int cnt, int nr )
{
	cnt -= s->nevents;
	if (s->include && cnt >= nr)
		return perfctr_event_set_find(s->include, cnt, nr);
	return s->events+nr;
}

enum escr_set {
	ALF_ESCR_0_1 = 0,	/* CCCR 12/13/14/15/16/17 via ESCR select 0x01 */
	BPU_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x00 */
	BSU_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x07 */
	BSU_ESCR_0,		/* CCCR 0/1 via ESCR select 0x07 */
	BSU_ESCR_1,		/* CCCR 2/3 via ESCR select 0x07 */
	CRU_ESCR_0_1,	/* CCCR 12/13/14/15/16/17 via ESCR select 0x04 */
	CRU_ESCR_2_3,	/* CCCR 12/13/14/15/16/17 via ESCR select 0x05 */
	DAC_ESCR_0_1,	/* CCCR 8/9/10/11 via ESCR select 0x05 */
	FIRM_ESCR_0_1,	/* CCCR 8/9/10/11 via ESCR select 0x01 */
	FSB_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x06 */
	FSB_ESCR_0,		/* CCCR 0/1 via ESCR select 0x06 */
	FSB_ESCR_1,		/* CCCR 2/3 via ESCR select 0x06 */
	ITLB_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x03 */
	MOB_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x02 */
	MS_ESCR_0_1,	/* CCCR 4/5/6/7 via ESCR select 0x00 */
	PMH_ESCR_0_1,	/* CCCR 0/1/2/3 via ESCR select 0x04 */
	RAT_ESCR_0_1,	/* CCCR 12/13/14/15/16/17 via ESCR select 0x02 */
	SAAT_ESCR_0_1,	/* CCCR 8/9/10/11 via ESCR select 0x02 */
	TBPU_ESCR_0_1,	/* CCCR 4/5/6/7 via ESCR select 0x02 */
	TC_ESCR_0_1,	/* CCCR 4/5/6/7 via ESCR select 0x01 */
};

int _2ESCR(int cset, int ctr /* 0/1 */) {
	(void)ctr;
	switch(cset) {
		case ALF_ESCR_0_1: return 0x01;
		case BPU_ESCR_0_1: return 0x00;
		case BSU_ESCR_0_1: return 0x07;
		case BSU_ESCR_0: return 0x07;
		case BSU_ESCR_1: return 0x07;
		case CRU_ESCR_0_1: return 0x04;
		case CRU_ESCR_2_3: return 0x05;
		case DAC_ESCR_0_1: return 0x05;
		case FIRM_ESCR_0_1: return 0x01;
		case FSB_ESCR_0_1: return 0x06; 
		case FSB_ESCR_0: return 0x06;
		case FSB_ESCR_1: return 0x06;
		case ITLB_ESCR_0_1: return 0x03;
		case MOB_ESCR_0_1: return 0x02;
		case MS_ESCR_0_1: return 0x00;
		case PMH_ESCR_0_1: return 0x04;
		case RAT_ESCR_0_1: return 0x02; 
		case SAAT_ESCR_0_1: return 0x02;
		case TBPU_ESCR_0_1: return 0x02;
		case TC_ESCR_0_1: return 0x01;
	}
	return 0;
}

int _2PMC(int cset, int ctr /* 0/1 */) {
	switch(cset) {
		case ALF_ESCR_0_1: return 12 + ctr;
		case BPU_ESCR_0_1: 
		case BSU_ESCR_0_1: return 2 + ctr;
		case BSU_ESCR_0: return 0 + ctr;
		case BSU_ESCR_1: return 2 + ctr;
		case CRU_ESCR_0_1: return 14 + ctr;
		case CRU_ESCR_2_3: return 16 + ctr;
		case DAC_ESCR_0_1: return 8 + ctr;
		case FIRM_ESCR_0_1: return 10 + ctr;
		case FSB_ESCR_0_1: return 0 + ctr; 
		case FSB_ESCR_0: return 0 + ctr;
		case FSB_ESCR_1: return 2 + ctr;
		case ITLB_ESCR_0_1: return 0 + ctr;
		case MOB_ESCR_0_1: return 2 + ctr;
		case MS_ESCR_0_1: return 4 + ctr;
		case PMH_ESCR_0_1: return 0 + ctr;
		case RAT_ESCR_0_1: return 12 + ctr; 
		case SAAT_ESCR_0_1: return 8 + ctr;
		case TBPU_ESCR_0_1: return 6 + ctr;
		case TC_ESCR_0_1: return 4 + ctr;
	}
	return 0;
}

unsigned int
do_event_number
	(unsigned int n, int ctr, struct perfctr_cpu_control *cpu_control)
{
	/* argument n indexes our local p4 table,
	 * translate to perfctr code and mask */
	int code = event[n].code ;
	int mask = event[n].mask ;
	const struct perfctr_event_set *s =
		perfctr_cpu_event_set(PERFCTR_X86_INTEL_P4M3);
	int cnt = perfctr_event_set_count(s);
	const struct perfctr_event *e = perfctr_event_set_find(s, cnt, code);
 
	if( !s || code >= cnt) {
		fprintf(stderr, "perfex: too many event specifiers\n");
		exit(1);
	}

	/* for now just 0 or 1 */
	cpu_control->evntsel[ctr] = 3 << 16 | 1 << 12 
			      | _2ESCR(e->counters_set, ctr)<<13; 
	if (mask) {
		cpu_control->p4.escr[ctr] = 1 << 2 /* count the app not the kernel */ 
			| mask << 9