atilock.c

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        }
        else
        {
            /*
             * Could not make CRTC[17] readable, so unprotect CRTC[0-7]
             * replacing VSyncEnd with zero.  This zero will be replaced after
             * acquiring the needed access.
             */
            unsigned int VSyncEnd, VBlankStart, VBlankEnd;
            CARD8 crt07, crt09;

            PutReg(CRTX(pATI->CPIO_VGABase), 0x11U, 0x20U);
            /* Make CRTC[16-17] readable */
            PutReg(CRTX(pATI->CPIO_VGABase), 0x03U, tmp | 0x80U);
            /* Make vertical synch pulse as wide as possible */
            crt07 = GetReg(CRTX(pATI->CPIO_VGABase), 0x07U);
            crt09 = GetReg(CRTX(pATI->CPIO_VGABase), 0x09U);
            VBlankStart = (((crt09 & 0x20U) << 4) | ((crt07 & 0x08U) << 5) |
                GetReg(CRTX(pATI->CPIO_VGABase), 0x15U)) + 1;
            VBlankEnd = (VBlankStart & 0x0300U) |
                GetReg(CRTX(pATI->CPIO_VGABase), 0x16U);
            if (VBlankEnd <= VBlankStart)
                VBlankEnd += 0x0100U;
            VSyncEnd = (((crt07 & 0x80U) << 2) | ((crt07 & 0x04U) << 6) |
                GetReg(CRTX(pATI->CPIO_VGABase), 0x10U)) + 0x0FU;
            if (VSyncEnd >= VBlankEnd)
                VSyncEnd = VBlankEnd - 1;
            pATI->LockData.crt11 = (VSyncEnd & 0x0FU) | 0x20U;
            PutReg(CRTX(pATI->CPIO_VGABase), 0x11U, pATI->LockData.crt11);
            pATI->LockData.crt11 |= 0x80U;
        }

        if (pATI->LCDPanelID >= 0)
        {
            /* Setup to unlock shadow registers */
            lcd_gen_ctrl |= SHADOW_RW_EN;

            if (pATI->Chip == ATI_CHIP_264LT)
                outr(LCD_GEN_CTRL, lcd_gen_ctrl);
            else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
                        (pATI->Chip == ATI_CHIP_264XL) ||
                        (pATI->Chip == ATI_CHIP_MOBILITY)) */
                ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);

            /* Unlock shadow registers */
            ATISetVGAIOBase(pATI, inb(R_GENMO));

            pATI->LockData.shadow_crt03 = tmp =
                GetReg(CRTX(pATI->CPIO_VGABase), 0x03U);
            if ((tmp & 0x80U) ||
                ((outb(CRTD(pATI->CPIO_VGABase), tmp | 0x80U),
                    tmp = inb(CRTD(pATI->CPIO_VGABase))) & 0x80U))
            {
                /* CRTC[16-17] should be readable */
                pATI->LockData.shadow_crt11 = tmp =
                    GetReg(CRTX(pATI->CPIO_VGABase), 0x11U);
                if (tmp & 0x80U)            /* Unprotect CRTC[0-7] */
                {
                    outb(CRTD(pATI->CPIO_VGABase), tmp & 0x7FU);
                }
                else if (!tmp && pATI->LockData.crt11)
                {
                    pATI->LockData.shadow_crt11 = tmp = pATI->LockData.crt11;
                    outb(CRTD(pATI->CPIO_VGABase), tmp & 0x7FU);
                }
            }
            else
            {
                /*
                 * Could not make CRTC[17] readable, so unprotect CRTC[0-7]
                 * replacing VSyncEnd with zero.  This zero will be replaced
                 * after acquiring the needed access.
                 */
                unsigned int VSyncEnd, VBlankStart, VBlankEnd;
                CARD8 crt07, crt09;

                PutReg(CRTX(pATI->CPIO_VGABase), 0x11U, 0x20U);
                /* Make CRTC[16-17] readable */
                PutReg(CRTX(pATI->CPIO_VGABase), 0x03U, tmp | 0x80U);
                /* Make vertical synch pulse as wide as possible */
                crt07 = GetReg(CRTX(pATI->CPIO_VGABase), 0x07U);
                crt09 = GetReg(CRTX(pATI->CPIO_VGABase), 0x09U);
                VBlankStart = (((crt09 & 0x20U) << 4) |
                    ((crt07 & 0x08U) << 5) |
                    GetReg(CRTX(pATI->CPIO_VGABase), 0x15U)) + 1;
                VBlankEnd = (VBlankStart & 0x0300U) |
                    GetReg(CRTX(pATI->CPIO_VGABase), 0x16U);
                if (VBlankEnd <= VBlankStart)
                    VBlankEnd += 0x0100U;
                VSyncEnd = (((crt07 & 0x80U) << 2) | ((crt07 & 0x04U) << 6) |
                    GetReg(CRTX(pATI->CPIO_VGABase), 0x10U)) + 0x0FU;
                if (VSyncEnd >= VBlankEnd)
                    VSyncEnd = VBlankEnd - 1;
                pATI->LockData.shadow_crt11 = (VSyncEnd & 0x0FU) | 0x20U;
                PutReg(CRTX(pATI->CPIO_VGABase), 0x11U,
                    pATI->LockData.shadow_crt11);
                pATI->LockData.shadow_crt11 |= 0x80U;
            }

            /* Restore selection */
            if (pATI->Chip == ATI_CHIP_264LT)
            {
                outr(LCD_GEN_CTRL, saved_lcd_gen_ctrl);
            }
            else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
                        (pATI->Chip == ATI_CHIP_264XL) ||
                        (pATI->Chip == ATI_CHIP_MOBILITY)) */
            {
                ATIMach64PutLCDReg(LCD_GEN_CNTL, saved_lcd_gen_ctrl);

                /* Restore LCD index */
                out8(LCD_INDEX, GetByte(pATI->LockData.lcd_index, 0));
            }
        }

#endif /* AVOID_CPIO */

    }
}

/*
 * ATILock --
 *
 * This function restores the state saved by ATIUnlock() above.
 */
void
ATILock
(
    ATIPtr pATI
)
{

#ifndef AVOID_CPIO

    CARD32 tmp, saved_lcd_gen_ctrl = 0, lcd_gen_ctrl = 0;

#endif /* AVOID_CPIO */

    if (!pATI->Unlocked)
        return;
    pATI->Unlocked = FALSE;

#ifndef AVOID_CPIO

    if (pATI->VGAAdapter != ATI_ADAPTER_NONE)
    {
        if (pATI->LCDPanelID >= 0)
        {
            if (pATI->Chip == ATI_CHIP_264LT)
            {
                saved_lcd_gen_ctrl = inr(LCD_GEN_CTRL);

                /* Setup to lock non-shadow registers */
                lcd_gen_ctrl = saved_lcd_gen_ctrl & ~SHADOW_RW_EN;
                outr(LCD_GEN_CTRL, lcd_gen_ctrl);
            }
            else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
                        (pATI->Chip == ATI_CHIP_264XL) ||
                        (pATI->Chip == ATI_CHIP_MOBILITY)) */
            {
                saved_lcd_gen_ctrl = ATIMach64GetLCDReg(LCD_GEN_CNTL);

                /* Setup to lock non-shadow registers */
                lcd_gen_ctrl = saved_lcd_gen_ctrl &
                    ~(CRTC_RW_SELECT | SHADOW_RW_EN);
                ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);
            }
        }

        ATISetVGAIOBase(pATI, inb(R_GENMO));

        /* Restore VGA locks */
        PutReg(CRTX(pATI->CPIO_VGABase), 0x03U, pATI->LockData.crt03);
        PutReg(CRTX(pATI->CPIO_VGABase), 0x11U, pATI->LockData.crt11);

        if (pATI->LCDPanelID >= 0)
        {
            /* Setup to lock shadow registers */
            lcd_gen_ctrl |= SHADOW_RW_EN;

            if (pATI->Chip == ATI_CHIP_264LT)
                outr(LCD_GEN_CTRL, lcd_gen_ctrl);
            else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
                        (pATI->Chip == ATI_CHIP_264XL) ||
                        (pATI->Chip == ATI_CHIP_MOBILITY)) */
                ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);

            /* Lock shadow registers */
            ATISetVGAIOBase(pATI, inb(R_GENMO));

            PutReg(CRTX(pATI->CPIO_VGABase), 0x03U,
                pATI->LockData.shadow_crt03);
            PutReg(CRTX(pATI->CPIO_VGABase), 0x11U,
                pATI->LockData.shadow_crt11);

            /* Restore selection */
            if (pATI->Chip == ATI_CHIP_264LT)
                outr(LCD_GEN_CTRL, saved_lcd_gen_ctrl);
            else /* if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
                        (pATI->Chip == ATI_CHIP_264XL) ||
                        (pATI->Chip == ATI_CHIP_MOBILITY)) */
                ATIMach64PutLCDReg(LCD_GEN_CNTL, saved_lcd_gen_ctrl);
        }

        if (pATI->CPIO_VGAWonder)
        {
            /*
             * Restore emulation and protection bits in ATI extended VGA
             * registers.
             */
            ATIModifyExtReg(pATI, 0xB1U, -1, 0xFCU, pATI->LockData.b1);
            ATIModifyExtReg(pATI, 0xB4U, -1, 0x00U, pATI->LockData.b4);
            ATIModifyExtReg(pATI, 0xB5U, -1, 0xBFU, pATI->LockData.b5);
            ATIModifyExtReg(pATI, 0xB6U, -1, 0xDDU, pATI->LockData.b6);
            ATIModifyExtReg(pATI, 0xB8U, -1, 0xC0U, pATI->LockData.b8 & 0x03U);
            ATIModifyExtReg(pATI, 0xB9U, -1, 0x7FU, pATI->LockData.b9);
            if (pATI->Chip > ATI_CHIP_18800)
            {
                ATIModifyExtReg(pATI, 0xBEU, -1, 0xFAU, pATI->LockData.be);
                if (pATI->Chip >= ATI_CHIP_28800_2)
                {
                    ATIModifyExtReg(pATI, 0xA6U, -1, 0x7FU, pATI->LockData.a6);
                    ATIModifyExtReg(pATI, 0xABU, -1, 0xE7U, pATI->LockData.ab);
                }
            }
            ATIModifyExtReg(pATI, 0xB8U, -1, 0xC0U, pATI->LockData.b8);
        }
    }

    if (pATI->ChipHasSUBSYS_CNTL)
    {
        tmp = inw(SUBSYS_STAT) & _8PLANE;

        /* Reset the 8514/A and disable all interrupts */
        outw(SUBSYS_CNTL, tmp | (GPCTRL_RESET | CHPTEST_NORMAL));
        outw(SUBSYS_CNTL, tmp | (GPCTRL_ENAB | CHPTEST_NORMAL | RVBLNKFLG |
            RPICKFLAG | RINVALIDIO | RGPIDLE));

        /* Restore modified accelerator registers */
        outw(CLOCK_SEL, pATI->LockData.clock_sel);
        if (pATI->Chip >= ATI_CHIP_68800)
        {
            outw(MISC_OPTIONS, pATI->LockData.misc_options);
            outw(MEM_BNDRY, pATI->LockData.mem_bndry);
            outw(MEM_CFG, pATI->LockData.mem_cfg);
        }

        /* Wait for all activity to die down */
        ProbeWaitIdleEmpty();
    }
    else if (pATI->Chip >= ATI_CHIP_88800GXC)

#endif /* AVOID_CPIO */

    {
        /* Reset everything */
        outr(BUS_CNTL, pATI->LockData.bus_cntl);

        outr(CRTC_INT_CNTL, pATI->LockData.crtc_int_cntl);

        outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);
        outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl);
        outr(GEN_TEST_CNTL, pATI->LockData.gen_test_cntl | GEN_GUI_EN);

        outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);
        outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl);
        outr(CRTC_GEN_CNTL, pATI->LockData.crtc_gen_cntl | CRTC_EN);

#ifndef AVOID_CPIO

        outr(CONFIG_CNTL, pATI->LockData.config_cntl);

#endif /* AVOID_CPIO */

        outr(DAC_CNTL, pATI->LockData.dac_cntl);
        if (pATI->Chip < ATI_CHIP_264CT)
            outr(MEM_CNTL, pATI->LockData.mem_cntl);
        if ((pATI->LCDPanelID >= 0) && (pATI->Chip != ATI_CHIP_264LT))
        {
            outr(LCD_INDEX, pATI->LockData.lcd_index);
#ifndef TV_OUT
            if (!pATI->OptionBIOSDisplay && (pATI->Chip != ATI_CHIP_264XL))
                outr(SCRATCH_REG3, pATI->LockData.scratch_reg3);
#endif /* TV_OUT */
        }
        if (pATI->Chip >= ATI_CHIP_264VTB)
        {
            outr(MPP_CONFIG, pATI->LockData.mpp_config);
            outr(MPP_STROBE_SEQ, pATI->LockData.mpp_strobe_seq);
#ifndef TV_OUT
            outr(TVO_CNTL, pATI->LockData.tvo_cntl);
#endif /* TV_OUT */
            if (pATI->Chip >= ATI_CHIP_264GT2C)
            {
                outr(HW_DEBUG, pATI->LockData.hw_debug);
                if (pATI->Chip >= ATI_CHIP_264GTPRO)
                {
                    outr(I2C_CNTL_0, pATI->LockData.i2c_cntl_0);
                    outr(I2C_CNTL_1, pATI->LockData.i2c_cntl_1);
                }
            }
        }
    }
}