atiregs.h

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#define CFG_INIT_CARD_ID		0x00007000ul	/* GX-C/-D */
#define CFG_BLK_WR_SIZE			0x00001000ul	/* GX-E+ */
#define CFG_INT_QSF_EN			0x00002000ul	/* GX-E+ */
/*	?				0x00004000ul */	/* GX-E+ */
/*	?				0x00007000ul */	/* CX */
#define CFG_TRI_BUF_DIS			0x00008000ul	/* GX/CX */
#define CFG_BOARD_ID			0x0000ff00ul	/* VT/GT */
#define CFG_EXT_RAM_ADDR		0x003f0000ul	/* GX/CX */
#define CFG_PANEL_ID			0x001f0000ul	/* LT */
#define CFG_MACROVISION_EN		0x00200000ul	/* GTPro */
#define CFG_ROM_DIS			0x00400000ul	/* GX/CX */
#define CFG_PCI33EN			0x00400000ul	/* GTPro */
#define CFG_VGA_EN			0x00800000ul	/* GX/CX */
#define CFG_FULLAGP			0x00800000ul	/* GTPro */
#define CFG_ARITHMOS_ENABLE		0x00800000ul	/* XC/XL */
#define CFG_LOCAL_BUS_CFG		0x01000000ul	/* GX/CX */
#define CFG_CHIP_EN			0x02000000ul	/* GX/CX */
#define CFG_LOCAL_READ_DLY_DIS		0x04000000ul	/* GX/CX */
#define CFG_ROM_OPTION			0x08000000ul	/* GX/CX */
#define CFG_BUS_OPTION			0x10000000ul	/* GX/CX */
#define CFG_LOCAL_DAC_WR_EN		0x20000000ul	/* GX/CX */
#define CFG_VLB_RDY_DIS			0x40000000ul	/* GX/CX */
#define CFG_AP_4GBYTE_DIS		0x80000000ul	/* GX/CX */
#define CONFIG_STATUS64_1	IOPortTag(0x1du, 0x3au)	/* Read */
#define CFG_PCI_DAC_CFG			0x00000001ul	/* GX/CX */
/*	?				0x0000001eul */	/* GX/CX */
#define CFG_1C8_IO_SEL			0x00000020ul	/* GX/CX */
/*	?				0xffffffc0ul */	/* GX/CX */
#define CRC_SIG				0xfffffffful	/* 264xT */
#define MPP_CONFIG		BlockIOTag(0x3bu)	/* VTB/GTB/LT */
#define MPP_PRESCALE			0x00000007ul
/*	?				0x00000008ul */
#define MPP_NSTATES			0x00000030ul
/*	?					0x00000000ul */
#define MPP_NSTATES_2				0x00000010ul
#define MPP_NSTATES_4				0x00000020ul
#define MPP_NSTATES_8				0x00000030ul
#define MPP_FORMAT			0x000000c0ul
#define MPP_FORMAT_DO8				0x00000000ul
#define MPP_FORMAT_DO16				0x00000040ul
#define MPP_FORMAT_DA8				0x00000080ul
#define MPP_FORMAT_DA16				0x000000c0ul
#define MPP_WAIT_STATE			0x00000700ul
#define MPP_CHKRDY_EN			0x00000800ul
#define MPP_INSERT_WAIT			0x00001000ul
#define MPP_TRISTATE_ADDR		0x00002000ul
/*	?				0x00004000ul */
#define MPP_READ_EARLY			0x00008000ul
#define MPP_RW_MODE			0x00030000ul
#define MPP_INT_MASK			0x000c0000ul
#define MPP_AUTO_INC_EN			0x00300000ul
#define MPP_CHKREQ_EN			0x00400000ul
#define MPP_CHKREQ_MODE			0x00800000ul
#define MPP_BUFFER_SIZE			0x03000000ul
#define MPP_BUFFER_MODE			0x0c000000ul
#define MPP_BUFFER_MODE_NORMAL			0x00000000ul
#define MPP_BUFFER_MODE_PREFETCH		0x04000000ul
#define MPP_BUFFER_MODE_BUS_MASTER		0x08000000ul
/*	?					0x0c000000ul */
/*	?				0x30000000ul */
#define MPP_BUSY			0x40000000ul
#define MPP_EN				0x80000000ul
#define MPP_STROBE_SEQ		BlockIOTag(0x3cu)	/* VTB/GTB/LT */
#define MPP_STB0_SEQ			0x000000fful
#define MPP_STB1_SEQ			0x0000ff00ul
/*	?				0xffff0000ul */
#define MPP_ADDR		BlockIOTag(0x3du)	/* VTB/GTB/LT */
#define MPP_DATA		BlockIOTag(0x3eu)	/* VTB/GTB/LT */
#define TVO_CNTL		BlockIOTag(0x3fu)	/* VTB/GTB/LT */
#define TVO_H_TOT_PIX			0x00000007ul
#define TVO_PC_OVR_DIS			0x00000008ul
#define TVO_H_TOT_EDGE			0x00000010ul
/*	?				0x00000060ul */
#define TVO_VBLANK_ONLY			0x00000080ul
/*	?				0x0000ff00ul */
#define TVO_MPEG_CLR_SRC		0x00030000ul
/*	?				0x1ffc0000ul */
#define TVO_MPEG_CLK_EN			0x20000000ul
#define TVO_OVERRIDE_EN			0x40000000ul
#define TVO_EN				0x80000000ul
/*	GP_IO			IOPortTag(0x1eu, 0x1eu) */	/* See above */
/*	CRTC_H_TOTAL_DISP	IOPortTag(0x1fu, 0x00u) */	/* Duplicate */
#define DST_OFF_PITCH		BlockIOTag(0x40u)
#define DST_OFFSET			0x000ffffful
/*	?				0x00300000ul */
#define DST_PITCH			0xffc00000ul
#define DST_X			BlockIOTag(0x41u)
#define DST_Y			BlockIOTag(0x42u)
#define DST_Y_X			BlockIOTag(0x43u)
#define DST_WIDTH		BlockIOTag(0x44u)
#define DST_HEIGHT		BlockIOTag(0x45u)
#define DST_HEIGHT_WIDTH	BlockIOTag(0x46u)
#define DST_X_WIDTH		BlockIOTag(0x47u)
#define DST_BRES_LNTH		BlockIOTag(0x48u)
#define DST_BRES_ERR		BlockIOTag(0x49u)
#define DST_BRES_INC		BlockIOTag(0x4au)
#define DST_BRES_DEC		BlockIOTag(0x4bu)
#define DST_CNTL		BlockIOTag(0x4cu)
#define DST_X_DIR			0x00000001ul
#define DST_Y_DIR			0x00000002ul
#define DST_Y_MAJOR			0x00000004ul
#define DST_X_TILE			0x00000008ul
#define DST_Y_TILE			0x00000010ul
#define DST_LAST_PEL			0x00000020ul
#define DST_POLYGON_EN			0x00000040ul
#define DST_24_ROT_EN			0x00000080ul
#define DST_24_ROT			0x00000700ul
#define DST_BRES_SIGN			0x00000800ul	/* GX/CX */
#define DST_BRES_ZERO			0x00000800ul	/* CT */
#define DST_POLYGON_RTEDGE_DIS		0x00001000ul	/* CT */
#define TRAIL_X_DIR			0x00002000ul	/* GT */
#define TRAP_FILL_DIR			0x00004000ul	/* GT */
#define TRAIL_BRES_SIGN			0x00008000ul	/* GT */
/*	?				0x00010000ul */
#define BRES_SIGN_AUTO			0x00020000ul	/* GT */
/*	?				0x00040000ul */
#define ALPHA_OVERLAP_ENB		0x00080000ul	/* GTPro */
#define SUB_PIX_ON			0x00100000ul	/* GTPro */
/*	?				0xffe00000ul */
/*	DST_Y_X			BlockIOTag(0x4du) */	/* Duplicate */
#define TRAIL_BRES_ERR		BlockIOTag(0x4eu)	/* GT */
#define TRAIL_BRES_INC		BlockIOTag(0x4fu)	/* GT */
#define TRAIL_BRES_DEC		BlockIOTag(0x50u)	/* GT */
#define LEAD_BRES_LNTH		BlockIOTag(0x51u)	/* GT */
#define Z_OFF_PITCH		BlockIOTag(0x52u)	/* GT */
#define Z_CNTL			BlockIOTag(0x53u)	/* GT */
#define ALPHA_TST_CNTL		BlockIOTag(0x54u)	/* GTPro */
/*	?			BlockIOTag(0x55u) */
#define SECONDARY_STW_EXP	BlockIOTag(0x56u)	/* GTPro */
#define SECONDARY_S_X_INC	BlockIOTag(0x57u)	/* GTPro */
#define SECONDARY_S_Y_INC	BlockIOTag(0x58u)	/* GTPro */
#define SECONDARY_S_START	BlockIOTag(0x59u)	/* GTPro */
#define SECONDARY_W_X_INC	BlockIOTag(0x5au)	/* GTPro */
#define SECONDARY_W_Y_INC	BlockIOTag(0x5bu)	/* GTPro */
#define SECONDARY_W_START	BlockIOTag(0x5cu)	/* GTPro */
#define SECONDARY_T_X_INC	BlockIOTag(0x5du)	/* GTPro */
#define SECONDARY_T_Y_INC	BlockIOTag(0x5eu)	/* GTPro */
#define SECONDARY_T_START	BlockIOTag(0x5fu)	/* GTPro */
#define SRC_OFF_PITCH		BlockIOTag(0x60u)
#define SRC_OFFSET			0x000ffffful
/*	?				0x00300000ul */
#define SRC_PITCH			0xffc00000ul
#define SRC_X			BlockIOTag(0x61u)
#define SRC_Y			BlockIOTag(0x62u)
#define SRC_Y_X			BlockIOTag(0x63u)
#define SRC_WIDTH1		BlockIOTag(0x64u)
#define SRC_HEIGHT1		BlockIOTag(0x65u)
#define SRC_HEIGHT1_WIDTH1	BlockIOTag(0x66u)
#define SRC_X_START		BlockIOTag(0x67u)
#define SRC_Y_START		BlockIOTag(0x68u)
#define SRC_Y_X_START		BlockIOTag(0x69u)
#define SRC_WIDTH2		BlockIOTag(0x6au)
#define SRC_HEIGHT2		BlockIOTag(0x6bu)
#define SRC_HEIGHT2_WIDTH2	BlockIOTag(0x6cu)
#define SRC_CNTL		BlockIOTag(0x6du)
#define SRC_PATT_EN			0x00000001ul
#define SRC_PATT_ROT_EN			0x00000002ul
#define SRC_LINEAR_EN			0x00000004ul
#define SRC_BYTE_ALIGN			0x00000008ul
#define SRC_LINE_X_DIR			0x00000010ul
#define SRC_8X8X8_BRUSH			0x00000020ul	/* VTB/GTB */
#define FAST_FILL_EN			0x00000040ul	/* VTB/GTB */
#define SRC_TRACK_DST			0x00000080ul	/* VTB/GTB */
#define BUS_MASTER_EN			0x00000100ul	/* VTB/GTB */
#define BUS_MASTER_SYNC			0x00000200ul	/* VTB/GTB */
#define BUS_MASTER_OP			0x00000c00ul	/* VTB/GTB */
#define SRC_8X8X8_BRUSH_LOADED		0x00001000ul	/* VTB/GTB */
#define COLOR_REG_WRITE_EN		0x00002000ul	/* VTB/GTB */
#define BLOCK_WRITE_EN			0x00004000ul	/* VTB/GTB */
/*	?				0xffff8000ul */
/*	?			BlockIOTag(0x6eu) */
/*	?			BlockIOTag(0x6fu) */
#define SCALE_Y_OFF		BlockIOTag(0x70u)	/* GT */
#define SCALE_OFF		BlockIOTag(0x70u)	/* GTPro */
#define SECONDARY_SCALE_OFF	BlockIOTag(0x70u)	/* GTPro */
#define TEX_0_OFF		BlockIOTag(0x70u)	/* GT */
#define TEX_1_OFF		BlockIOTag(0x71u)	/* GT */
#define TEX_2_OFF		BlockIOTag(0x72u)	/* GT */
#define TEX_3_OFF		BlockIOTag(0x73u)	/* GT */
#define TEX_4_OFF		BlockIOTag(0x74u)	/* GT */
#define TEX_5_OFF		BlockIOTag(0x75u)	/* GT */
#define TEX_6_OFF		BlockIOTag(0x76u)	/* GT */
#define SCALE_WIDTH		BlockIOTag(0x77u)	/* GT */
#define TEX_7_OFF		BlockIOTag(0x77u)	/* GT */
#define SCALE_HEIGHT		BlockIOTag(0x78u)	/* GT */
#define TEX_8_OFF		BlockIOTag(0x78u)	/* GT */
#define TEX_9_OFF		BlockIOTag(0x79u)	/* GT */
#define TEX_10_OFF		BlockIOTag(0x7au)	/* GT */
#define S_Y_INC			BlockIOTag(0x7bu)	/* GT */
#define SCALE_Y_PITCH		BlockIOTag(0x7bu)	/* GT */
#define SCALE_X_INC		BlockIOTag(0x7cu)	/* GT */
#define RED_X_INC		BlockIOTag(0x7cu)	/* GT */
#define GREEN_X_INC		BlockIOTag(0x7du)	/* GT */
#define SCALE_Y_INC		BlockIOTag(0x7du)	/* GT */
#define SCALE_VACC		BlockIOTag(0x7eu)	/* GT */
#define SCALE_3D_CNTL		BlockIOTag(0x7fu)	/* GT */
#define HOST_DATA_0		BlockIOTag(0x80u)
#define HOST_DATA_1		BlockIOTag(0x81u)
#define HOST_DATA_2		BlockIOTag(0x82u)
#define HOST_DATA_3		BlockIOTag(0x83u)
#define HOST_DATA_4		BlockIOTag(0x84u)
#define HOST_DATA_5		BlockIOTag(0x85u)
#define HOST_DATA_6		BlockIOTag(0x86u)
#define HOST_DATA_7		BlockIOTag(0x87u)
#define HOST_DATA_8		BlockIOTag(0x88u)
#define HOST_DATA_9		BlockIOTag(0x89u)
#define HOST_DATA_A		BlockIOTag(0x8au)
#define HOST_DATA_B		BlockIOTag(0x8bu)
#define HOST_DATA_C		BlockIOTag(0x8cu)
#define HOST_DATA_D		BlockIOTag(0x8du)
#define HOST_DATA_E		BlockIOTag(0x8eu)
#define HOST_DATA_F		BlockIOTag(0x8fu)
#define HOST_CNTL		BlockIOTag(0x90u)
#define HOST_BYTE_ALIGN			0x00000001ul
#define HOST_BIG_ENDIAN_EN		0x00000002ul	/* GX-E/CT */
/*	?				0xfffffffcul */
#define BM_HOSTDATA		BlockIOTag(0x91u)	/* VTB/GTB */
#define BM_ADDR			BlockIOTag(0x92u)	/* VTB/GTB */
#define BM_DATA			BlockIOTag(0x92u)	/* VTB/GTB */
#define BM_GUI_TABLE_CMD	BlockIOTag(0x93u)	/* GTPro */
/*	?			BlockIOTag(0x94u) */
/*	?			BlockIOTag(0x95u) */
/*	?			BlockIOTag(0x96u) */
/*	?			BlockIOTag(0x97u) */
/*	?			BlockIOTag(0x98u) */
/*	?			BlockIOTag(0x99u) */
/*	?			BlockIOTag(0x9au) */
/*	?			BlockIOTag(0x9bu) */
/*	?			BlockIOTag(0x9cu) */
/*	?			BlockIOTag(0x9du) */
/*	?			BlockIOTag(0x9eu) */
/*	?			BlockIOTag(0x9fu) */
#define PAT_REG0		BlockIOTag(0xa0u)
#define PAT_REG1		BlockIOTag(0xa1u)
#define PAT_CNTL		BlockIOTag(0xa2u)
#define PAT_MONO_EN			0x00000001ul
#define PAT_CLR_4x2_EN			0x00000002ul
#define PAT_CLR_8x1_EN			0x00000004ul
/*	?				0xfffffff8ul */
/*	?			BlockIOTag(0xa3u) */
/*	?			BlockIOTag(0xa4u) */
/*	?			BlockIOTag(0xa5u) */
/*	?			BlockIOTag(0xa6u) */
/*	?			BlockIOTag(0xa7u) */
#define SC_LEFT			BlockIOTag(0xa8u)
#define SC_RIGHT		BlockIOTag(0xa9u)
#define SC_LEFT_RIGHT		BlockIOTag(0xaau)
#define SC_TOP			BlockIOTag(0xabu)
#define SC_BOTTOM		BlockIOTag(0xacu)
#define SC_TOP_BOTTOM		BlockIOTag(0xadu)
#define USR1_DST_OFF_PITCH	BlockIOTag(0xaeu)	/* LTPro */
#define USR2_DST_OFF_PITCH	BlockIOTag(0xafu)	/* LTPro */
#define DP_BKGD_CLR		BlockIOTag(0xb0u)
#define DP_FRGD_CLR		BlockIOTag(0xb1u)
#define DP_WRITE_MASK		BlockIOTag(0xb2u)
#define DP_CHAIN_MASK		BlockIOTag(0xb3u)
#define DP_CHAIN_1BPP			0x00000000ul	/* Irrelevant */
#define DP_CHAIN_4BPP			0x00008888ul
#define DP_CHAIN_8BPP			0x00008080ul
#define DP_CHAIN_8BPP_332		0x00009292ul
#define DP_CHAIN_15BPP_1555		0x00004210ul
#define DP_CHAIN_16BPP_565		0x00008410ul
#define DP_CHAIN_24BPP_888		0x00008080ul
#define DP_CHAIN_32BPP_8888		0x00008080ul
/*	?				0xffff0000ul */
#define DP_PIX_WIDTH		BlockIOTag(0xb4u)
#define DP_DST_PIX_WIDTH		0x0000000ful
#define COMPOSITE_PIX_WIDTH		0x000000f0ul	/* GTPro */
#define DP_SRC_PIX_WIDTH		0x00000f00ul
/*	?				0x00001000ul */
#define DP_HOST_TRIPLE_EN		0x00002000ul	/* GT2c/VT4 */
#define DP_SRC_AUTONA_FIX_DIS		0x00004000ul	/* GTB */
#define DP_FAST_SRCCOPY_DIS		0x00008000ul	/* GTB */
#define DP_HOST_PIX_WIDTH		0x000f0000ul
#define DP_CI4_RGB_INDEX		0x00f00000ul	/* GTB */
#define DP_BYTE_PIX_ORDER		0x01000000ul
#define DP_CONVERSION_TEMP		0x02000000ul	/* GTB */
#define DP_CI4_RGB_LOW_NIBBLE		0x04000000ul	/* GTB */
#define DP_C14_RGB_HIGH_NIBBLE		0x08000000ul	/* GTB */
#define DP_SCALE_PIX_WIDTH		0xf0000000ul	/* GTB */
#define DP_MIX			BlockIOTag(0xb5u)
#define DP_BKGD_MIX			0x0000001ful
/*	?				0x0000ffe0ul */
#define DP_FRGD_MIX			0x001f0000ul
/*	?				0xffe00000ul */
#define DP_SRC			BlockIOTag(0xb6u)
#define DP_BKGD_SRC			0x00000007ul
/*	?				0x000000feul */
#define DP_FRGD_SRC			0x00000700ul
/*	?				0x0000fe00ul */
#define DP_MONO_SRC			0x00030000ul
#define DP_MONO_SRC_ALLONES			0x00000000ul
#define DP_MONO_SRC_PATTERN			0x00010000ul
#define DP_MONO_SRC_HOST			0x00020000ul
#define DP_MONO_SRC_BLIT			0x00030000ul
/*	?				0xfffc0000ul */
#define DP_FRGD_CLR_MIX		BlockIOTag(0xb7u)	/* VTB/GTB */
#define DP_FRGD_BKGD_CLR	BlockIOTag(0xb8u)	/* VTB/GTB */
/*	?			BlockIOTag(0xb9u) */
#define DST_X_Y			BlockIOTag(0xbau)	/* VTB/GTB */
#define DST_WIDTH_HEIGHT	BlockIOTag(0xbbu)	/* VTB/GTB */
#define USR_DST_PITCH		BlockIOTag(0xbcu)	/* GTPro */
/*	?			BlockIOTag(0xbdu) */
#define DP_SET_GUI_ENGINE2	BlockIOTag(0xbeu)	/* GTPro */
#define DP_SET_GUI_ENGINE	BlockIOTag(0xbfu)	/* VTB/GTB */
#define CLR_CMP_CLR		BlockIOTag(0xc0u)
#define CLR_CMP_MSK		BlockIOTag(0xc1u)
#define CLR_CMP_CNTL		BlockIOTag(0xc2u)
#define CLR_CMP_FN			0x00000007ul
#define CLR_CMP_FN_FALSE			0x00000000ul
#define CLR_CMP_FN_TRUE				0x00000001ul
/*	?					0x00000002ul */
/*	?					0x00000003ul */
#define CLR_CMP_FN_NOT_EQUAL			0x00000004ul
#define CLR_CMP_FN_EQUAL			0x00000005ul
/*	?					0x00000006ul */
/*	?					0x00000007ul */
/*	?				0x00fffff8ul */
#define CLR_CMP_SRC			0x03000000ul
#define CLR_CMP_SRC_DST				0x00000000ul
#define CLR_CMP_SRC_2D				0x01000000ul
#define CLR_CMP_SRC_TEXEL			0x02000000ul
/*	?					0x03000000ul */
/*	?				0xfc0