📄 r128_reg.h
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# define R128_GMC_AUX_CLIP_DIS (1 << 29)# define R128_GMC_WR_MSK_DIS (1 << 30)# define R128_GMC_LD_BRUSH_Y_X (1 << 31)# define R128_ROP3_ZERO 0x00000000# define R128_ROP3_DSa 0x00880000# define R128_ROP3_SDna 0x00440000# define R128_ROP3_S 0x00cc0000# define R128_ROP3_DSna 0x00220000# define R128_ROP3_D 0x00aa0000# define R128_ROP3_DSx 0x00660000# define R128_ROP3_DSo 0x00ee0000# define R128_ROP3_DSon 0x00110000# define R128_ROP3_DSxn 0x00990000# define R128_ROP3_Dn 0x00550000# define R128_ROP3_SDno 0x00dd0000# define R128_ROP3_Sn 0x00330000# define R128_ROP3_DSno 0x00bb0000# define R128_ROP3_DSan 0x00770000# define R128_ROP3_ONE 0x00ff0000# define R128_ROP3_DPa 0x00a00000# define R128_ROP3_PDna 0x00500000# define R128_ROP3_P 0x00f00000# define R128_ROP3_DPna 0x000a0000# define R128_ROP3_D 0x00aa0000# define R128_ROP3_DPx 0x005a0000# define R128_ROP3_DPo 0x00fa0000# define R128_ROP3_DPon 0x00050000# define R128_ROP3_PDxn 0x00a50000# define R128_ROP3_PDno 0x00f50000# define R128_ROP3_Pn 0x000f0000# define R128_ROP3_DPno 0x00af0000# define R128_ROP3_DPan 0x005f0000#define R128_DP_GUI_MASTER_CNTL_C 0x1c84#define R128_DP_MIX 0x16c8#define R128_DP_SRC_BKGD_CLR 0x15dc#define R128_DP_SRC_FRGD_CLR 0x15d8#define R128_DP_WRITE_MASK 0x16cc#define R128_DST_BRES_DEC 0x1630#define R128_DST_BRES_ERR 0x1628#define R128_DST_BRES_INC 0x162c#define R128_DST_BRES_LNTH 0x1634#define R128_DST_BRES_LNTH_SUB 0x1638#define R128_DST_HEIGHT 0x1410#define R128_DST_HEIGHT_WIDTH 0x143c#define R128_DST_HEIGHT_WIDTH_8 0x158c#define R128_DST_HEIGHT_WIDTH_BW 0x15b4#define R128_DST_HEIGHT_Y 0x15a0#define R128_DST_OFFSET 0x1404#define R128_DST_PITCH 0x1408#define R128_DST_PITCH_OFFSET 0x142c#define R128_DST_PITCH_OFFSET_C 0x1c80# define R128_PITCH_SHIFT 21# define R128_DST_TILE (1 << 31)#define R128_DST_WIDTH 0x140c#define R128_DST_WIDTH_HEIGHT 0x1598#define R128_DST_WIDTH_X 0x1588#define R128_DST_WIDTH_X_INCY 0x159c#define R128_DST_X 0x141c#define R128_DST_X_SUB 0x15a4#define R128_DST_X_Y 0x1594#define R128_DST_Y 0x1420#define R128_DST_Y_SUB 0x15a8#define R128_DST_Y_X 0x1438#define R128_EXT_MEM_CNTL 0x0144#define R128_FCP_CNTL 0x0012 /* PLL */#define R128_FLUSH_1 0x1704#define R128_FLUSH_2 0x1708#define R128_FLUSH_3 0x170c#define R128_FLUSH_4 0x1710#define R128_FLUSH_5 0x1714#define R128_FLUSH_6 0x1718#define R128_FLUSH_7 0x171c#define R128_FOG_3D_TABLE_START 0x1810#define R128_FOG_3D_TABLE_END 0x1814#define R128_FOG_3D_TABLE_DENSITY 0x181c#define R128_FOG_TABLE_INDEX 0x1a14#define R128_FOG_TABLE_DATA 0x1a18#define R128_FP_CRTC_H_TOTAL_DISP 0x0250#define R128_FP_CRTC_V_TOTAL_DISP 0x0254#define R128_FP_GEN_CNTL 0x0284# define R128_FP_FPON (1 << 0)# define R128_FP_BLANK_DIS (1 << 1)# define R128_FP_TDMS_EN (1 << 2)# define R128_FP_DETECT_SENSE (1 << 8)# define R128_FP_SEL_CRTC2 (1 << 13)# define R128_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)# define R128_FP_CRTC_DONT_SHADOW_HEND (1 << 17)# define R128_FP_CRTC_USE_SHADOW_VEND (1 << 18)# define R128_FP_CRTC_USE_SHADOW_ROWCUR (1 << 19)# define R128_FP_CRTC_HORZ_DIV2_EN (1 << 20)# define R128_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)# define R128_FP_CRT_SYNC_SEL (1 << 23)# define R128_FP_USE_SHADOW_EN (1 << 24)#define R128_FP_H_SYNC_STRT_WID 0x02c4#define R128_FP_HORZ_STRETCH 0x028c# define R128_HORZ_STRETCH_RATIO_MASK 0xffff# define R128_HORZ_STRETCH_RATIO_SHIFT 0# define R128_HORZ_STRETCH_RATIO_MAX 4096# define R128_HORZ_PANEL_SIZE (0xff << 16)# define R128_HORZ_PANEL_SHIFT 16# define R128_AUTO_HORZ_RATIO (0 << 24)# define R128_HORZ_STRETCH_PIXREP (0 << 25)# define R128_HORZ_STRETCH_BLEND (1 << 25)# define R128_HORZ_STRETCH_ENABLE (1 << 26)# define R128_HORZ_FP_LOOP_STRETCH (0x7 << 27)# define R128_HORZ_STRETCH_RESERVED (1 << 30)# define R128_HORZ_AUTO_RATIO_FIX_EN (1 << 31)#define R128_FP_PANEL_CNTL 0x0288# define R128_FP_DIGON (1 << 0)# define R128_FP_BLON (1 << 1)#define R128_FP_V_SYNC_STRT_WID 0x02c8#define R128_FP_VERT_STRETCH 0x0290# define R128_VERT_PANEL_SIZE (0x7ff << 0)# define R128_VERT_PANEL_SHIFT 0# define R128_VERT_STRETCH_RATIO_MASK 0x3ff# define R128_VERT_STRETCH_RATIO_SHIFT 11# define R128_VERT_STRETCH_RATIO_MAX 1024# define R128_VERT_STRETCH_ENABLE (1 << 24)# define R128_VERT_STRETCH_LINEREP (0 << 25)# define R128_VERT_STRETCH_BLEND (1 << 25)# define R128_VERT_AUTO_RATIO_EN (1 << 26)# define R128_VERT_STRETCH_RESERVED 0xf8e00000#define R128_GEN_INT_CNTL 0x0040#define R128_GEN_INT_STATUS 0x0044# define R128_VSYNC_INT_AK (1 << 2)# define R128_VSYNC_INT (1 << 2)#define R128_GEN_RESET_CNTL 0x00f0# define R128_SOFT_RESET_GUI (1 << 0)# define R128_SOFT_RESET_VCLK (1 << 8)# define R128_SOFT_RESET_PCLK (1 << 9)# define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)# define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)#define R128_GENENB 0x03c3 /* VGA */#define R128_GENFC_RD 0x03ca /* VGA */#define R128_GENFC_WT 0x03da /* VGA, 0x03ba */#define R128_GENMO_RD 0x03cc /* VGA */#define R128_GENMO_WT 0x03c2 /* VGA */#define R128_GENS0 0x03c2 /* VGA */#define R128_GENS1 0x03da /* VGA, 0x03ba */#define R128_GPIO_MONID 0x0068# define R128_GPIO_MONID_A_0 (1 << 0)# define R128_GPIO_MONID_A_1 (1 << 1)# define R128_GPIO_MONID_A_2 (1 << 2)# define R128_GPIO_MONID_A_3 (1 << 3)# define R128_GPIO_MONID_Y_0 (1 << 8)# define R128_GPIO_MONID_Y_1 (1 << 9)# define R128_GPIO_MONID_Y_2 (1 << 10)# define R128_GPIO_MONID_Y_3 (1 << 11)# define R128_GPIO_MONID_EN_0 (1 << 16)# define R128_GPIO_MONID_EN_1 (1 << 17)# define R128_GPIO_MONID_EN_2 (1 << 18)# define R128_GPIO_MONID_EN_3 (1 << 19)# define R128_GPIO_MONID_MASK_0 (1 << 24)# define R128_GPIO_MONID_MASK_1 (1 << 25)# define R128_GPIO_MONID_MASK_2 (1 << 26)# define R128_GPIO_MONID_MASK_3 (1 << 27)#define R128_GPIO_MONIDB 0x006c#define R128_GRPH8_DATA 0x03cf /* VGA */#define R128_GRPH8_IDX 0x03ce /* VGA */#define R128_GUI_DEBUG0 0x16a0#define R128_GUI_DEBUG1 0x16a4#define R128_GUI_DEBUG2 0x16a8#define R128_GUI_DEBUG3 0x16ac#define R128_GUI_DEBUG4 0x16b0#define R128_GUI_DEBUG5 0x16b4#define R128_GUI_DEBUG6 0x16b8#define R128_GUI_PROBE 0x16bc#define R128_GUI_SCRATCH_REG0 0x15e0#define R128_GUI_SCRATCH_REG1 0x15e4#define R128_GUI_SCRATCH_REG2 0x15e8#define R128_GUI_SCRATCH_REG3 0x15ec#define R128_GUI_SCRATCH_REG4 0x15f0#define R128_GUI_SCRATCH_REG5 0x15f4#define R128_GUI_STAT 0x1740# define R128_GUI_FIFOCNT_MASK 0x0fff# define R128_GUI_ACTIVE (1 << 31)#define R128_HEADER 0x0f0e /* PCI */#define R128_HOST_DATA0 0x17c0#define R128_HOST_DATA1 0x17c4#define R128_HOST_DATA2 0x17c8#define R128_HOST_DATA3 0x17cc#define R128_HOST_DATA4 0x17d0#define R128_HOST_DATA5 0x17d4#define R128_HOST_DATA6 0x17d8#define R128_HOST_DATA7 0x17dc#define R128_HOST_DATA_LAST 0x17e0#define R128_HOST_PATH_CNTL 0x0130#define R128_HTOTAL_CNTL 0x0009 /* PLL */#define R128_HTOTAL2_CNTL 0x002e /* PLL */#define R128_HW_DEBUG 0x0128#define R128_HW_DEBUG2 0x011c#define R128_I2C_CNTL_1 0x0094 /* ? */#define R128_INTERRUPT_LINE 0x0f3c /* PCI */#define R128_INTERRUPT_PIN 0x0f3d /* PCI */#define R128_IO_BASE 0x0f14 /* PCI */#define R128_LATENCY 0x0f0d /* PCI */#define R128_LEAD_BRES_DEC 0x1608#define R128_LEAD_BRES_ERR 0x1600#define R128_LEAD_BRES_INC 0x1604#define R128_LEAD_BRES_LNTH 0x161c#define R128_LEAD_BRES_LNTH_SUB 0x1624#define R128_LVDS_GEN_CNTL 0x02d0# define R128_LVDS_ON (1 << 0)# define R128_LVDS_DISPLAY_DIS (1 << 1)# define R128_LVDS_EN (1 << 7)# define R128_LVDS_DIGON (1 << 18)# define R128_LVDS_BLON (1 << 19)# define R128_LVDS_SEL_CRTC2 (1 << 23)# define R128_HSYNC_DELAY_SHIFT 28# define R128_HSYNC_DELAY_MASK (0xf << 28)#define R128_MAX_LATENCY 0x0f3f /* PCI */#define R128_MCLK_CNTL 0x000f /* PLL */# define R128_FORCE_GCP (1 << 16)# define R128_FORCE_PIPE3D_CP (1 << 17)# define R128_FORCE_RCP (1 << 18)#define R128_MDGPIO_A_REG 0x01ac#define R128_MDGPIO_EN_REG 0x01b0#define R128_MDGPIO_MASK 0x0198#define R128_MDGPIO_Y_REG 0x01b4#define R128_MEM_ADDR_CONFIG 0x0148#define R128_MEM_BASE 0x0f10 /* PCI */#define R128_MEM_CNTL 0x0140#define R128_MEM_INIT_LAT_TIMER 0x0154#define R128_MEM_INTF_CNTL 0x014c#define R128_MEM_SDRAM_MODE_REG 0x0158#define R128_MEM_STR_CNTL 0x0150#define R128_MEM_VGA_RP_SEL 0x003c#define R128_MEM_VGA_WP_SEL 0x0038#define R128_MIN_GRANT 0x0f3e /* PCI */#define R128_MM_DATA 0x0004#define R128_MM_INDEX 0x0000#define R128_MPLL_CNTL 0x000e /* PLL */#define R128_MPP_TB_CONFIG 0x01c0 /* ? */#define R128_MPP_GP_CONFIG 0x01c8 /* ? */#define R128_N_VIF_COUNT 0x0248#define R128_OVR_CLR 0x0230#define R128_OVR_WID_LEFT_RIGHT 0x0234#define R128_OVR_WID_TOP_BOTTOM 0x0238/* first overlay unit (there is only one) */#define R128_OV0_Y_X_START 0x0400#define R128_OV0_Y_X_END 0x0404#define R128_OV0_EXCLUSIVE_HORZ 0x0408# define R128_EXCL_HORZ_START_MASK 0x000000ff# define R128_EXCL_HORZ_END_MASK 0x0000ff00⌨️ 快捷键说明
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