radeon_common.h

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/* radeon_common.h -- common header definitions for Radeon 2D/3D/DRM suite
 *
 * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
 * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Author:
 *   Gareth Hughes <[e-mail]>
 *   Kevin E. Martin <[e-mail]>
 *   Keith Whitwell <[e-mail]>
 *
 * Converted to common header format:
 *   Jens Owen <[e-mail]>
 *
 * $XdotOrg: driver/xf86-video-ati/src/radeon_common.h,v 1.7 2005/09/11 08:51:38 airlied Exp $
 * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h,v 1.8tsi Exp $
 *
 */

#ifndef _RADEON_COMMON_H_
#define _RADEON_COMMON_H_

#include <inttypes.h>
#include "xf86drm.h"

/* WARNING: If you change any of these defines, make sure to change
 * the kernel include file as well (radeon_drm.h)
 */

/* Driver specific DRM command indices
 * NOTE: these are not OS specific, but they are driver specific
 */
#define DRM_RADEON_CP_INIT                0x00
#define DRM_RADEON_CP_START               0x01
#define DRM_RADEON_CP_STOP                0x02
#define DRM_RADEON_CP_RESET               0x03
#define DRM_RADEON_CP_IDLE                0x04
#define DRM_RADEON_RESET                  0x05
#define DRM_RADEON_FULLSCREEN             0x06
#define DRM_RADEON_SWAP                   0x07
#define DRM_RADEON_CLEAR                  0x08
#define DRM_RADEON_VERTEX                 0x09
#define DRM_RADEON_INDICES                0x0a
#define DRM_RADEON_STIPPLE                0x0c
#define DRM_RADEON_INDIRECT               0x0d
#define DRM_RADEON_TEXTURE                0x0e
#define DRM_RADEON_VERTEX2                0x0f
#define DRM_RADEON_CMDBUF                 0x10
#define DRM_RADEON_GETPARAM               0x11
#define DRM_RADEON_FLIP                   0x12
#define DRM_RADEON_ALLOC                  0x13
#define DRM_RADEON_FREE                   0x14
#define DRM_RADEON_INIT_HEAP              0x15
#define DRM_RADEON_IRQ_EMIT               0x16
#define DRM_RADEON_IRQ_WAIT               0x17
#define DRM_RADEON_CP_RESUME              0x18
#define DRM_RADEON_SETPARAM               0x19
#define DRM_RADEON_SURF_ALLOC             0x1a
#define DRM_RADEON_SURF_FREE              0x1b
#define DRM_RADEON_MAX_DRM_COMMAND_INDEX  0x39


#define RADEON_FRONT	0x1
#define RADEON_BACK	0x2
#define RADEON_DEPTH	0x4
#define RADEON_STENCIL	0x8

#define RADEON_CLEAR_X1        0
#define RADEON_CLEAR_Y1        1
#define RADEON_CLEAR_X2        2
#define RADEON_CLEAR_Y2        3
#define RADEON_CLEAR_DEPTH     4


typedef struct {
   enum {
      DRM_RADEON_INIT_CP    = 0x01,
      DRM_RADEON_CLEANUP_CP = 0x02,
      DRM_RADEON_INIT_R200_CP = 0x03,
      DRM_RADEON_INIT_R300_CP = 0x04
   } func;
   unsigned long sarea_priv_offset;
   int is_pci;
   int cp_mode;
   int gart_size;
   int ring_size;
   int usec_timeout;

   unsigned int fb_bpp;
   unsigned int front_offset, front_pitch;
   unsigned int back_offset, back_pitch;
   unsigned int depth_bpp;
   unsigned int depth_offset, depth_pitch;

   unsigned long fb_offset;
   unsigned long mmio_offset;
   unsigned long ring_offset;
   unsigned long ring_rptr_offset;
   unsigned long buffers_offset;
   unsigned long gart_textures_offset;
} drmRadeonInit;

typedef struct {
   int flush;
   int idle;
} drmRadeonCPStop;

typedef struct {
   int idx;
   int start;
   int end;
   int discard;
} drmRadeonIndirect;

typedef union drmRadeonClearR {
        float f[5];
        unsigned int ui[5];
} drmRadeonClearRect;

typedef struct drmRadeonClearT {
        unsigned int flags;
        unsigned int clear_color;
        unsigned int clear_depth;
        unsigned int color_mask;
        unsigned int depth_mask;   /* misnamed field:  should be stencil */
        drmRadeonClearRect *depth_boxes;
} drmRadeonClearType;

typedef struct drmRadeonFullscreenT {
        enum {
                RADEON_INIT_FULLSCREEN    = 0x01,
                RADEON_CLEANUP_FULLSCREEN = 0x02
        } func;
} drmRadeonFullscreenType;

typedef struct {
        unsigned int *mask;
} drmRadeonStipple;

typedef struct {
        unsigned int x;
        unsigned int y;
        unsigned int width;
        unsigned int height;
        const void *data;
} drmRadeonTexImage;

typedef struct {
        unsigned int offset;
        int pitch;
        int format;
        int width;                      /* Texture image coordinates */
        int height;
        drmRadeonTexImage *image;
} drmRadeonTexture;


#define RADEON_MAX_TEXTURE_UNITS 3

/* Layout matches drm_radeon_state_t in linux drm_radeon.h.
 */
typedef struct {
	struct {
		unsigned int pp_misc;				/* 0x1c14 */
		unsigned int pp_fog_color;
		unsigned int re_solid_color;
		unsigned int rb3d_blendcntl;
		unsigned int rb3d_depthoffset;
		unsigned int rb3d_depthpitch;
		unsigned int rb3d_zstencilcntl;
		unsigned int pp_cntl;				/* 0x1c38 */
		unsigned int rb3d_cntl;
		unsigned int rb3d_coloroffset;
		unsigned int re_width_height;
		unsigned int rb3d_colorpitch;
	} context;
	struct {
		unsigned int se_cntl;
	} setup1;
	struct {
		unsigned int se_coord_fmt;			/* 0x1c50 */
	} vertex;
	struct {
		unsigned int re_line_pattern;			/* 0x1cd0 */
		unsigned int re_line_state;
		unsigned int se_line_width;			/* 0x1db8 */
	} line;
	struct {
		unsigned int pp_lum_matrix;			/* 0x1d00 */
		unsigned int pp_rot_matrix_0;			/* 0x1d58 */
		unsigned int pp_rot_matrix_1;
	} bumpmap;
	struct {
		unsigned int rb3d_stencilrefmask;		/* 0x1d7c */
		unsigned int rb3d_ropcntl;
		unsigned int rb3d_planemask;
	} mask;
	struct {
		unsigned int se_vport_xscale;			/* 0x1d98 */
		unsigned int se_vport_xoffset;
		unsigned int se_vport_yscale;
		unsigned int se_vport_yoffset;
		unsigned int se_vport_zscale;
		unsigned int se_vport_zoffset;
	} viewport;
	struct {
		unsigned int se_cntl_status;			/* 0x2140 */
	} setup2;
	struct {
		unsigned int re_top_left;	/*ignored*/	/* 0x26c0 */
		unsigned int re_misc;
	} misc;
	struct {
		unsigned int pp_txfilter;
		unsigned int pp_txformat;
		unsigned int pp_txoffset;
		unsigned int pp_txcblend;
		unsigned int pp_txablend;
		unsigned int pp_tfactor;
		unsigned int pp_border_color;
	} texture[RADEON_MAX_TEXTURE_UNITS];
	struct {
		unsigned int se_zbias_factor;
		unsigned int se_zbias_constant;
	} zbias;
	unsigned int dirty;
} drmRadeonState;