📄 r128_dri.c
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case 16: depth = 0x0000ffff; break; case 24: depth = 0x00ffffff; break; case 32: depth = 0xffffffff; break; default: depth = 0x00000000; break; } /* FIXME: Copy XAAPaintWindow() and use REGION_TRANSLATE() */ /* FIXME: Only initialize the back and depth buffers for contexts that request them */ pboxSave = pbox = REGION_RECTS(prgn); nboxSave = nbox = REGION_NUM_RECTS(prgn); (*info->accel->SetupForSolidFill)(pScrn, 0, GXcopy, (CARD32)(-1)); for (; nbox; nbox--, pbox++) { (*info->accel->SubsequentSolidFillRect)(pScrn, pbox->x1 + info->fbX, pbox->y1 + info->fbY, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); (*info->accel->SubsequentSolidFillRect)(pScrn, pbox->x1 + info->backX, pbox->y1 + info->backY, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); } pbox = pboxSave; nbox = nboxSave; /* FIXME: this needs to consider depth tiling. */ (*info->accel->SetupForSolidFill)(pScrn, depth, GXcopy, (CARD32)(-1)); for (; nbox; nbox--, pbox++) (*info->accel->SubsequentSolidFillRect)(pScrn, pbox->x1 + info->depthX, pbox->y1 + info->depthY, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); info->accel->NeedToSync = TRUE;}/* Copy the back and depth buffers when the X server moves a window. */static void R128DRIMoveBuffers(WindowPtr pWin, DDXPointRec ptOldOrg, RegionPtr prgnSrc, CARD32 indx){ ScreenPtr pScreen = pWin->drawable.pScreen; ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; R128InfoPtr info = R128PTR(pScrn); /* FIXME: This routine needs to have acceleration turned on */ /* FIXME: Copy XAACopyWindow() and use REGION_TRANSLATE() */ /* FIXME: Only initialize the back and depth buffers for contexts that request them */ /* FIXME: Use accel when CCE 2D code is written */ if (info->directRenderingEnabled) return;}/* Initialize the AGP state. Request memory for use in AGP space, and initialize the Rage 128 registers to point to that memory. */static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen){ unsigned char *R128MMIO = info->MMIO; unsigned long mode; unsigned int vendor, device; int ret; unsigned long cntl, chunk; int s, l; int flags; unsigned long agpBase; if (drmAgpAcquire(info->drmFD) < 0) { xf86DrvMsg(pScreen->myNum, X_WARNING, "[agp] AGP not available\n"); return FALSE; } /* Modify the mode if the default mode is not appropriate for this particular combination of graphics card and AGP chipset. */ mode = drmAgpGetMode(info->drmFD); /* Default mode */ vendor = drmAgpVendorId(info->drmFD); device = drmAgpDeviceId(info->drmFD); mode &= ~R128_AGP_MODE_MASK; switch (info->agpMode) { case 4: mode |= R128_AGP_4X_MODE; case 2: mode |= R128_AGP_2X_MODE; case 1: default: mode |= R128_AGP_1X_MODE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", mode, vendor, device, info->PciInfo->vendor, info->PciInfo->chipType); if (drmAgpEnable(info->drmFD, mode) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n"); drmAgpRelease(info->drmFD); return FALSE; } info->agpOffset = 0; if ((ret = drmAgpAlloc(info->drmFD, info->agpSize*1024*1024, 0, NULL, &info->agpMemHandle)) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Out of memory (%d)\n", ret); drmAgpRelease(info->drmFD); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] %d kB allocated with handle 0x%08x\n", info->agpSize*1024, info->agpMemHandle); if (drmAgpBind(info->drmFD, info->agpMemHandle, info->agpOffset) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not bind\n"); drmAgpFree(info->drmFD, info->agpMemHandle); drmAgpRelease(info->drmFD); return FALSE; } /* Initialize the CCE ring buffer data */ info->ringStart = info->agpOffset; info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; info->ringReadOffset = info->ringStart + info->ringMapSize; info->ringReadMapSize = r128_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; info->bufMapSize = info->bufSize*1024*1024; /* Reserve the rest for AGP textures */ info->agpTexStart = info->bufStart + info->bufMapSize; s = (info->agpSize*1024*1024 - info->agpTexStart); l = R128MinBits((s-1) / R128_NR_TEX_REGIONS); if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; info->agpTexMapSize = (s >> l) << l; info->log2AGPTexGran = l; if (info->CCESecure) flags = DRM_READ_ONLY; else flags = 0; if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize, DRM_AGP, flags, &info->ringHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not add ring mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] ring handle = 0x%08x\n", info->ringHandle); if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize, &info->ring) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Ring mapped at 0x%08lx\n", (unsigned long)info->ring); if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize, DRM_AGP, flags, &info->ringReadPtrHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not add ring read ptr mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] ring read ptr handle = 0x%08x\n", info->ringReadPtrHandle); if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, &info->ringReadPtr) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring read ptr\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Ring read ptr mapped at 0x%08lx\n", (unsigned long)info->ringReadPtr); if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize, DRM_AGP, 0, &info->bufHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not add vertex/indirect buffers mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] vertex/indirect buffers handle = 0x%08x\n", info->bufHandle); if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize, &info->buf) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map vertex/indirect buffers\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Vertex/indirect buffers mapped at 0x%08lx\n", (unsigned long)info->buf); if (drmAddMap(info->drmFD, info->agpTexStart, info->agpTexMapSize, DRM_AGP, 0, &info->agpTexHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not add AGP texture map mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] AGP texture map handle = 0x%08x\n", info->agpTexHandle); if (drmMap(info->drmFD, info->agpTexHandle, info->agpTexMapSize, &info->agpTex) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map AGP texture map\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] AGP Texture map mapped at 0x%08lx\n", (unsigned long)info->agpTex); /* Initialize Rage 128's AGP registers */ cntl = INREG(R128_AGP_CNTL); cntl &= ~R128_AGP_APER_SIZE_MASK; switch (info->agpSize) { case 256: cntl |= R128_AGP_APER_SIZE_256MB; break; case 128: cntl |= R128_AGP_APER_SIZE_128MB; break; case 64: cntl |= R128_AGP_APER_SIZE_64MB; break; case 32: cntl |= R128_AGP_APER_SIZE_32MB; break; case 16: cntl |= R128_AGP_APER_SIZE_16MB; break; case 8: cntl |= R128_AGP_APER_SIZE_8MB; break; case 4: cntl |= R128_AGP_APER_SIZE_4MB; break; default: xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Illegal aperture size %d kB\n", info->agpSize*1024); return FALSE; } agpBase = drmAgpBase(info->drmFD); OUTREG(R128_AGP_BASE, agpBase); OUTREG(R128_AGP_CNTL, cntl); /* Disable Rage 128's PCIGART registers */ chunk = INREG(R128_BM_CHUNK_0_VAL); chunk &= ~(R128_BM_PTR_FORCE_TO_PCI | R128_BM_PM4_RD_FORCE_TO_PCI | R128_BM_GLOBAL_FORCE_TO_PCI); OUTREG(R128_BM_CHUNK_0_VAL, chunk); OUTREG(R128_PCI_GART_PAGE, 1); /* Ensure AGP GART is used (for now) */ return TRUE;}static Bool R128DRIPciInit(R128InfoPtr info, ScreenPtr pScreen){ unsigned char *R128MMIO = info->MMIO; CARD32 chunk; int ret; int flags; info->agpOffset = 0; ret = drmScatterGatherAlloc(info->drmFD, info->agpSize*1024*1024, &info->pciMemHandle); if (ret < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Out of memory (%d)\n", ret); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] %d kB allocated with handle 0x%08x\n", info->agpSize*1024, info->pciMemHandle); /* Initialize the CCE ring buffer data */ info->ringStart = info->agpOffset; info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size; info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1; info->ringReadOffset = info->ringStart + info->ringMapSize; info->ringReadMapSize = r128_drm_page_size; /* Reserve space for vertex/indirect buffers */ info->bufStart = info->ringReadOffset + info->ringReadMapSize; info->bufMapSize = info->bufSize*1024*1024; flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL; if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize, DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not add ring mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] ring handle = 0x%08x\n", info->ringHandle); if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize, &info->ring) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring mapped at 0x%08lx\n", (unsigned long)info->ring); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring contents 0x%08lx\n", *(unsigned long *)(pointer)info->ring); if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize, DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not add ring read ptr mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] ring read ptr handle = 0x%08x\n", info->ringReadPtrHandle); if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize, &info->ringReadPtr) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring read ptr\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring read ptr mapped at 0x%08lx\n", (unsigned long)info->ringReadPtr); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Ring read ptr contents 0x%08lx\n", *(unsigned long *)(pointer)info->ringReadPtr); if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize, DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not add vertex/indirect buffers mapping\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] vertex/indirect buffers handle = 0x%08x\n", info->bufHandle); if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize, &info->buf) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map vertex/indirect buffers\n"); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Vertex/indirect buffers mapped at 0x%08lx\n", (unsigned long)info->buf); xf86DrvMsg(pScreen->myNum, X_INFO, "[pci] Vertex/indirect buffers contents 0x%08lx\n", *(unsigned long *)(pointer)info->buf); switch (info->Chipset) { case PCI_CHIP_RAGE128LE: case PCI_CHIP_RAGE128RE: case PCI_CHIP_RAGE128RK: case PCI_CHIP_RAGE128PD: case PCI_CHIP_RAGE128PP: case PCI_CHIP_RAGE128PR: /* This is a PCI card, do nothing */ break; case PCI_CHIP_RAGE128LF: case PCI_CHIP_RAGE128MF: case PCI_CHIP_RAGE128ML: case PCI_CHIP_RAGE128RF: case PCI_CHIP_RAGE128RG: case PCI_CHIP_RAGE128RL: case PCI_CHIP_RAGE128SM:
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