atimach64io.h

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 */

#define ATIDRIWaitForIdle(_pATI)                                \
do {                                                            \
    ATIDRIServerInfoPtr pATIDRIServer = _pATI->pDRIServerInfo;  \
    int ret;                                                    \
                                                                \
    if (pATIDRIServer && pATI->directRenderingEnabled) {        \
        /* Wait for DMA to complete */                          \
        ret = drmCommandNone(_pATI->drmFD, DRM_MACH64_IDLE);    \
        if (ret) {                                              \
            drmCommandNone(_pATI->drmFD, DRM_MACH64_RESET);     \
        }                                                       \
                                                                \
        /* Force updating of FIFO entry counters */             \
        pATI->EngineIsBusy = TRUE;                              \
        ATIMach64PollEngineStatus(_pATI);                       \
    } else {                                                    \
        ATIMach64WaitForIdle(_pATI);                            \
    }                                                           \
} while (0)

/*
 * Set upon DRISwapContext and when DRI accesses the GPU engine
 * from within the server, see DRIInitBuffers/DRIMoveBuffers.
 *
 * Forces the EXA/XAA software paths to sync before accessing the FB memory.
 */
static __inline__ void ATIDRIMarkSyncInt(ScrnInfoPtr _pScrInfo)
{
    ATIPtr _pATI=ATIPTR(_pScrInfo);
#ifdef USE_EXA
    if (_pATI->useEXA)
        exaMarkSync(_pScrInfo->pScreen);
#endif
#ifdef USE_XAA
    if (!_pATI->useEXA)
        SET_SYNC_FLAG(_pATI->pXAAInfo); /* NeedToSync = TRUE */
#endif
}

/*
 * Set upon DRISwapContext and when the server acquires the DRI lock.
 *
 * Forces the EXA/XAA accelerated paths to sync before accessing the GPU engine.
 */
static __inline__ void ATIDRIMarkSyncExt(ScrnInfoPtr _pScrInfo)
{
    ATIPtr _pATI=ATIPTR(_pScrInfo);
    _pATI->NeedDRISync = TRUE;
}

static __inline__ void ATIDRISync(ScrnInfoPtr _pScrInfo)
{
    ATIPtr _pATI=ATIPTR(_pScrInfo);
#ifdef USE_EXA
    if (_pATI->directRenderingEnabled && _pATI->pExa)
    {
        if (_pATI->NeedDRISync) exaWaitSync(_pScrInfo->pScreen);
    }
#endif
#ifdef USE_XAA
    if (_pATI->directRenderingEnabled && _pATI->pXAAInfo)
    {
        if (_pATI->NeedDRISync) (*_pATI->pXAAInfo->Sync)(_pScrInfo);
    }
#endif
}

#define ATIDRILock(_pScrInfo)                   \
do                                              \
{                                               \
    ATIPtr _pATI=ATIPTR(_pScrInfo);             \
    if (_pATI->directRenderingEnabled)          \
    {                                           \
        DRILock(_pScrInfo->pScreen, 0);         \
        ATIDRIMarkSyncExt(_pScrInfo);           \
    }                                           \
} while (0)
                                                                                
#define ATIDRIUnlock(_pScrInfo)                 \
do                                              \
{                                               \
    ATIPtr _pATI=ATIPTR(_pScrInfo);             \
    if (_pATI->directRenderingEnabled)          \
    {                                           \
        DRIUnlock(_pScrInfo->pScreen);          \
    }                                           \
} while (0)

#else /* XF86DRI_DEVEL */

                                                                                               
#define ATIDRIWaitForIdle(_pATI)
#define ATIDRILock(_pScrInfo)
#define ATIDRIUnlock(_pScrInfo)
#define ATIDRISync(_pScrInfo)
                                                                                               
#endif /* XF86DRI_DEVEL */


/*
 * An outf() variant to write two registers such that the second register is
 * is always written whenever either is to be changed.
 */
#define outq(_Register1, _Register2, _Value1, _Value2)                  \
    do                                                                  \
    {                                                                   \
        CARD32 _IOValue1 = (_Value1),                                   \
               _IOValue2 = (_Value2);                                   \
                                                                        \
        if (!RegisterIsCached(_Register1) ||                            \
            (_IOValue1 != CacheSlot(_Register1)))                       \
        {                                                               \
            ATIMach64WaitForFIFO(pATI, 2);                              \
            pATI->nAvailableFIFOEntries -= 2;                           \
            MMIO_OUT32(pATI->pBlock[GetBits(_Register1, BLOCK_SELECT)], \
                       (_Register1) & MM_IO_SELECT, _IOValue1);         \
            MMIO_OUT32(pATI->pBlock[GetBits(_Register2, BLOCK_SELECT)], \
                       (_Register2) & MM_IO_SELECT, _IOValue2);         \
            CacheSlot(_Register1) = _IOValue1;                          \
            CacheSlot(_Register2) = _IOValue2;                          \
            pATI->EngineIsBusy = TRUE;                                  \
        }                                                               \
        else if (!RegisterIsCached(_Register2) ||                       \
                 (_IOValue2 != CacheSlot(_Register2)))                  \
        {                                                               \
            while (!pATI->nAvailableFIFOEntries--)                      \
                ATIMach64PollEngineStatus(pATI);                        \
            MMIO_OUT32(pATI->pBlock[GetBits(_Register2, BLOCK_SELECT)], \
                       (_Register2) & MM_IO_SELECT, _IOValue2);         \
            CacheSlot(_Register2) = _IOValue2;                          \
            pATI->EngineIsBusy = TRUE;                                  \
        }                                                               \
    } while (0)

extern void ATIMach64AccessPLLReg(ATIPtr, const CARD8, const Bool);

#define ATIMach64GetPLLReg(_Index)                  \
    (                                               \
        ATIMach64AccessPLLReg(pATI, _Index, FALSE), \
        in8(CLOCK_CNTL + 2)                         \
    )
#define ATIMach64PutPLLReg(_Index, _Value)          \
    do                                              \
    {                                               \
        ATIMach64AccessPLLReg(pATI, _Index, TRUE);  \
        out8(CLOCK_CNTL + 2, _Value);               \
    } while (0)

#define ATIMach64GetLCDReg(_Index)                       \
    (                                                    \
        out8(LCD_INDEX, SetBits(_Index, LCD_REG_INDEX)), \
        inr(LCD_DATA)                                    \
    )
#define ATIMach64PutLCDReg(_Index, _Value)               \
    do                                                   \
    {                                                    \
        out8(LCD_INDEX, SetBits(_Index, LCD_REG_INDEX)); \
        outr(LCD_DATA, _Value);                          \
    } while (0)

#define ATIMach64GetTVReg(_Index)                          \
    (                                                      \
        out8(TV_OUT_INDEX, SetBits(_Index, TV_REG_INDEX)), \
        inr(TV_OUT_DATA)                                   \
    )
#define ATIMach64PutTVReg(_Index, _Value)                  \
    do                                                     \
    {                                                      \
        out8(TV_OUT_INDEX, SetBits(_Index, TV_REG_INDEX)); \
        outr(TV_OUT_DATA, _Value);                         \
    } while (0)

/*
 * Block transfer definitions.
 */

#if defined(GCCUSESGAS) && \
    (defined(i386) || defined(__i386) || defined(__i386__))

#define ATIMove32(_pDst, _pSrc, _nCount) \
    do                                   \
    {                                    \
        long d0, d1, d2;                 \
        __asm__ __volatile__             \
        (                                \
            "cld\n\t"                    \
            "rep ; movsl"                \
            : "=&c" (d0),                \
              "=&D" (d1),                \
              "=&S" (d2)                 \
            : "0" (_nCount),             \
              "1" (_pDst),               \
              "2" (_pSrc)                \
            : "memory"                   \
        );                               \
    } while (0)

#endif

/*
 * Return the MMIO address of register, used for HOST_DATA_X only.
 */
#define ATIHostDataAddr(_Register)                             \
    ((CARD8 *)pATI->pBlock[GetBits(_Register, BLOCK_SELECT)] + \
              ((_Register) & MM_IO_SELECT))

#endif /* ___ATIMACH64IO_H___ */