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📁 在ise下设计的蝶形变换程序
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(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2004 1 22 21 34 13)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 8.1i"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2005 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_has_bypass_with_cin = false ")
       (comment "c_a_type = 1 ")
       (comment "c_has_sclr = false ")
       (comment "c_sync_priority = 1 ")
       (comment "c_has_aset = false ")
       (comment "c_has_b_out = false ")
       (comment "c_has_s = true ")
       (comment "c_has_q = false ")
       (comment "InstanceName = jianjian ")
       (comment "c_family = spartan3 ")
       (comment "c_bypass_enable = false ")
       (comment "c_b_constant = false ")
       (comment "c_has_ovfl = false ")
       (comment "c_high_bit = 9 ")
       (comment "c_latency = 0 ")
       (comment "c_sinit_val = 0 ")
       (comment "c_has_bypass = false ")
       (comment "c_pipe_stages = 1 ")
       (comment "c_has_sset = false ")
       (comment "c_has_ainit = false ")
       (comment "c_has_a_signed = false ")
       (comment "c_has_q_c_out = false ")
       (comment "c_b_type = 1 ")
       (comment "c_has_add = false ")
       (comment "c_has_sinit = false ")
       (comment "c_has_b_in = true ")
       (comment "c_has_b_signed = false ")
       (comment "c_bypass_low = false ")
       (comment "c_enable_rlocs = true ")
       (comment "c_b_value = 0 ")
       (comment "c_add_mode = 1 ")
       (comment "c_has_aclr = false ")
       (comment "c_out_width = 10 ")
       (comment "c_ainit_val = 0000 ")
       (comment "c_low_bit = 0 ")
       (comment "c_has_q_ovfl = false ")
       (comment "c_has_q_b_out = false ")
       (comment "c_has_c_out = false ")
       (comment "c_b_width = 10 ")
       (comment "c_a_width = 10 ")
       (comment "c_sync_enable = 0 ")
       (comment "c_has_ce = false ")
       (comment "c_has_c_in = false ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell LUT4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I0 (direction INPUT))
                   (port I1 (direction INPUT))
                   (port I2 (direction INPUT))
                   (port I3 (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell jianjian
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( array ( rename A "A<9:0>") 10 ) (direction INPUT))
   (port ( array ( rename B "B<9:0>") 10 ) (direction INPUT))
   (port ( rename B_IN "B_IN") (direction INPUT))
   (port ( array ( rename S "S<9:0>") 10 ) (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance BU3
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
      (property INIT (string "9999"))
   )
   (instance BU4
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
   )
   (instance BU5
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
   )
   (instance BU7
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
      (property INIT (string "9999"))
   )
   (instance BU8
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
   )
   (instance BU9
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
   )
   (instance BU11
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
      (property INIT (string "9999"))
   )
   (instance BU12
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
   )
   (instance BU13
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
   )
   (instance BU15
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
      (property INIT (string "9999"))
   )
   (instance BU16
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
   )
   (instance BU17
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
   )
   (instance BU19
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
      (property INIT (string "9999"))
   )
   (instance BU20
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
   )
   (instance BU21
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
   )
   (instance BU23
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
      (property INIT (string "9999"))
   )
   (instance BU24
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
   )
   (instance BU25
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
   )
   (instance BU27
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
      (property INIT (string "9999"))
   )
   (instance BU28
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU29
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU31
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
      (property INIT (string "9999"))
   )
   (instance BU32
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU33
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU35
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
      (property INIT (string "9999"))
   )
   (instance BU36
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU37
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU39
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
      (property INIT (string "9999"))
   )
   (instance BU40
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (net N0
    (joined
      (portRef G (instanceRef GND))
      (portRef I2 (instanceRef BU3))
      (portRef I3 (instanceRef BU3))
      (portRef I2 (instanceRef BU7))
      (portRef I3 (instanceRef BU7))
      (portRef I2 (instanceRef BU11))
      (portRef I3 (instanceRef BU11))
      (portRef I2 (instanceRef BU15))
      (portRef I3 (instanceRef BU15))
      (portRef I2 (instanceRef BU19))
      (portRef I3 (instanceRef BU19))
      (portRef I2 (instanceRef BU23))
      (portRef I3 (instanceRef BU23))
      (portRef I2 (instanceRef BU27))
      (portRef I3 (instanceRef BU27))
      (portRef I2 (instanceRef BU31))
      (portRef I3 (instanceRef BU31))
      (portRef I2 (instanceRef BU35))
      (portRef I3 (instanceRef BU35))
      (portRef I2 (instanceRef BU39))
      (portRef I3 (instanceRef BU39))
    )
   )
   (net N2
    (joined
      (portRef S (instanceRef BU4))
      (portRef LI (instanceRef BU5))
      (portRef O (instanceRef BU3))
    )
   )
   (net N5
    (joined
      (portRef O (instanceRef BU4))
      (portRef CI (instanceRef BU8))
      (portRef CI (instanceRef BU9))
    )
   )
   (net N7
    (joined
      (portRef S (instanceRef BU8))
      (portRef LI (instanceRef BU9))
      (portRef O (instanceRef BU7))
    )
   )
   (net N10
    (joined

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