📄 fchev_can.lst
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C:\TIC2XX_98\C2000\CGTOOLS\BIN\DSPA.EXE fchev_can.asm fchev_can.obj -ls -v2xx -iD:\FCHEV\inlcude
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
fchev_can.asm PAGE 1
1 *******************************************************
2 * TMS320C2x/C2xx/C5x ANSI C Codegen Version 7.00
3 *******************************************************
4 ; C:\TIC2XX_98\C2000\CGTOOLS\BIN\DSPAC.EXE -v2xx -iD:\FCHEV\inlcude fchev_can.c C:\WINDOWS\TEMP\fchev_can.
5 ; dspopt NOT RUN
6 ; C:\TIC2XX_98\C2000\CGTOOLS\BIN\DSPCG.EXE -o -v2xx -o C:\WINDOWS\TEMP\fchev_can.if C:\WINDOWS\TEMP\fchev_
7 .port
8 0000 .bss _mbx2_a,1,1
9 0001 .bss _mbx2_b,1
10 0002 .bss _mbx2_c,1
11 0003 .bss _mbx2_d,1
12 0004 .bss _LED6_counter,1
13 0005 .bss _LED7_counter,1
14 0006 .bss _LED8_counter,1
15 0007 .bss _LED_STATE,1
16 0008 .bss _temp_RCR,1
17 0009 .bss _temp_TCR,1
18 000a .bss _Ib,1
19 000b .bss _If,1
20 000c .bss _Ubus,1
21 000d .bss _temp,1
22 000e .bss _end_ad,1
23 000f .bss _channel_0,1
24 0010 .bss _channel_1,1
25 0011 .bss _channel_2,1
26 0012 .bss _channel_3,1
27 0013 .bss _tx_cnt,1
28 0014 .bss _P_FC_ref,1
29 0015 .bss _CAN_TFLAG,1
30 .file "fchev_can.c"
31 .file "D:\FCHEV\inlcude\f2407regs.h"
32 .globl _portFF0F
33 .globl _portFFFF
34 .file "fchev_can.c"
35 .globl _port0000
36 .globl _port0001
37 .globl _port0002
38 .globl _port0003
39 .globl _port0004
40 .globl _port0008
41 .globl _port0009
42
43 0000 .sect ".cinit"
44 0000 0001 .word 1,_mbx2_a
0001 0000-
45 0002 fffe .word -2
46
47 .sym _mbx2_a,_mbx2_a,4,2,16
48 .globl _mbx2_a
49 0003 0001 .word 1,_mbx2_b
0004 0001-
50 0005 ffff .word -1
51
52 .sym _mbx2_b,_mbx2_b,4,2,16
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
fchev_can.asm PAGE 2
53 .globl _mbx2_b
54 0006 0001 .word 1,_mbx2_c
0007 0002-
55 0008 ffff .word -1
56
57 .sym _mbx2_c,_mbx2_c,4,2,16
58 .globl _mbx2_c
59 0009 0001 .word 1,_mbx2_d
000a 0003-
60 000b ffff .word -1
61
62 .sym _mbx2_d,_mbx2_d,4,2,16
63 .globl _mbx2_d
64 .globl _CAN_TFLAG
65 000c 0001 .word 1,_LED6_counter
000d 0004-
66 000e 0000 .word 0
67
68 .sym _LED6_counter,_LED6_counter,4,2,16
69 .globl _LED6_counter
70 000f 0001 .word 1,_LED7_counter
0010 0005-
71 0011 0000 .word 0
72
73 .sym _LED7_counter,_LED7_counter,4,2,16
74 .globl _LED7_counter
75 0012 0001 .word 1,_LED8_counter
0013 0006-
76 0014 0000 .word 0
77
78 .sym _LED8_counter,_LED8_counter,4,2,16
79 .globl _LED8_counter
80 0015 0001 .word 1,_LED_STATE
0016 0007-
81 0017 000f .word 15
82
83 .sym _LED_STATE,_LED_STATE,4,2,16
84 .globl _LED_STATE
85 0018 0001 .word 1,_temp_RCR
0019 0008-
86 001a ffff .word -1
87
88 .sym _temp_RCR,_temp_RCR,4,2,16
89 .globl _temp_RCR
90 001b 0001 .word 1,_temp_TCR
001c 0009-
91 001d ffff .word -1
92
93 .sym _temp_TCR,_temp_TCR,4,2,16
94 .globl _temp_TCR
95 001e 0001 .word 1,_Ib
001f 000a-
96 0020 ffff .word -1
97
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
fchev_can.asm PAGE 3
98 .sym _Ib,_Ib,4,2,16
99 .globl _Ib
100 0021 0001 .word 1,_If
0022 000b-
101 0023 ffff .word -1
102
103 .sym _If,_If,4,2,16
104 .globl _If
105 0024 0001 .word 1,_Ubus
0025 000c-
106 0026 ffff .word -1
107
108 .sym _Ubus,_Ubus,4,2,16
109 .globl _Ubus
110 0027 0001 .word 1,_temp
0028 000d-
111 0029 ffff .word -1
112
113 .sym _temp,_temp,4,2,16
114 .globl _temp
115 002a 0001 .word 1,_end_ad
002b 000e-
116 002c ffff .word -1
117
118 .sym _end_ad,_end_ad,4,2,16
119 .globl _end_ad
120 002d 0001 .word 1,_channel_0
002e 000f-
121 002f ffff .word -1
122
123 .sym _channel_0,_channel_0,4,2,16
124 .globl _channel_0
125 0030 0001 .word 1,_channel_1
0031 0010-
126 0032 ffff .word -1
127
128 .sym _channel_1,_channel_1,4,2,16
129 .globl _channel_1
130 0033 0001 .word 1,_channel_2
0034 0011-
131 0035 ffff .word -1
132
133 .sym _channel_2,_channel_2,4,2,16
134 .globl _channel_2
135 0036 0001 .word 1,_channel_3
0037 0012-
136 0038 ffff .word -1
137
138 .sym _channel_3,_channel_3,4,2,16
139 .globl _channel_3
140 0039 0001 .word 1,_tx_cnt
003a 0013-
141 003b 0000 .word 0
142
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
fchev_can.asm PAGE 4
143 .sym _tx_cnt,_tx_cnt,4,2,16
144 .globl _tx_cnt
145 .globl _sci_init
146 003c 0001 .word 1,_P_FC_ref
003d 0014-
147 003e 000f .word 15
148
149 .sym _P_FC_ref,_P_FC_ref,4,2,16
150 .globl _P_FC_ref
151 0000 .text
152
153 .sym _main,_main,36,2,0
154 .globl _main
155
156 .func 62
157 ;>>>> main()
158 ******************************************************
159 * FUNCTION DEF : _main
160 ******************************************************
161 0000 _main:
162 0000 8aa0 POPD *+
163 0001 80a0 SAR AR0,*+
164 0002 8180 SAR AR1,*
165 0003 b001 LARK AR0,1
166 0004 00e0 LAR AR0,*0+
167
168 .line 5
169 ;>>>> asm(" SETC INTM");
170 0005 be41 SETC INTM
171 .line 6
172 ;>>>> asm(" CLRC SXM");
173 0006 be46 CLRC SXM
174 .line 7
175 ;>>>> asm(" CLRC OVM");
176 0007 be42 CLRC OVM
177 .line 8
178 ;>>>> asm(" CLRC CNF");
179 0008 be44 CLRC CNF
180 .line 9
181 ;>>>> asm(" nop");
182 0009 8b00 nop
183 .line 10
184 ;>>>> asm(" nop");
185 000a 8b00 nop
186 .line 11
187 ;>>>> asm(" nop");
188 000b 8b00 nop
189 .line 13
190 ;>>>> *SCSR1 = 0x00FD;
191 000c bf0b LARK AR3,28696
000d 7018
192 000e b9fd LACK 253
193 000f 8b8b MAR * ,AR3
194 0010 90a0 SACL *+
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
fchev_can.asm PAGE 5
195 .line 28
196 ;>>>> *SCSR2 = (*SCSR2 | 0x000B) & 0x000F;
197 0011 b90b LACK 11
198 0012 6d80 OR *
199 0013 bfb0 ANDK 15
0014 000f
200 0015 9080 SACL *
201 .line 39
202 ;>>>> *WDCR = 0x00E8;
203 0016 b9e8 LACK 232
204 0017 7810 ADRK 16
205 0018 9088 SACL * ,AR0
206 .line 48
207 ;>>>> WSGR = 0x0000;
208 0019 b900 LACK 0
209 001a 9080 SACL *
210 001b 0c80 OUT * ,0ffffh
001c ffff
211 .line 49
212 ;>>>> asm(" NOP");
213 001d 8b00 NOP
214 .line 50
215 ;>>>> WSGR = 0x0040;
216 001e b940 LACK 64
217 001f 9080 SACL *
218 0020 0c8b OUT * ,0ffffh,AR3
0021 ffff
219 .line 59
220 ;>>>> *MCRA = 0x0000; /* group A pins */
221 0022 b900 LACK 0
222 0023 7867 ADRK 103
223 0024 9080 SACL *
224 .line 77
225 ;>>>> *MCRB = 0xFEC0; /* group B pins */
226 0025 7802 ADRK 2
227 0026 ae80 SPLK #65216,*
0027 fec0
228 .line 95
229 ;>>>> *MCRC = 0x0000; /* group C pins */
230 0028 7802 ADRK 2
231 0029 908c SACL * ,AR4
232 .line 118
233 ;>>>> *T1CON = 0x0000; /* disable timer 1 */
234 002a bf0c LARK AR4,29700
002b 7404
235 002c 9080 SACL *
236 .line 119
237 ;>>>> *T2CON = 0x0000; /* disable timer 2 */
238 002d 7804 ADRK 4
239 002e 9080 SACL *
240 .line 120
241 ;>>>> *GPTCONA = 0x0000; /* configure GPTCONA */
242 002f 7c08 SBRK 8
243 0030 9080 SACL *
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Mon Jun 2 15:03:33 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
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