periph.c

fx2 gpif sigleread 方式可手动修正数据方式传送固件

#pragma NOIV               // Do not generate interrupt vectors
//-----------------------------------------------------------------------------
//   File:      periph.c
//   Contents:   Hooks required to implement USB peripheral function.
//
//   Copyright (c) 1997 AnchorChips, Inc. All rights reserved
//-----------------------------------------------------------------------------
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" 

extern BOOL   GotSUD;         // Received setup data flag
extern BOOL   Sleep;
extern BOOL   Rwuen;
extern BOOL   Selfpwr;

BYTE   Configuration;      // Current configuration
BYTE   AlternateSetting;   // Alternate settings
int myi;
BYTE xdata myBuffer[64];
WORD myBufferCount;
DWORD   mynumber=0;
DWORD   count=0;
sbit PA0=IOA^0;
#define GPIFTRIGRD 4
#define GPIF_EP6 2
BOOL in_enable = FALSE;         // flag to enable IN transfers
//-----------------------------------------------------------------------------
// Task Dispatcher hooks
//   The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------
void GpifInit( void );

void GPIF_SingleWordRead( WORD xdata *gdata )
{
  static BYTE g_data = 0x00;     // dummy variable

  while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
  {
     ;
  }

  // using register in XDATA space
  g_data = XGPIFSGLDATLX;        // dummy read to trigger GPIF 
                                 // Single Word Read transaction

  while( !( GPIFTRIG & 0x80 ) )  // poll GPIFTRIG.7 Done bit
  {
     ;
  }

  // using register(s) in XDATA space, retrieve word just read from ext. FIFO
  *gdata = ( ( WORD )XGPIFSGLDATLNOX << 8 ) | ( WORD )XGPIFSGLDATH;
}




void TD_Init(void)             // Called once at startup
{  int i;

CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
  SYNCDELAY;
  
  EP2CFG = 0xA0;     // EP2OUT, bulk, size 512, 4x buffered
  SYNCDELAY;                    
  EP4CFG = 0x00;     // EP4 not valid
  SYNCDELAY;                    
  EP6CFG = 0xE0;     // EP6IN, bulk, size 512, 4x buffered
  SYNCDELAY;                    
  EP8CFG = 0x00;     // EP8 not valid
  SYNCDELAY;
  
  EP2FIFOCFG = 0x01; // manual mode, disable PKTEND zero length send, word ops
  SYNCDELAY;
  EP6FIFOCFG = 0x01; // manual mode, disable PKTEND zero length send, word ops
  SYNCDELAY;

  FIFORESET = 0x80;  // set NAKALL bit to NAK all transfers from host
  SYNCDELAY;
  FIFORESET = 0x02;  // reset EP2 FIFO
  SYNCDELAY;
  FIFORESET = 0x06;  // reset EP6 FIFO
  SYNCDELAY;
  FIFORESET = 0x00;  // clear NAKALL bit to resume normal operation
  SYNCDELAY;

  // out endpoints do not come up armed
  // since EP2OUT is quad buffered we must write dummy byte counts four times
                  
  EP2BCL = 0x80;     // arm EP2OUT by writing byte count w/skip.
  SYNCDELAY;                    
  EP2BCL = 0x80;
  SYNCDELAY;                    
  EP2BCL = 0x80;
  SYNCDELAY;
  EP2BCL = 0x80;
  SYNCDELAY;

  GpifInit (); // initialize GPIF registers


               
 
   SCON0 = 0x50;
   SYNCDELAY;
   UART230|=0x01;




//   BREAKPT &= ~bmBPEN;      // to see BKPT LED go out TGE
 //  Rwuen = TRUE;            // Enable remote-wakeup
}
////////////////////////////////////////////////

void uart_put_char(unsigned char ch)
	{
	   SBUF0 = ch;
       while(TI == 0);
	   TI = 0;
	}
							 
unsigned char uart_get_char(void)
	{
	   while(RI == 0);
	   RI = 0;
	   return SBUF0;					  	
	}
/////////////////////////////////////////////////////////////



void TD_Poll(void)             // Called repeatedly while the device is idle
{
 int a;
  WORD xdata  i;            // loop index
  WORD xdata  *Source;      // ptr to source buffer
  WORD xdata  *Destination; // ptr to destination buffer
  WORD xdata  Tcount=32;       // transaction counter

 a=uart_get_char();
   for (i=0;i<64;i++)
  uart_put_char(a);
 IOA=~IOA;
 	 count++; 


if(in_enable) // if IN transfers are enabled,
 {
    if(!(EP2468STAT & bmEP6FULL))
    {
      // if EP6IN is not full AND there is data in the external FIFO,

      Destination = (WORD *)(&EP6FIFOBUF);
      for( i = 0x0000; i < Tcount; i++ )
      {
        // transfer data from external FIFO to EP6IN buffer
        GPIF_SingleWordRead (Destination);
        Destination++;
      }
	  Tcount *= 2;          // multiply by 2 to obtain byte count value    
      EP6BCH = MSB(Tcount);  
      SYNCDELAY;  
      EP6BCL = LSB(Tcount); // arm EP6IN to send data to the host
      SYNCDELAY;                    
    }
  }

 
 
   
	  

} 


BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
{
   return(TRUE);
}

BOOL TD_Resume(void)          // Called after the device resumes
{
   return(TRUE);
}

//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{
   return(TRUE);
}

BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
{
   Configuration = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
{
   EP0BUF[0] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
{
   AlternateSetting = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
{
   EP0BUF[0] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_GetStatus(void)
{
   return(TRUE);
}

BOOL DR_ClearFeature(void)
{
   return(TRUE);
}

BOOL DR_SetFeature(void)
{
   return(TRUE);
}

#define VX_B2 0xB2
BOOL DR_VendorCmnd(void)
{
  switch (SETUPDAT[1])
  {


    case VX_B2:
    { 
     in_enable = 1; 
   //   EZUSB_Delay (1000); // keep PA2 low for ~1ms, more than enough time   
//	  PA1=~PA1;
     
     EP0BUF[0]=0xb2;
	 EP0BUF[1]=IOD;
	  EP0BCH = 0;
	  EP0BCL = 2;                   // Arm endpoint with # bytes to transfer
	  EP0CS |= bmHSNAK;             // Acknowledge handshake phase of device request
//	  	EZUSB_Delay(1000);
	//				EZUSB_Discon(TRUE);	
      break;
    }
	 case 0xB3:
    { 
      in_enable = FALSE; 
   
     
     EP0BUF[0]=0xb3;
	  EP0BCH = 0;
	  EP0BCL = 1;                   // Arm endpoint with # bytes to transfer
	  EP0CS |= bmHSNAK;             // Acknowledge handshake phase of device request
//	  	EZUSB_Delay(1000);
	//				EZUSB_Discon(TRUE);	
      break;
    }
    default:
        return(TRUE);
  }

   
    return(FALSE);
}

//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------

// Setup Data Available Interrupt Handler
void ISR_Sudav(void) interrupt 0
{
   GotSUD = TRUE;            // Set flag
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUDAV;         // Clear SUDAV IRQ
}

// Setup Token Interrupt Handler
void ISR_Sutok(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUTOK;         // Clear SUTOK IRQ
}

void ISR_Sof(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSOF;            // Clear SOF IRQ
}

void ISR_Ures(void) interrupt 0
{
   // whenever we get a USB reset, we should revert to full speed mode
   pConfigDscr = pFullSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
   pOtherConfigDscr = pHighSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmURES;         // Clear URES IRQ
}

void ISR_Susp(void) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUSP;
}

void ISR_Highspeed(void) interrupt 0
{
   if (EZUSB_HIGHSPEED())
   {
      pConfigDscr = pHighSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
      pOtherConfigDscr = pFullSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   }

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmHSGRANT;
}
void ISR_Ep0ack(void) interrupt 0
{
}
void ISR_Stub(void) interrupt 0
{
}
void ISR_Ep0in(void) interrupt 0
{
}
void ISR_Ep0out(void) interrupt 0
{
}
void ISR_Ep1in(void) interrupt 0
{
}
void ISR_Ep1out(void) interrupt 0
{
}
void ISR_Ep2inout(void) interrupt 0
{
}
void ISR_Ep4inout(void) interrupt 0
{
}
void ISR_Ep6inout(void) interrupt 0
{
}
void ISR_Ep8inout(void) interrupt 0
{
}
void ISR_Ibn(void) interrupt 0
{
}
void ISR_Ep0pingnak(void) interrupt 0
{
}
void ISR_Ep1pingnak(void) interrupt 0
{
}
void ISR_Ep2pingnak(void) interrupt 0
{
}
void ISR_Ep4pingnak(void) interrupt 0
{
}
void ISR_Ep6pingnak(void) interrupt 0
{
}
void ISR_Ep8pingnak(void) interrupt 0
{
}
void ISR_Errorlimit(void) interrupt 0
{
}
void ISR_Ep2piderror(void) interrupt 0
{
}
void ISR_Ep4piderror(void) interrupt 0
{
}
void ISR_Ep6piderror(void) interrupt 0
{
}
void ISR_Ep8piderror(void) interrupt 0
{
}
void ISR_Ep2pflag(void) interrupt 0
{
}
void ISR_Ep4pflag(void) interrupt 0
{
}
void ISR_Ep6pflag(void) interrupt 0
{
}
void ISR_Ep8pflag(void) interrupt 0
{
}
void ISR_Ep2eflag(void) interrupt 0
{
}
void ISR_Ep4eflag(void) interrupt 0
{
}
void ISR_Ep6eflag(void) interrupt 0
{
}
void ISR_Ep8eflag(void) interrupt 0
{
}
void ISR_Ep2fflag(void) interrupt 0
{
}
void ISR_Ep4fflag(void) interrupt 0
{
}
void ISR_Ep6fflag(void) interrupt 0
{
}
void ISR_Ep8fflag(void) interrupt 0
{
}
void ISR_GpifComplete(void) interrupt 0
{
}
void ISR_GpifWaveform(void) interrupt 0
{
}