periph.c

fx2 gpifFIFOREAD方式实现高速数据传输数据固件

#pragma NOIV               // Do not generate interrupt vectors
//-----------------------------------------------------------------------------
//   File:      periph.c
//   Contents:   Hooks required to implement USB peripheral function.
//
//   Copyright (c) 1997 AnchorChips, Inc. All rights reserved
//-----------------------------------------------------------------------------
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" 

extern BOOL   GotSUD;         // Received setup data flag
extern BOOL   Sleep;
extern BOOL   Rwuen;
extern BOOL   Selfpwr;

BYTE   Configuration;      // Current configuration
BYTE   AlternateSetting;   // Alternate settings
int myi;
BYTE xdata myBuffer[64];
WORD myBufferCount;
DWORD   mynumber=0;
DWORD   count=0;
sbit PA0=IOA^0;
#define GPIFTRIGRD 4
#define GPIF_EP6 2
//-----------------------------------------------------------------------------
// Task Dispatcher hooks
//   The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------
void GpifInit( void );
void TD_Init(void)             // Called once at startup
{  int i;

  // set the CPU clock to 48MHz
 CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
GpifInit (); // initialize GPIF registers
  SYNCDELAY;
REVCTL=0X03;
    SYNCDELAY;
  EP2CFG = 0xA0;     // EP2OUT, bulk, size 512, 4x buffered
  SYNCDELAY;                    
  EP4CFG = 0x00;     // EP4 not valid
  SYNCDELAY;                    
  EP6CFG = 0xE0;     // EP6IN, bulk, size 512, 4x buffered
  SYNCDELAY;                    
  EP8CFG = 0x00;     // EP8 not valid
  SYNCDELAY;




  FIFORESET = 0x80;  // set NAKALL bit to NAK all transfers from host
  SYNCDELAY;
  FIFORESET = 0x02;  // reset EP2 FIFO
  SYNCDELAY;
  FIFORESET = 0x06;  // reset EP6 FIFO
  SYNCDELAY;
  FIFORESET = 0x00;  // clear NAKALL bit to resume normal operation
  SYNCDELAY;



  EP2FIFOCFG = 0x01; // allow core to see zero to one transition of auto out bit
  SYNCDELAY;
  EP2FIFOCFG = 0x11; // auto out mode, disable PKTEND zero length send, word ops
  SYNCDELAY;
  EP6FIFOCFG = 0x09; // auto in mode, disable PKTEND zero length send, word ops
  SYNCDELAY; 

  // out endpoints do not come up armed
  // since EP2OUT is quad buffered we must write dummy byte counts four times
                  
  EP2BCL = 0x80;     // arm EP2OUT by writing byte count w/skip.
  SYNCDELAY;                    
  EP2BCL = 0x80;
  SYNCDELAY;                    
  EP2BCL = 0x80;
  SYNCDELAY;
  EP2BCL = 0x80;
  SYNCDELAY;


/*  
  SYNCDELAY;
  EP2GPIFFLGSEL = 0x01; // For EP2OUT, GPIF uses EF flag
  SYNCDELAY;
  EP6GPIFFLGSEL = 0x02; // For EP6IN, GPIF uses FF flag
  SYNCDELAY;


     */ 
    SYNCDELAY;                   
    EP6AUTOINLENH = 0x00;       // set AUTOIN commit length to 64 bytes
    SYNCDELAY;                   
    EP6AUTOINLENL = 0x40;
    SYNCDELAY;      
 
   SCON0 = 0x50;
   SYNCDELAY;
   UART230|=0x01;




//   BREAKPT &= ~bmBPEN;      // to see BKPT LED go out TGE
 //  Rwuen = TRUE;            // Enable remote-wakeup
}
////////////////////////////////////////////////

void uart_put_char(unsigned char ch)
	{
	   SBUF0 = ch;
       while(TI == 0);
	   TI = 0;
	}
							 
unsigned char uart_get_char(void)
	{
	   while(RI == 0);
	   RI = 0;
	   return SBUF0;					  	
	}
/////////////////////////////////////////////////////////////



void TD_Poll(void)             // Called repeatedly while the device is idle
{
 int a,i;

 a=uart_get_char();
   for (i=0;i<64;i++)
  uart_put_char(a);
 IOA=~IOA;
 	 count++; 
//	  GPIFTCB1 = 0x00;                // setup transaction count (64 bytes/2 for word wide -> 0x20)
            SYNCDELAY;
//		    GPIFTCB0 = 0x40;
		    SYNCDELAY;
		//	GPIFTRIG = GPIFTRIGRD | GPIF_EP6;
 if ( GPIFTRIG & 0x80 )   
   {
  //   if(!(EP2468STAT & bmEP6FULL))
       {
            SYNCDELAY;

		    GPIFTCB1 = 0x02;                // setup transaction count (64 bytes/2 for word wide -> 0x20)
            SYNCDELAY;
		    GPIFTCB0 = 0x00;
		    SYNCDELAY;
		
        }
	//	     Setup_FLOWSTATE_Read();           // setup FLOWSTATE registers for FIFO Read operation
             SYNCDELAY;
       	GPIFTRIG = GPIFTRIGRD | GPIF_EP6; // launch GPIF FIFO READ Transaction to EP6 FIFO 
     //   EZUSB_Delay(1000);
    	
	      SYNCDELAY;
   } 

 
 
   
	  

} 


BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
{
   return(TRUE);
}

BOOL TD_Resume(void)          // Called after the device resumes
{
   return(TRUE);
}

//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{
   return(TRUE);
}

BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
{
   Configuration = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
{
   EP0BUF[0] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
{
   AlternateSetting = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
{
   EP0BUF[0] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_GetStatus(void)
{
   return(TRUE);
}

BOOL DR_ClearFeature(void)
{
   return(TRUE);
}

BOOL DR_SetFeature(void)
{
   return(TRUE);
}

#define VX_B2 0xB2
BOOL DR_VendorCmnd(void)
{
  switch (SETUPDAT[1])
  {
    case VX_B2:
    { 
     
   //   EZUSB_Delay (1000); // keep PA2 low for ~1ms, more than enough time   
//	  PA1=~PA1;
      *EP0BUF = EP6BCL;
	*(EP0BUF+1)=IFCONFIG ;
	*(EP0BUF+2)=EP6BCH; 
    *(EP0BUF+3)=GPIFTRIG;
	*(EP0BUF+4)= GPIFTCB1;
	*(EP0BUF+5)= GPIFTCB0;
	  EP0BCH = 0;
	  EP0BCL = 6;                   // Arm endpoint with # bytes to transfer
	  EP0CS |= bmHSNAK;             // Acknowledge handshake phase of device request
//	  	EZUSB_Delay(1000);
	//				EZUSB_Discon(TRUE);	
      break;
    }
	
    default:
        return(TRUE);
  }

   
    return(FALSE);
}

//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------

// Setup Data Available Interrupt Handler
void ISR_Sudav(void) interrupt 0
{
   GotSUD = TRUE;            // Set flag
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUDAV;         // Clear SUDAV IRQ
}

// Setup Token Interrupt Handler
void ISR_Sutok(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUTOK;         // Clear SUTOK IRQ
}

void ISR_Sof(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSOF;            // Clear SOF IRQ
}

void ISR_Ures(void) interrupt 0
{
   // whenever we get a USB reset, we should revert to full speed mode
   pConfigDscr = pFullSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
   pOtherConfigDscr = pHighSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmURES;         // Clear URES IRQ
}

void ISR_Susp(void) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUSP;
}

void ISR_Highspeed(void) interrupt 0
{
   if (EZUSB_HIGHSPEED())
   {
      pConfigDscr = pHighSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
      pOtherConfigDscr = pFullSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   }

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmHSGRANT;
}
void ISR_Ep0ack(void) interrupt 0
{
}
void ISR_Stub(void) interrupt 0
{
}
void ISR_Ep0in(void) interrupt 0
{
}
void ISR_Ep0out(void) interrupt 0
{
}
void ISR_Ep1in(void) interrupt 0
{
}
void ISR_Ep1out(void) interrupt 0
{
}
void ISR_Ep2inout(void) interrupt 0
{
}
void ISR_Ep4inout(void) interrupt 0
{
}
void ISR_Ep6inout(void) interrupt 0
{
}
void ISR_Ep8inout(void) interrupt 0
{
}
void ISR_Ibn(void) interrupt 0
{
}
void ISR_Ep0pingnak(void) interrupt 0
{
}
void ISR_Ep1pingnak(void) interrupt 0
{
}
void ISR_Ep2pingnak(void) interrupt 0
{
}
void ISR_Ep4pingnak(void) interrupt 0
{
}
void ISR_Ep6pingnak(void) interrupt 0
{
}
void ISR_Ep8pingnak(void) interrupt 0
{
}
void ISR_Errorlimit(void) interrupt 0
{
}
void ISR_Ep2piderror(void) interrupt 0
{
}
void ISR_Ep4piderror(void) interrupt 0
{
}
void ISR_Ep6piderror(void) interrupt 0
{
}
void ISR_Ep8piderror(void) interrupt 0
{
}
void ISR_Ep2pflag(void) interrupt 0
{
}
void ISR_Ep4pflag(void) interrupt 0
{
}
void ISR_Ep6pflag(void) interrupt 0
{
}
void ISR_Ep8pflag(void) interrupt 0
{
}
void ISR_Ep2eflag(void) interrupt 0
{
}
void ISR_Ep4eflag(void) interrupt 0
{
}
void ISR_Ep6eflag(void) interrupt 0
{
}
void ISR_Ep8eflag(void) interrupt 0
{
}
void ISR_Ep2fflag(void) interrupt 0
{
}
void ISR_Ep4fflag(void) interrupt 0
{
}
void ISR_Ep6fflag(void) interrupt 0
{
}
void ISR_Ep8fflag(void) interrupt 0
{
}
void ISR_GpifComplete(void) interrupt 0
{
}
void ISR_GpifWaveform(void) interrupt 0
{
}