📄 sd.lst
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C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE SD
OBJECT MODULE PLACED IN .\Debug\sd.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE sd.c LARGE REGFILE(.\Debug\chien.ORC) BROWSE ORDER NOINTPROMOTE NOAREGS DEB
-UG OBJECTEXTEND CODE LISTINCLUDE SYMBOLS PREPRINT OBJECT(.\Debug\sd.obj)
line level source
1 // sd.c
2 // SD/MMC access routines
3 // modified from holger.klabunde from AVR to C8051
4 //#########################################################################
5 #include "common.h"
1 =1 #include "reg51.h"
1 =2 /*--------------------------------------------------------------------------
2 =2 REG51.H
3 =2
4 =2 Header file for generic 80C51 and 80C31 microcontroller.
5 =2 Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
6 =2 All rights reserved.
7 =2 --------------------------------------------------------------------------*/
8 =2
9 =2 #ifndef __REG51_H__
10 =2 #define __REG51_H__
11 =2
12 =2 /* BYTE Register */
13 =2 sfr P0 = 0x80;
14 =2 sfr P1 = 0x90;
15 =2 sfr P2 = 0xA0;
16 =2 sfr P3 = 0xB0;
17 =2 sfr PSW = 0xD0;
18 =2 sfr ACC = 0xE0;
19 =2 sfr B = 0xF0;
20 =2 sfr SP = 0x81;
21 =2 sfr DPL = 0x82;
22 =2 sfr DPH = 0x83;
23 =2 sfr PCON = 0x87;
24 =2 sfr TCON = 0x88;
25 =2 sfr TMOD = 0x89;
26 =2 sfr TL0 = 0x8A;
27 =2 sfr TL1 = 0x8B;
28 =2 sfr TH0 = 0x8C;
29 =2 sfr TH1 = 0x8D;
30 =2 sfr IE = 0xA8;
31 =2 sfr IP = 0xB8;
32 =2 sfr SCON = 0x98;
33 =2 sfr SBUF = 0x99;
34 =2
35 =2
36 =2 /* BIT Register */
37 =2 /* PSW */
38 =2 sbit CY = 0xD7;
39 =2 sbit AC = 0xD6;
40 =2 sbit F0 = 0xD5;
41 =2 sbit RS1 = 0xD4;
42 =2 sbit RS0 = 0xD3;
43 =2 sbit OV = 0xD2;
44 =2 sbit P = 0xD0;
45 =2
46 =2 /* TCON */
47 =2 sbit TF1 = 0x8F;
48 =2 sbit TR1 = 0x8E;
C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 2
49 =2 sbit TF0 = 0x8D;
50 =2 sbit TR0 = 0x8C;
51 =2 sbit IE1 = 0x8B;
52 =2 sbit IT1 = 0x8A;
53 =2 sbit IE0 = 0x89;
54 =2 sbit IT0 = 0x88;
55 =2
56 =2 /* IE */
57 =2 sbit EA = 0xAF;
58 =2 sbit ES = 0xAC;
59 =2 sbit ET1 = 0xAB;
60 =2 sbit EX1 = 0xAA;
61 =2 sbit ET0 = 0xA9;
62 =2 sbit EX0 = 0xA8;
63 =2
64 =2 /* IP */
65 =2 sbit PS = 0xBC;
66 =2 sbit PT1 = 0xBB;
67 =2 sbit PX1 = 0xBA;
68 =2 sbit PT0 = 0xB9;
69 =2 sbit PX0 = 0xB8;
70 =2
71 =2 /* P3 */
72 =2 sbit RD = 0xB7;
73 =2 sbit WR = 0xB6;
74 =2 sbit T1 = 0xB5;
75 =2 sbit T0 = 0xB4;
76 =2 sbit INT1 = 0xB3;
77 =2 sbit INT0 = 0xB2;
78 =2 sbit TXD = 0xB1;
79 =2 sbit RXD = 0xB0;
80 =2
81 =2 /* SCON */
82 =2 sbit SM0 = 0x9F;
83 =2 sbit SM1 = 0x9E;
84 =2 sbit SM2 = 0x9D;
85 =2 sbit REN = 0x9C;
86 =2 sbit TB8 = 0x9B;
87 =2 sbit RB8 = 0x9A;
88 =2 sbit TI = 0x99;
89 =2 sbit RI = 0x98;
90 =2
91 =2 #endif
2 =1 #include "ABSACC.H"
1 =2 /*--------------------------------------------------------------------------
2 =2 ABSACC.H
3 =2
4 =2 Direct access to 8051, extended 8051 and Philips 80C51MX memory areas.
5 =2 Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
6 =2 All rights reserved.
7 =2 --------------------------------------------------------------------------*/
8 =2
9 =2 #ifndef __ABSACC_H__
10 =2 #define __ABSACC_H__
11 =2
12 =2 #define CBYTE ((unsigned char volatile code *) 0)
13 =2 #define DBYTE ((unsigned char volatile data *) 0)
14 =2 #define PBYTE ((unsigned char volatile pdata *) 0)
15 =2 #define XBYTE ((unsigned char volatile xdata *) 0)
16 =2
17 =2 #define CWORD ((unsigned int volatile code *) 0)
18 =2 #define DWORD ((unsigned int volatile data *) 0)
C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 3
19 =2 #define PWORD ((unsigned int volatile pdata *) 0)
20 =2 #define XWORD ((unsigned int volatile xdata *) 0)
21 =2
22 =2
23 =2 #ifdef __CX51__
=2 #define FVAR(object, addr) (*((object volatile far *) (addr)))
=2 #define FARRAY(object, base) ((object volatile far *) (base))
=2 #define FCVAR(object, addr) (*((object const far *) (addr)))
=2 #define FCARRAY(object, base) ((object const far *) (base))
=2 #else
29 =2 #define FVAR(object, addr) (*((object volatile far *) ((addr)+0x10000L)))
30 =2 #define FCVAR(object, addr) (*((object const far *) ((addr)+0x810000L)))
31 =2 #define FARRAY(object, base) ((object volatile far *) ((base)+0x10000L))
32 =2 #define FCARRAY(object, base) ((object const far *) ((base)+0x810000L))
33 =2 #endif
34 =2
35 =2 #endif
3 =1
4 =1 #define OLD_CHIP // if using old chip, make this definition
5 =1 #define NULL 0
6 =1 #define TRUE 1
7 =1 #define FALSE 0
8 =1 #define BYTE unsigned char
9 =1 #define WORD unsigned short
10 =1
11 =1 #define SECT_LEN 512
12 =1
13 =1 // Disable all interrupts
14 =1 #define DISABLE_INTERRUPTS EA = 0
15 =1 // Enable all interrupts
16 =1 #define ENABLE_INTERRUPTS EA = 1
17 =1 #define BUFFER_LENGTH 512
18 =1
19 =1 typedef unsigned char UINT8;
20 =1 typedef unsigned short UINT16;
21 =1 typedef unsigned long UINT32;
22 =1
23 =1 typedef union {
24 =1 struct
25 =1 {
26 =1 UINT8 Type;
27 =1 UINT8 Index;
28 =1 } Descriptor;
29 =1
30 =1 struct
31 =1 {
32 =1 UINT8 tx0; // MSB for 8051 Keil C
33 =1 UINT8 tx1;
34 =1 UINT8 endp;
35 =1 UINT8 c0; // LSB for 8051 Keil C
36 =1 } chars;
37 =1
38 =1 struct
39 =1 {
40 =1 UINT8 c3; // MSB for 8051 Keil C
41 =1 UINT8 c2;
42 =1 UINT8 c1;
43 =1 UINT8 c0; // LSB for 8051 Keil C
44 =1 } chars0;
45 =1
46 =1 struct
47 =1 {
C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 4
48 =1 UINT16 i1; // MSW for 8051 keil C
49 =1 UINT16 i0; // LSW for 8051 Keil C
50 =1 } ints;
51 =1
52 =1 UINT32 u0;
53 =1
54 =1 } FLEXI_INT32;
55 =1
56 =1 typedef union {
57 =1 struct
58 =1 {
59 =1 UINT8 c1; // MSB for 8051 Keil C
60 =1 UINT8 c0; // LSB for 8051 Keil C
61 =1 } chars;
62 =1
63 =1 UINT16 i0;
64 =1 } FLEXI_INT16, *pFLEXI_INT16;
65 =1
66 =1 typedef struct _XXG_FLAGS
67 =1 {
68 =1 unsigned char bTimer :1;
69 =1 unsigned char bIN_ISR :1;
70 =1 unsigned char bCOM_ERR :1;
71 =1 unsigned char bTimeout :1;
72 =1 unsigned char bData1 :1;
73 =1 unsigned char bUartInDone :1;
74 =1 unsigned char bMassDevice :1;
75 =1 unsigned char bToggle :1;
76 =1
77 =1 unsigned char SLAVE_IS_ATTACHED :1;
78 =1 unsigned char SLAVE_REMOVED :1;
79 =1 unsigned char SLAVE_FOUND :1; // Slave USB device found
80 =1 unsigned char SLAVE_ENUMERATED :1; // slave USB device enumeration done
81 =1 unsigned char SLAVE_ONLINE :1;
82 =1 unsigned char SLAVE_STALLED :1;
83 =1 unsigned char TIMEOUT_ERR :1; // timeout error during data endpoint transfer
84 =1 unsigned char DATA_STOP :1; // device unplugged during data transfer
85 =1 } XXGFLAGS;
86 =1
87 =1 typedef struct
88 =1 {
89 =1 unsigned int sector;
90 =1 unsigned char offset;
91 =1 } DIR_IDX, *pDIR_IDX;
92 =1
93 =1 /*----------------------------------------------------
94 =1 * Register Definitions
95 =1 *----------------------------------------------------
96 =1 */
97 =1 //mp3 registers' address definition
98 =1 #define InData XBYTE[0xF400]
99 =1 #define Mp3Ctrl XBYTE[0xF401]
100 =1 #define Voffset XBYTE[0xF402]
101 =1 #define Volume XBYTE[0xF403]
102 =1 #define Mode XBYTE[0xF404]
103 =1 #define Mp3Stat XBYTE[0xF405]
104 =1 #define Mp3Inf XBYTE[0xF406]
105 =1 #define Alarm XBYTE[0xF407]
106 =1 #define AlarmEn XBYTE[0xF408]
107 =1 #define AlarmTest XBYTE[0xF409]
108 =1 #define Playmode XBYTE[0xF40A]
109 =1
C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 5
110 =1 //usb registers' address definition
111 =1 #define SieCtrl XBYTE[0xF800]
112 =1 #define SieStat0 XBYTE[0xF801]
113 =1 #define SieStat1 XBYTE[0xF802]
114 =1 #define TxCtrl XBYTE[0xF803]
115 =1 #define TxEpnum XBYTE[0xF804]
116 =1 #define TxAddr XBYTE[0xF805]
117 =1 #define TxPktlen XBYTE[0xF806]
118 =1 #define XferCnt XBYTE[0xF807]
119 =1 #define Ualarm XBYTE[0xF808]
120 =1 #define UalarmEn XBYTE[0xF809]
121 =1 #define UalarmTest XBYTE[0xF80A]
122 =1 #define BufSel XBYTE[0xF80B]
123 =1 #define BufRst XBYTE[0xF80C]
124 =1 #define BufStatusAddr XBYTE[0xF80D]
125 =1 #define BufAddr XBYTE[0xF80E]
126 =1 #define Scratch XBYTE[0xF80F]
127 =1 //
128 =1 // ava110 User SFRs
129 =1 // extra GPIO port
130 =1 sfr P4 = 0xA1;
131 =1 // port output enable force
132 =1 sfr P0_DDR = 0xA2;
133 =1 sfr P1_DDR = 0xA3;
134 =1 sfr P2_DDR = 0xA4;
135 =1 sfr P3_DDR = 0xA5;
136 =1 sfr P4_DDR = 0xA6;
137 =1 // port pull-up/down
138 =1 sfr P_PU = 0xA7;
139 =1 sfr P_PD = 0xA9;
140 =1 // watchdog timer
141 =1 sfr WDT = 0xAA;
142 =1 // SPI port
143 =1 sfr SPI_DATA= 0x91;
144 =1 sfr SPI_CTL0= 0x92;
145 =1 sfr SPI_CTL1= 0x93;
146 =1 sfr SPI_STA0= 0x94;
147 =1 // SD interface
148 =1 sfr SD_CTL0= 0x95;
149 =1 sfr SD_STA0= 0x96;
150 =1 sfr SD_STA1= 0x97;
151 =1
152 =1 // The following defines bit maps for serial and spi port
153 =1 // control & status masks
154 =1 // serial port control
155 =1 #define SCON_SLOW 0x10
156 =1 #define SCON_FAST 0x50
157 =1 #define SCON_9BIT 0x80
158 =1 // serial port status
159 =1 #define SCON_RXINT 0x1
160 =1 #define SCON_TXINT 0x2
161 =1 // SPI control 0
162 =1 #define SPI_LSB 0x1
163 =1 #define SPI_CPOL 0x2
164 =1 #define SPI_CPHA 0x4
165 =1 #define SPI_MST 0x8
166 =1 #define SPI_TIE 0x10
167 =1 #define SPI_RIE 0x20
168 =1 #define SPI_EN 0x40
169 =1 #define SPI_SSOEN 0x80
170 =1 // SPI control 1
171 =1 #define SPI_3M 0x0
C51 COMPILER V8.02 SD 09/19/2006 15:01:24 PAGE 6
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