da7524.vhd

来自「此程序为dsp原码程序」· VHDL 代码 · 共 19 行

library ieee;
use ieee.std_logic_1164.all;

entity da7524 is
port(clk : in std_logic;
     din : in std_logic_vector(7 downto 0);
     daout : out std_logic_vector(7 downto 0));
end da7524;

architecture behav of da7524 is
begin
process(clk,din)
begin
if clk'event and clk='1' then
   daout<=din;
end if;
end process;
end behav;