📄 add4.csf.qmsg
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{ "Info" "IFIT_FIT_ATTEMPT" "2 Mon Jul 26 2004 10:38:14 " "Info: Started fitting attempt 2 on Mon Jul 26 2004 at 10:38:14" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "0 " "Info: Fitter placement preparation operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "0 " "Info: Fitter placement operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 26 10:38:21 2004 " "Info: Processing ended: Mon Jul 26 10:38:21 2004" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:14 " "Info: Elapsed time: 00:00:14" { } { } 0} } { } 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version " "Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Jul 26 10:38:23 2004 " "Info: Processing started: Mon Jul 26 10:38:23 2004" { } { } 0} } { } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --import_settings_files=off --export_settings_files=off add4 -c add4 " "Info: Command: quartus_asm --import_settings_files=off --export_settings_files=off add4 -c add4" { } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 26 10:38:25 2004 " "Info: Processing ended: Mon Jul 26 10:38:25 2004" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0} } { } 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version " "Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Jul 26 10:38:27 2004 " "Info: Processing started: Mon Jul 26 10:38:27 2004" { } { } 0} } { } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --import_settings_files=off --export_settings_files=off add4 -c add4 " "Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off add4 -c add4" { } { } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "CIN COUT 23.100 ns Longest " "Info: Longest tpd from source pin CIN to destination pin COUT is 23.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns CIN 1 PIN Pin_99 1 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = Pin_99; Fanout = 1; PIN Node = 'CIN'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "" { CIN } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 7 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.400 ns) + CELL(0.700 ns) 10.000 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\] 2 COMB LC8_C32 2 " "Info: 2: + IC(4.400 ns) + CELL(0.700 ns) = 10.000 ns; Loc. = LC8_C32; Fanout = 2; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "5.100 ns" { CIN lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.500 ns) + CELL(0.200 ns) 10.700 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\] 3 COMB LC1_C34 2 " "Info: 3: + IC(0.500 ns) + CELL(0.200 ns) = 10.700 ns; Loc. = LC1_C34; Fanout = 2; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "0.700 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 10.900 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\] 4 COMB LC2_C34 2 " "Info: 4: + IC(0.000 ns) + CELL(0.200 ns) = 10.900 ns; Loc. = LC2_C34; Fanout = 2; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "0.200 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 11.100 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\] 5 COMB LC3_C34 2 " "Info: 5: + IC(0.000 ns) + CELL(0.200 ns) = 11.100 ns; Loc. = LC3_C34; Fanout = 2; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "0.200 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 11.300 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\] 6 COMB LC4_C34 1 " "Info: 6: + IC(0.000 ns) + CELL(0.200 ns) = 11.300 ns; Loc. = LC4_C34; Fanout = 1; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "0.200 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.400 ns) 12.700 ns lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[4\]~66 7 COMB LC5_C34 1 " "Info: 7: + IC(0.000 ns) + CELL(1.400 ns) = 12.700 ns; Loc. = LC5_C34; Fanout = 1; COMB Node = 'lpm_add_sub:i_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[4\]~66'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "1.400 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~66 } "NODE_NAME" } } } { "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "" "" { Text "e:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(1.400 ns) 15.400 ns COUT~0 8 COMB LC3_C25 1 " "Info: 8: + IC(1.300 ns) + CELL(1.400 ns) = 15.400 ns; Loc. = LC3_C25; Fanout = 1; COMB Node = 'COUT~0'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "2.700 ns" { lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~66 COUT~0 } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(6.300 ns) 23.100 ns COUT 9 PIN Pin_13 0 " "Info: 9: + IC(1.400 ns) + CELL(6.300 ns) = 23.100 ns; Loc. = Pin_13; Fanout = 0; PIN Node = 'COUT'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "7.700 ns" { COUT~0 COUT } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 13 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "15.500 ns 67.10 % " "Info: Total cell delay = 15.500 ns ( 67.10 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.600 ns 32.90 % " "Info: Total interconnect delay = 7.600 ns ( 32.90 % )" { } { } 0} } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "23.100 ns" { CIN lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] lpm_add_sub:i_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~66 COUT~0 COUT } "NODE_NAME" } } } } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "B\[2\] BD\[2\] 15.900 ns Shortest " "Info: Shortest tpd from source pin B\[2\] to destination pin BD\[2\] is 15.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns B\[2\] 1 PIN Pin_39 3 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = Pin_39; Fanout = 3; PIN Node = 'B\[2\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "" { B[2] } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 9 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.100 ns) + CELL(1.400 ns) 8.400 ns BD\[2\]~1 2 COMB LC6_D34 1 " "Info: 2: + IC(2.100 ns) + CELL(1.400 ns) = 8.400 ns; Loc. = LC6_D34; Fanout = 1; COMB Node = 'BD\[2\]~1'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "3.500 ns" { B[2] BD[2]~1 } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 12 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(6.300 ns) 15.900 ns BD\[2\] 3 PIN Pin_22 0 " "Info: 3: + IC(1.200 ns) + CELL(6.300 ns) = 15.900 ns; Loc. = Pin_22; Fanout = 0; PIN Node = 'BD\[2\]'" { } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "7.500 ns" { BD[2]~1 BD[2] } "NODE_NAME" } } } { "D:/workspace/dsp-d/add4/add4.vhd" "" "" { Text "D:/workspace/dsp-d/add4/add4.vhd" 12 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "12.600 ns 79.25 % " "Info: Total cell delay = 12.600 ns ( 79.25 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.300 ns 20.75 % " "Info: Total interconnect delay = 3.300 ns ( 20.75 % )" { } { } 0} } { { "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" "" "" { Report "D:/workspace/dsp-d/add4/db/add4_cmp.qrpt" Compiler "add4" "UNKNOWN" "V1" "D:/workspace/dsp-d/add4/db/add4.quartus_db" { Floorplan "" "" "15.900 ns" { B[2] BD[2]~1 BD[2] } "NODE_NAME" } } } } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 26 10:38:28 2004 " "Info: Processing ended: Mon Jul 26 10:38:28 2004" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0} } { } 0}
{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 0 s " "Info: Quartus II Full Compilation was successful. 0 errors, 0 warnings" { } { } 0}
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